From: Ganesh Goudar <ganeshgr@chelsio.com>

Date: Sun, 20 Aug 2017 14:15:51 +0530

Subject: cxgb4/cxgbvf: Handle 32-bit fw port capabilities

Patch-mainline: v4.14-rc1

Git-commit: c3168cabe1af2683475d0e3048220c04b7fa4f51

References: bsc#1046540 FATE#322930 bsc#1046542 FATE#322928

Implement new 32-bit Firmware Port Capabilities in order to

handle new speeds which couldn't be represented in the old 16-bit

Firmware Port Capabilities values.

Based on the original work of Casey Leedom <leedom@chelsio.com>

Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>

Signed-off-by: David S. Miller <davem@davemloft.net>

Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>

---

 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h          |   43 +

 drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c  |   98 ++-

 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c     |   88 +--

 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c          |  578 +++++++++++++++-----

 drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h       |  175 ++++++

 drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c |   50 +

 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_common.h  |   86 +-

 drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c      |  458 ++++++++++++---

 8 files changed, 1220 insertions(+), 356 deletions(-)

--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

@@ -104,13 +104,13 @@ enum dev_state {

 	DEV_STATE_ERR

 };

-enum {

+enum cc_pause {

 	PAUSE_RX      = 1 << 0,

 	PAUSE_TX      = 1 << 1,

 	PAUSE_AUTONEG = 1 << 2

 };

-enum {

+enum cc_fec {

 	FEC_AUTO      = 1 << 0,	 /* IEEE 802.3 "automatic" */

 	FEC_RS        = 1 << 1,  /* Reed-Solomon */

 	FEC_BASER_RS  = 1 << 2   /* BaseR/Reed-Solomon */

@@ -366,6 +366,7 @@ struct adapter_params {

 	unsigned int max_ordird_qp;       /* Max read depth per RDMA QP */

 	unsigned int max_ird_adapter;     /* Max read depth per adapter */

 	bool fr_nsmr_tpte_wr_support;	  /* FW support for FR_NSMR_TPTE_WR */

+	u8 fw_caps_support;		/* 32-bit Port Capabilities */

 	/* MPS Buffer Group Map[per Port].  Bit i is set if buffer group i is

 	 * used by the Port

@@ -439,18 +440,34 @@ struct trace_params {

 	unsigned char port;

 };

+/* Firmware Port Capabilities types. */

+

+typedef u16 fw_port_cap16_t;	/* 16-bit Port Capabilities integral value */

+typedef u32 fw_port_cap32_t;	/* 32-bit Port Capabilities integral value */

+

+enum fw_caps {

+	FW_CAPS_UNKNOWN	= 0,	/* 0'ed out initial state */

+	FW_CAPS16	= 1,	/* old Firmware: 16-bit Port Capabilities */

+	FW_CAPS32	= 2,	/* new Firmware: 32-bit Port Capabilities */

+};

+

 struct link_config {

-	unsigned short supported;        /* link capabilities */

-	unsigned short advertising;      /* advertised capabilities */

-	unsigned short lp_advertising;   /* peer advertised capabilities */

-	unsigned int   requested_speed;  /* speed user has requested */

-	unsigned int   speed;            /* actual link speed */

-	unsigned char  requested_fc;     /* flow control user has requested */

-	unsigned char  fc;               /* actual link flow control */

-	unsigned char  auto_fec;	 /* Forward Error Correction: */

-	unsigned char  requested_fec;	 /* "automatic" (IEEE 802.3), */

-	unsigned char  fec;		 /* requested, and actual in use */

+	fw_port_cap32_t pcaps;           /* link capabilities */

+	fw_port_cap32_t def_acaps;       /* default advertised capabilities */

+	fw_port_cap32_t acaps;           /* advertised capabilities */

+	fw_port_cap32_t lpacaps;         /* peer advertised capabilities */

+

+	fw_port_cap32_t speed_caps;      /* speed(s) user has requested */

+	unsigned int   speed;            /* actual link speed (Mb/s) */

+

+	enum cc_pause  requested_fc;     /* flow control user has requested */

+	enum cc_pause  fc;               /* actual link flow control */

+

+	enum cc_fec    requested_fec;	 /* Forward Error Correction: */

+	enum cc_fec    fec;		 /* requested and actual in use */

+

 	unsigned char  autoneg;          /* autonegotiating? */

+

 	unsigned char  link_ok;          /* link up? */

 	unsigned char  link_down_rc;     /* link down reason */

 };

@@ -1580,6 +1597,8 @@ int t4_ofld_eq_free(struct adapter *adap

 int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox);

 void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl);

 int t4_update_port_info(struct port_info *pi);

+int t4_get_link_params(struct port_info *pi, unsigned int *link_okp,

+		       unsigned int *speedp, unsigned int *mtup);

 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);

 void t4_db_full(struct adapter *adapter);

 void t4_db_dropped(struct adapter *adapter);

--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c

+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_ethtool.c

@@ -533,17 +533,23 @@ static int from_fw_port_mod_type(enum fw

 static unsigned int speed_to_fw_caps(int speed)

 {

 	if (speed == 100)

-		return FW_PORT_CAP_SPEED_100M;

+		return FW_PORT_CAP32_SPEED_100M;

 	if (speed == 1000)

-		return FW_PORT_CAP_SPEED_1G;

+		return FW_PORT_CAP32_SPEED_1G;

 	if (speed == 10000)

-		return FW_PORT_CAP_SPEED_10G;

+		return FW_PORT_CAP32_SPEED_10G;

 	if (speed == 25000)

-		return FW_PORT_CAP_SPEED_25G;

+		return FW_PORT_CAP32_SPEED_25G;

 	if (speed == 40000)

-		return FW_PORT_CAP_SPEED_40G;

+		return FW_PORT_CAP32_SPEED_40G;

+	if (speed == 50000)

+		return FW_PORT_CAP32_SPEED_50G;

 	if (speed == 100000)

-		return FW_PORT_CAP_SPEED_100G;

+		return FW_PORT_CAP32_SPEED_100G;

+	if (speed == 200000)

+		return FW_PORT_CAP32_SPEED_200G;

+	if (speed == 400000)

+		return FW_PORT_CAP32_SPEED_400G;

 	return 0;

 }

@@ -560,12 +566,13 @@ static void fw_caps_to_lmm(enum fw_port_

 			   unsigned int fw_caps,

 			   unsigned long *link_mode_mask)

 {

-	#define SET_LMM(__lmm_name) __set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name \

-					## _BIT, link_mode_mask)

+	#define SET_LMM(__lmm_name) \

+		__set_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \

+			  link_mode_mask)

 	#define FW_CAPS_TO_LMM(__fw_name, __lmm_name) \

 		do { \

-			if (fw_caps & FW_PORT_CAP_ ## __fw_name) \

+			if (fw_caps & FW_PORT_CAP32_ ## __fw_name) \

 				SET_LMM(__lmm_name); \

 		} while (0)

@@ -645,7 +652,10 @@ static void fw_caps_to_lmm(enum fw_port_

 	case FW_PORT_TYPE_KR4_100G:

 	case FW_PORT_TYPE_CR4_QSFP:

 		SET_LMM(FIBRE);

-		SET_LMM(100000baseCR4_Full);

+		FW_CAPS_TO_LMM(SPEED_40G, 40000baseSR4_Full);

+		FW_CAPS_TO_LMM(SPEED_25G, 25000baseCR_Full);

+		FW_CAPS_TO_LMM(SPEED_50G, 50000baseCR2_Full);

+		FW_CAPS_TO_LMM(SPEED_100G, 100000baseCR4_Full);

 		break;

 	default:

@@ -663,8 +673,7 @@ static void fw_caps_to_lmm(enum fw_port_

 /**

  *	lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware

  *	capabilities

- *

- *	@link_mode_mask: ethtool Link Mode Mask

+ *	@et_lmm: ethtool Link Mode Mask

  *

  *	Translate ethtool Link Mode Mask into a Firmware Port capabilities

  *	value.

@@ -677,7 +686,7 @@ static unsigned int lmm_to_fw_caps(const

 		do { \

 			if (test_bit(ETHTOOL_LINK_MODE_ ## __lmm_name ## _BIT, \

 				     link_mode_mask)) \

-				fw_caps |= FW_PORT_CAP_ ## __fw_name; \

+				fw_caps |= FW_PORT_CAP32_ ## __fw_name; \

 		} while (0)

 	LMM_TO_FW_CAPS(100baseT_Full, SPEED_100M);

@@ -685,6 +694,7 @@ static unsigned int lmm_to_fw_caps(const

 	LMM_TO_FW_CAPS(10000baseT_Full, SPEED_10G);

 	LMM_TO_FW_CAPS(40000baseSR4_Full, SPEED_40G);

 	LMM_TO_FW_CAPS(25000baseCR_Full, SPEED_25G);

+	LMM_TO_FW_CAPS(50000baseCR2_Full, SPEED_50G);

 	LMM_TO_FW_CAPS(100000baseCR4_Full, SPEED_100G);

 	#undef LMM_TO_FW_CAPS

@@ -698,10 +708,6 @@ static int get_link_ksettings(struct net

 	struct port_info *pi = netdev_priv(dev);

 	struct ethtool_link_settings *base = &link_ksettings->base;

-	ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);

-	ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);

-	ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);

-

 	/* For the nonce, the Firmware doesn't send up Port State changes

 	 * when the Virtual Interface attached to the Port is down.  So

 	 * if it's down, let's grab any changes.

@@ -709,6 +715,10 @@ static int get_link_ksettings(struct net

 	if (!netif_running(dev))

 		(void)t4_update_port_info(pi);

+	ethtool_link_ksettings_zero_link_mode(link_ksettings, supported);

+	ethtool_link_ksettings_zero_link_mode(link_ksettings, advertising);

+	ethtool_link_ksettings_zero_link_mode(link_ksettings, lp_advertising);

+

 	base->port = from_fw_port_mod_type(pi->port_type, pi->mod_type);

 	if (pi->mdio_addr >= 0) {

@@ -721,11 +731,11 @@ static int get_link_ksettings(struct net

 		base->mdio_support = 0;

 	}

-	fw_caps_to_lmm(pi->port_type, pi->link_cfg.supported,

+	fw_caps_to_lmm(pi->port_type, pi->link_cfg.pcaps,

 		       link_ksettings->link_modes.supported);

-	fw_caps_to_lmm(pi->port_type, pi->link_cfg.advertising,

+	fw_caps_to_lmm(pi->port_type, pi->link_cfg.acaps,

 		       link_ksettings->link_modes.advertising);

-	fw_caps_to_lmm(pi->port_type, pi->link_cfg.lp_advertising,

+	fw_caps_to_lmm(pi->port_type, pi->link_cfg.lpacaps,

 		       link_ksettings->link_modes.lp_advertising);

 	if (netif_carrier_ok(dev)) {

@@ -736,8 +746,24 @@ static int get_link_ksettings(struct net

 		base->duplex = DUPLEX_UNKNOWN;

 	}

+	if (pi->link_cfg.fc & PAUSE_RX) {

+		if (pi->link_cfg.fc & PAUSE_TX) {

+			ethtool_link_ksettings_add_link_mode(link_ksettings,

+							     advertising,

+							     Pause);

+		} else {

+			ethtool_link_ksettings_add_link_mode(link_ksettings,

+							     advertising,

+							     Asym_Pause);

+		}

+	} else if (pi->link_cfg.fc & PAUSE_TX) {

+		ethtool_link_ksettings_add_link_mode(link_ksettings,

+						     advertising,

+						     Asym_Pause);

+	}

+

 	base->autoneg = pi->link_cfg.autoneg;

-	if (pi->link_cfg.supported & FW_PORT_CAP_ANEG)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_ANEG)

 		ethtool_link_ksettings_add_link_mode(link_ksettings,

 						     supported, Autoneg);

 	if (pi->link_cfg.autoneg)

@@ -748,8 +774,7 @@ static int get_link_ksettings(struct net

 }

 static int set_link_ksettings(struct net_device *dev,

-			      const struct ethtool_link_ksettings

-						*link_ksettings)

+			    const struct ethtool_link_ksettings *link_ksettings)

 {

 	struct port_info *pi = netdev_priv(dev);

 	struct link_config *lc = &pi->link_cfg;

@@ -762,12 +787,12 @@ static int set_link_ksettings(struct net

 	if (base->duplex != DUPLEX_FULL)

 		return -EINVAL;

-	if (!(lc->supported & FW_PORT_CAP_ANEG)) {

+	if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) {

 		/* PHY offers a single speed.  See if that's what's

 		 * being requested.

 		 */

 		if (base->autoneg == AUTONEG_DISABLE &&

-		    (lc->supported & speed_to_fw_caps(base->speed)))

+		    (lc->pcaps & speed_to_fw_caps(base->speed)))

 			return 0;

 		return -EINVAL;

 	}

@@ -776,18 +801,17 @@ static int set_link_ksettings(struct net

 	if (base->autoneg == AUTONEG_DISABLE) {

 		fw_caps = speed_to_fw_caps(base->speed);

-		if (!(lc->supported & fw_caps))

+		if (!(lc->pcaps & fw_caps))

 			return -EINVAL;

-		lc->requested_speed = fw_caps;

-		lc->advertising = 0;

+		lc->speed_caps = fw_caps;

+		lc->acaps = 0;

 	} else {

 		fw_caps =

-			lmm_to_fw_caps(link_ksettings->link_modes.advertising);

-

-		if (!(lc->supported & fw_caps))

+			 lmm_to_fw_caps(link_ksettings->link_modes.advertising);

+		if (!(lc->pcaps & fw_caps))

 			return -EINVAL;

-		lc->requested_speed = 0;

-		lc->advertising = fw_caps | FW_PORT_CAP_ANEG;

+		lc->speed_caps = 0;

+		lc->acaps = fw_caps | FW_PORT_CAP32_ANEG;

 	}

 	lc->autoneg = base->autoneg;

@@ -806,9 +830,9 @@ static inline unsigned int fwcap_to_eth_

 {

 	unsigned int eth_fec = 0;

-	if (fw_fec & FW_PORT_CAP_FEC_RS)

+	if (fw_fec & FW_PORT_CAP32_FEC_RS)

 		eth_fec |= ETHTOOL_FEC_RS;

-	if (fw_fec & FW_PORT_CAP_FEC_BASER_RS)

+	if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)

 		eth_fec |= ETHTOOL_FEC_BASER;

 	/* if nothing is set, then FEC is off */

@@ -864,7 +888,7 @@ static int get_fecparam(struct net_devic

 	 * always support IEEE 802.3 "automatic" selection of Link FEC type if

 	 * any FEC is supported.

 	 */

-	fec->fec = fwcap_to_eth_fec(lc->supported);

+	fec->fec = fwcap_to_eth_fec(lc->pcaps);

 	if (fec->fec != ETHTOOL_FEC_OFF)

 		fec->fec |= ETHTOOL_FEC_AUTO;

@@ -917,7 +941,7 @@ static int set_pauseparam(struct net_dev

 	if (epause->autoneg == AUTONEG_DISABLE)

 		lc->requested_fc = 0;

-	else if (lc->supported & FW_PORT_CAP_ANEG)

+	else if (lc->pcaps & FW_PORT_CAP32_ANEG)

 		lc->requested_fc = PAUSE_AUTONEG;

 	else

 		return -EINVAL;

--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

@@ -530,15 +530,22 @@ static int fwevtq_handler(struct sge_rsp

 			FW_PORT_CMD_ACTION_G(ntohl(pcmd->action_to_len16));

 		if (cmd == FW_PORT_CMD &&

-		    action == FW_PORT_ACTION_GET_PORT_INFO) {

+		    (action == FW_PORT_ACTION_GET_PORT_INFO ||

+		     action == FW_PORT_ACTION_GET_PORT_INFO32)) {

 			int port = FW_PORT_CMD_PORTID_G(

 					be32_to_cpu(pcmd->op_to_portid));

-			struct net_device *dev =

-				q->adap->port[q->adap->chan_map[port]];

-			int state_input = ((pcmd->u.info.dcbxdis_pkd &

-					    FW_PORT_CMD_DCBXDIS_F)

-					   ? CXGB4_DCB_INPUT_FW_DISABLED

-					   : CXGB4_DCB_INPUT_FW_ENABLED);

+			struct net_device *dev;

+			int dcbxdis, state_input;

+

+			dev = q->adap->port[q->adap->chan_map[port]];

+			dcbxdis = (action == FW_PORT_ACTION_GET_PORT_INFO

+				   ? !!(pcmd->u.info.dcbxdis_pkd &

+					FW_PORT_CMD_DCBXDIS_F)

+				   : !!(pcmd->u.info32.lstatus32_to_cbllen32 &

+					FW_PORT_CMD_DCBXDIS32_F));

+			state_input = (dcbxdis

+				       ? CXGB4_DCB_INPUT_FW_DISABLED

+				       : CXGB4_DCB_INPUT_FW_ENABLED);

 			cxgb4_dcb_state_fsm(dev, state_input);

 		}

@@ -2672,11 +2679,10 @@ static int cxgb_set_vf_rate(struct net_d

 {

 	struct port_info *pi = netdev_priv(dev);

 	struct adapter *adap = pi->adapter;

-	struct fw_port_cmd port_cmd, port_rpl;

-	u32 link_status, speed = 0;

+	unsigned int link_ok, speed, mtu;

 	u32 fw_pfvf, fw_class;

 	int class_id = vf;

-	int link_ok, ret;

+	int ret;

 	u16 pktsize;

 	if (vf >= adap->num_vfs)

@@ -2688,41 +2694,18 @@ static int cxgb_set_vf_rate(struct net_d

 			min_tx_rate, vf);

 		return -EINVAL;

 	}

-	/* Retrieve link details for VF port */

-	memset(&port_cmd, 0, sizeof(port_cmd));

-	port_cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) |

-					    FW_CMD_REQUEST_F |

-					    FW_CMD_READ_F |

-					    FW_PORT_CMD_PORTID_V(pi->port_id));

-	port_cmd.action_to_len16 =

-		cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) |

-			    FW_LEN16(port_cmd));

-	ret = t4_wr_mbox(adap, adap->mbox, &port_cmd, sizeof(port_cmd),

-			 &port_rpl);

+

+	ret = t4_get_link_params(pi, &link_ok, &speed, &mtu);

 	if (ret != FW_SUCCESS) {

 		dev_err(adap->pdev_dev,

-			"Failed to get link status for VF %d\n", vf);

+			"Failed to get link information for VF %d\n", vf);

 		return -EINVAL;

 	}

-	link_status = be32_to_cpu(port_rpl.u.info.lstatus_to_modtype);

-	link_ok = (link_status & FW_PORT_CMD_LSTATUS_F) != 0;

+

 	if (!link_ok) {

 		dev_err(adap->pdev_dev, "Link down for VF %d\n", vf);

 		return -EINVAL;

 	}

-	/* Determine link speed */

-	if (link_status & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M))

-		speed = 100;

-	else if (link_status & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G))

-		speed = 1000;

-	else if (link_status & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G))

-		speed = 10000;

-	else if (link_status & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G))

-		speed = 25000;

-	else if (link_status & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G))

-		speed = 40000;

-	else if (link_status & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G))

-		speed = 100000;

 	if (max_tx_rate > speed) {

 		dev_err(adap->pdev_dev,

@@ -2730,7 +2713,8 @@ static int cxgb_set_vf_rate(struct net_d

 			max_tx_rate, vf, speed);

 		return -EINVAL;

 	}

-	pktsize = be16_to_cpu(port_rpl.u.info.mtu);

+

+	pktsize = mtu;

 	/* subtract ethhdr size and 4 bytes crc since, f/w appends it */

 	pktsize = pktsize - sizeof(struct ethhdr) - 4;

 	/* subtract ipv4 hdr size, tcp hdr size to get typical IPv4 MSS size */

@@ -2741,7 +2725,7 @@ static int cxgb_set_vf_rate(struct net_d

 			      SCHED_CLASS_MODE_CLASS,

 			      SCHED_CLASS_RATEUNIT_BITS,

 			      SCHED_CLASS_RATEMODE_ABS,

-			      pi->port_id, class_id, 0,

+			      pi->tx_chan, class_id, 0,

 			      max_tx_rate * 1000, 0, pktsize);

 	if (ret) {

 		dev_err(adap->pdev_dev, "Err %d for Traffic Class config\n",

@@ -4208,8 +4192,9 @@ static inline bool is_x_10g_port(const s

 {

 	unsigned int speeds, high_speeds;

-	speeds = FW_PORT_CAP_SPEED_V(FW_PORT_CAP_SPEED_G(lc->supported));

-	high_speeds = speeds & ~(FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G);

+	speeds = FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_G(lc->pcaps));

+	high_speeds = speeds &

+			~(FW_PORT_CAP32_SPEED_100M | FW_PORT_CAP32_SPEED_1G);

 	return high_speeds != 0;

 }

@@ -4590,18 +4575,24 @@ static void print_port_info(const struct

 	else if (adap->params.pci.speed == PCI_EXP_LNKSTA_CLS_8_0GB)

 		spd = " 8 GT/s";

-	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100M)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_100M)

 		bufp += sprintf(bufp, "100M/");

-	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_1G)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_1G)

 		bufp += sprintf(bufp, "1G/");

-	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_10G)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_10G)

 		bufp += sprintf(bufp, "10G/");

-	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_25G)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_25G)

 		bufp += sprintf(bufp, "25G/");

-	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_40G)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_40G)

 		bufp += sprintf(bufp, "40G/");

-	if (pi->link_cfg.supported & FW_PORT_CAP_SPEED_100G)

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_50G)

+		bufp += sprintf(bufp, "50G/");

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_100G)

 		bufp += sprintf(bufp, "100G/");

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_200G)

+		bufp += sprintf(bufp, "200G/");

+	if (pi->link_cfg.pcaps & FW_PORT_CAP32_SPEED_400G)

+		bufp += sprintf(bufp, "400G/");

 	if (bufp != buf)

 		--bufp;

 	sprintf(bufp, "BASE-%s", t4_get_port_type_description(pi->port_type));

@@ -4707,10 +4698,11 @@ static int config_mgmt_dev(struct pci_de

 	pi = netdev_priv(netdev);

 	pi->adapter = adap;

-	pi->port_id = adap->pf % adap->params.nports;

+	pi->tx_chan = adap->pf % adap->params.nports;

 	SET_NETDEV_DEV(netdev, &pdev->dev);

 	adap->port[0] = netdev;

+	pi->port_id = 0;

 	err = register_netdev(adap->port[0]);

 	if (err) {

--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

@@ -3835,59 +3835,133 @@ void t4_ulprx_read_la(struct adapter *ad

 	}

 }

-#define ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\

-		     FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_25G | \

-		     FW_PORT_CAP_SPEED_40G | FW_PORT_CAP_SPEED_100G | \

-		     FW_PORT_CAP_ANEG)

+#define ADVERT_MASK (FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_M) | \

+		     FW_PORT_CAP32_ANEG)

+

+/**

+ *	fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits

+ *	@caps16: a 16-bit Port Capabilities value

+ *

+ *	Returns the equivalent 32-bit Port Capabilities value.

+ */

+static fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16)

+{

+	fw_port_cap32_t caps32 = 0;

+

+	#define CAP16_TO_CAP32(__cap) \

+		do { \

+			if (caps16 & FW_PORT_CAP_##__cap) \

+				caps32 |= FW_PORT_CAP32_##__cap; \

+		} while (0)

+

+	CAP16_TO_CAP32(SPEED_100M);

+	CAP16_TO_CAP32(SPEED_1G);

+	CAP16_TO_CAP32(SPEED_25G);

+	CAP16_TO_CAP32(SPEED_10G);

+	CAP16_TO_CAP32(SPEED_40G);

+	CAP16_TO_CAP32(SPEED_100G);

+	CAP16_TO_CAP32(FC_RX);

+	CAP16_TO_CAP32(FC_TX);

+	CAP16_TO_CAP32(ANEG);

+	CAP16_TO_CAP32(MDIX);

+	CAP16_TO_CAP32(MDIAUTO);

+	CAP16_TO_CAP32(FEC_RS);

+	CAP16_TO_CAP32(FEC_BASER_RS);

+	CAP16_TO_CAP32(802_3_PAUSE);

+	CAP16_TO_CAP32(802_3_ASM_DIR);

+

+	#undef CAP16_TO_CAP32

+

+	return caps32;

+}

+

+/**

+ *	fwcaps32_to_caps16 - convert 32-bit Port Capabilities to 16-bits

+ *	@caps32: a 32-bit Port Capabilities value

+ *

+ *	Returns the equivalent 16-bit Port Capabilities value.  Note that

+ *	not all 32-bit Port Capabilities can be represented in the 16-bit

+ *	Port Capabilities and some fields/values may not make it.

+ */

+static fw_port_cap16_t fwcaps32_to_caps16(fw_port_cap32_t caps32)

+{

+	fw_port_cap16_t caps16 = 0;

+

+	#define CAP32_TO_CAP16(__cap) \

+		do { \

+			if (caps32 & FW_PORT_CAP32_##__cap) \

+				caps16 |= FW_PORT_CAP_##__cap; \

+		} while (0)

+

+	CAP32_TO_CAP16(SPEED_100M);

+	CAP32_TO_CAP16(SPEED_1G);

+	CAP32_TO_CAP16(SPEED_10G);

+	CAP32_TO_CAP16(SPEED_25G);

+	CAP32_TO_CAP16(SPEED_40G);

+	CAP32_TO_CAP16(SPEED_100G);

+	CAP32_TO_CAP16(FC_RX);

+	CAP32_TO_CAP16(FC_TX);

+	CAP32_TO_CAP16(802_3_PAUSE);

+	CAP32_TO_CAP16(802_3_ASM_DIR);

+	CAP32_TO_CAP16(ANEG);

+	CAP32_TO_CAP16(MDIX);

+	CAP32_TO_CAP16(MDIAUTO);

+	CAP32_TO_CAP16(FEC_RS);

+	CAP32_TO_CAP16(FEC_BASER_RS);

+

+	#undef CAP32_TO_CAP16

+

+	return caps16;

+}

 /* Translate Firmware Port Capabilities Pause specification to Common Code */

-static inline unsigned int fwcap_to_cc_pause(unsigned int fw_pause)

+static inline enum cc_pause fwcap_to_cc_pause(fw_port_cap32_t fw_pause)

 {

-	unsigned int cc_pause = 0;

+	enum cc_pause cc_pause = 0;

-	if (fw_pause & FW_PORT_CAP_FC_RX)

+	if (fw_pause & FW_PORT_CAP32_FC_RX)

 		cc_pause |= PAUSE_RX;

-	if (fw_pause & FW_PORT_CAP_FC_TX)

+	if (fw_pause & FW_PORT_CAP32_FC_TX)

 		cc_pause |= PAUSE_TX;

 	return cc_pause;

 }

 /* Translate Common Code Pause specification into Firmware Port Capabilities */

-static inline unsigned int cc_to_fwcap_pause(unsigned int cc_pause)

+static inline fw_port_cap32_t cc_to_fwcap_pause(enum cc_pause cc_pause)

 {

-	unsigned int fw_pause = 0;

+	fw_port_cap32_t fw_pause = 0;

 	if (cc_pause & PAUSE_RX)

-		fw_pause |= FW_PORT_CAP_FC_RX;

+		fw_pause |= FW_PORT_CAP32_FC_RX;

 	if (cc_pause & PAUSE_TX)

-		fw_pause |= FW_PORT_CAP_FC_TX;

+		fw_pause |= FW_PORT_CAP32_FC_TX;

 	return fw_pause;

 }

 /* Translate Firmware Forward Error Correction specification to Common Code */

-static inline unsigned int fwcap_to_cc_fec(unsigned int fw_fec)

+static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec)

 {

-	unsigned int cc_fec = 0;

+	enum cc_fec cc_fec = 0;

-	if (fw_fec & FW_PORT_CAP_FEC_RS)

+	if (fw_fec & FW_PORT_CAP32_FEC_RS)

 		cc_fec |= FEC_RS;

-	if (fw_fec & FW_PORT_CAP_FEC_BASER_RS)

+	if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)

 		cc_fec |= FEC_BASER_RS;

 	return cc_fec;

 }

 /* Translate Common Code Forward Error Correction specification to Firmware */

-static inline unsigned int cc_to_fwcap_fec(unsigned int cc_fec)

+static inline fw_port_cap32_t cc_to_fwcap_fec(enum cc_fec cc_fec)

 {

-	unsigned int fw_fec = 0;

+	fw_port_cap32_t fw_fec = 0;

 	if (cc_fec & FEC_RS)

-		fw_fec |= FW_PORT_CAP_FEC_RS;

+		fw_fec |= FW_PORT_CAP32_FEC_RS;

 	if (cc_fec & FEC_BASER_RS)

-		fw_fec |= FW_PORT_CAP_FEC_BASER_RS;

+		fw_fec |= FW_PORT_CAP32_FEC_BASER_RS;

 	return fw_fec;

 }

@@ -3906,13 +3980,13 @@ static inline unsigned int cc_to_fwcap_f

  *	- If auto-negotiation is off set the MAC to the proper speed/duplex/FC,

  *	  otherwise do it later based on the outcome of auto-negotiation.

  */

-int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port,

-		  struct link_config *lc)

+int t4_link_l1cfg(struct adapter *adapter, unsigned int mbox,

+		  unsigned int port, struct link_config *lc)

 {

-	struct fw_port_cmd c;

-	unsigned int fw_mdi = FW_PORT_CAP_MDI_V(FW_PORT_CAP_MDI_AUTO);

-	unsigned int fw_fc, cc_fec, fw_fec;

-	unsigned int rcap;

+	unsigned int fw_caps = adapter->params.fw_caps_support;

+	struct fw_port_cmd cmd;

+	unsigned int fw_mdi = FW_PORT_CAP32_MDI_V(FW_PORT_CAP32_MDI_AUTO);

+	fw_port_cap32_t fw_fc, cc_fec, fw_fec, rcap;

 	lc->link_ok = 0;

@@ -3929,36 +4003,41 @@ int t4_link_l1cfg(struct adapter *adap,

 	 * use whatever is in the current Requested FEC settings.

 	 */

 	if (lc->requested_fec & FEC_AUTO)

-		cc_fec = lc->auto_fec;

+		cc_fec = fwcap_to_cc_fec(lc->def_acaps);

 	else

 		cc_fec = lc->requested_fec;

 	fw_fec = cc_to_fwcap_fec(cc_fec);

 	/* Figure out what our Requested Port Capabilities are going to be.

 	 */

-	if (!(lc->supported & FW_PORT_CAP_ANEG)) {

-		rcap = (lc->supported & ADVERT_MASK) | fw_fc | fw_fec;

-		lc->fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);

+	if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) {

+		rcap = (lc->pcaps & ADVERT_MASK) | fw_fc | fw_fec;

+		lc->fc = lc->requested_fc & ~PAUSE_AUTONEG;

 		lc->fec = cc_fec;

 	} else if (lc->autoneg == AUTONEG_DISABLE) {

-		rcap = lc->requested_speed | fw_fc | fw_fec | fw_mdi;

-		lc->fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);

+		rcap = lc->speed_caps | fw_fc | fw_fec | fw_mdi;

+		lc->fc = lc->requested_fc & ~PAUSE_AUTONEG;

 		lc->fec = cc_fec;

 	} else {

-		rcap = lc->advertising | fw_fc | fw_fec | fw_mdi;

+		rcap = lc->acaps | fw_fc | fw_fec | fw_mdi;

 	}

 	/* And send that on to the Firmware ...

 	 */

-	memset(&c, 0, sizeof(c));

-	c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) |

-				     FW_CMD_REQUEST_F | FW_CMD_EXEC_F |

-				     FW_PORT_CMD_PORTID_V(port));

-	c.action_to_len16 =

-		cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_L1_CFG) |

-			    FW_LEN16(c));

-	c.u.l1cfg.rcap = cpu_to_be32(rcap);

-	return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);

+	memset(&cmd, 0, sizeof(cmd));

+	cmd.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PORT_CMD) |

+				       FW_CMD_REQUEST_F | FW_CMD_EXEC_F |

+				       FW_PORT_CMD_PORTID_V(port));

+	cmd.action_to_len16 =

+		cpu_to_be32(FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16

+						 ? FW_PORT_ACTION_L1_CFG

+						 : FW_PORT_ACTION_L1_CFG32) |

+			    FW_LEN16(cmd));

+	if (fw_caps == FW_CAPS16)

+		cmd.u.l1cfg.rcap = cpu_to_be32(fwcaps32_to_caps16(rcap));

+	else

+		cmd.u.l1cfg32.rcap32 = cpu_to_be32(rcap);

+	return t4_wr_mbox(adapter, mbox, &cmd, sizeof(cmd), NULL);

 }

 /**

@@ -3980,7 +4059,7 @@ int t4_restart_aneg(struct adapter *adap

 	c.action_to_len16 =

 		cpu_to_be32(FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_L1_CFG) |

 			    FW_LEN16(c));

-	c.u.l1cfg.rcap = cpu_to_be32(FW_PORT_CAP_ANEG);

+	c.u.l1cfg.rcap = cpu_to_be32(FW_PORT_CAP32_ANEG);

 	return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL);

 }

@@ -7697,6 +7776,98 @@ static const char *t4_link_down_rc_str(u

 }

 /**

+ * Return the highest speed set in the port capabilities, in Mb/s.

+ */

+static unsigned int fwcap_to_speed(fw_port_cap32_t caps)

+{

+	#define TEST_SPEED_RETURN(__caps_speed, __speed) \

+		do { \

+			if (caps & FW_PORT_CAP32_SPEED_##__caps_speed) \

+				return __speed; \

+		} while (0)

+

+	TEST_SPEED_RETURN(400G, 400000);

+	TEST_SPEED_RETURN(200G, 200000);

+	TEST_SPEED_RETURN(100G, 100000);

+	TEST_SPEED_RETURN(50G,   50000);

+	TEST_SPEED_RETURN(40G,   40000);

+	TEST_SPEED_RETURN(25G,   25000);

+	TEST_SPEED_RETURN(10G,   10000);

+	TEST_SPEED_RETURN(1G,     1000);

+	TEST_SPEED_RETURN(100M,    100);

+

+	#undef TEST_SPEED_RETURN

+

+	return 0;

+}

+

+/**

+ *	fwcap_to_fwspeed - return highest speed in Port Capabilities

+ *	@acaps: advertised Port Capabilities

+ *

+ *	Get the highest speed for the port from the advertised Port

+ *	Capabilities.  It will be either the highest speed from the list of

+ *	speeds or whatever user has set using ethtool.

+ */

+static fw_port_cap32_t fwcap_to_fwspeed(fw_port_cap32_t acaps)

+{

+	#define TEST_SPEED_RETURN(__caps_speed) \

+		do { \

+			if (acaps & FW_PORT_CAP32_SPEED_##__caps_speed) \

+				return FW_PORT_CAP32_SPEED_##__caps_speed; \

+		} while (0)

+

+	TEST_SPEED_RETURN(400G);

+	TEST_SPEED_RETURN(200G);

+	TEST_SPEED_RETURN(100G);

+	TEST_SPEED_RETURN(50G);

+	TEST_SPEED_RETURN(40G);

+	TEST_SPEED_RETURN(25G);

+	TEST_SPEED_RETURN(10G);

+	TEST_SPEED_RETURN(1G);

+	TEST_SPEED_RETURN(100M);

+

+	#undef TEST_SPEED_RETURN

+

+	return 0;

+}

+

+/**

+ *	lstatus_to_fwcap - translate old lstatus to 32-bit Port Capabilities

+ *	@lstatus: old FW_PORT_ACTION_GET_PORT_INFO lstatus value

+ *

+ *	Translates old FW_PORT_ACTION_GET_PORT_INFO lstatus field into new

+ *	32-bit Port Capabilities value.

+ */

+static fw_port_cap32_t lstatus_to_fwcap(u32 lstatus)

+{

+	fw_port_cap32_t linkattr = 0;

+

+	/* Unfortunately the format of the Link Status in the old

+	 * 16-bit Port Information message isn't the same as the

+	 * 16-bit Port Capabilities bitfield used everywhere else ...

+	 */

+	if (lstatus & FW_PORT_CMD_RXPAUSE_F)

+		linkattr |= FW_PORT_CAP32_FC_RX;

+	if (lstatus & FW_PORT_CMD_TXPAUSE_F)

+		linkattr |= FW_PORT_CAP32_FC_TX;

+	if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M))

+		linkattr |= FW_PORT_CAP32_SPEED_100M;

+	if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G))

+		linkattr |= FW_PORT_CAP32_SPEED_1G;

+	if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G))

+		linkattr |= FW_PORT_CAP32_SPEED_10G;

+	if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G))

+		linkattr |= FW_PORT_CAP32_SPEED_25G;

+	if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G))

+		linkattr |= FW_PORT_CAP32_SPEED_40G;

+	if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G))

+		linkattr |= FW_PORT_CAP32_SPEED_100G;

+

+	return linkattr;

+}

+

+/**

  *	t4_handle_get_port_info - process a FW reply message

  *	@pi: the port info

  *	@rpl: start of the FW message

@@ -7705,76 +7876,123 @@ static const char *t4_link_down_rc_str(u

  */

 void t4_handle_get_port_info(struct port_info *pi, const __be64 *rpl)

 {

-	const struct fw_port_cmd *p = (const void *)rpl;

-	unsigned int acaps = be16_to_cpu(p->u.info.acap);

-	struct adapter *adap = pi->adapter;

+	const struct fw_port_cmd *cmd = (const void *)rpl;

+	int action = FW_PORT_CMD_ACTION_G(be32_to_cpu(cmd->action_to_len16));

+	struct adapter *adapter = pi->adapter;

+	struct link_config *lc = &pi->link_cfg;

+	int link_ok, linkdnrc;

+	enum fw_port_type port_type;

+	enum fw_port_module_type mod_type;

+	unsigned int speed, fc, fec;

+	fw_port_cap32_t pcaps, acaps, lpacaps, linkattr;

+

+	/* Extract the various fields from the Port Information message.

+	 */

+	switch (action) {

+	case FW_PORT_ACTION_GET_PORT_INFO: {

+		u32 lstatus = be32_to_cpu(cmd->u.info.lstatus_to_modtype);

+

+		link_ok = (lstatus & FW_PORT_CMD_LSTATUS_F) != 0;

+		linkdnrc = FW_PORT_CMD_LINKDNRC_G(lstatus);

+		port_type = FW_PORT_CMD_PTYPE_G(lstatus);

+		mod_type = FW_PORT_CMD_MODTYPE_G(lstatus);

+		pcaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.pcap));

+		acaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.acap));

+		lpacaps = fwcaps16_to_caps32(be16_to_cpu(cmd->u.info.lpacap));