From 54cff6479fd87e4a941e3686d93faa734586922b Mon Sep 17 00:00:00 2001

From: Zhi Wang <zhi.a.wang@intel.com>

Date: Sun, 10 Sep 2017 16:40:04 +0800

Subject: [PATCH] drm/i915/gvt: Make elsp_dwords in the right order

Git-commit: 54cff6479fd87e4a941e3686d93faa734586922b

Patch-mainline: v4.16-rc1

References: FATE#322643 bsc#1055900

The context descriptors in elsp_dwords are stored in a reversed order and

the definition of context descriptor is also reversed. The revesred stuff

is hard to be used and might cause misunderstanding. Make them in the right

oder for following code re-factoring.

Tested on my SKL NUC.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>

Acked-by: Takashi Iwai <tiwai@suse.de>

---

 drivers/gpu/drm/i915/gvt/execlist.c |   22 +++++++++++-----------

 drivers/gpu/drm/i915/gvt/execlist.h |    8 ++++----

 drivers/gpu/drm/i915/gvt/handlers.c |    2 +-

 3 files changed, 16 insertions(+), 16 deletions(-)

--- a/drivers/gpu/drm/i915/gvt/execlist.c

+++ b/drivers/gpu/drm/i915/gvt/execlist.c

@@ -517,8 +517,8 @@ static int prepare_execlist_workload(str

 	if (!workload->emulate_schedule_in)

 		return 0;

-	ctx[0] = *get_desc_from_elsp_dwords(&workload->elsp_dwords, 1);

-	ctx[1] = *get_desc_from_elsp_dwords(&workload->elsp_dwords, 0);

+	ctx[0] = *get_desc_from_elsp_dwords(&workload->elsp_dwords, 0);

+	ctx[1] = *get_desc_from_elsp_dwords(&workload->elsp_dwords, 1);

 	ret = emulate_execlist_schedule_in(&vgpu->execlist[ring_id], ctx);

 	if (!ret)

@@ -776,21 +776,21 @@ static int submit_context(struct intel_v

 int intel_vgpu_submit_execlist(struct intel_vgpu *vgpu, int ring_id)

 {

 	struct intel_vgpu_execlist *execlist = &vgpu->execlist[ring_id];

-	struct execlist_ctx_descriptor_format desc[2];

+	struct execlist_ctx_descriptor_format *desc[2];

 	int i, ret;

-	desc[0] = *get_desc_from_elsp_dwords(&execlist->elsp_dwords, 1);

-	desc[1] = *get_desc_from_elsp_dwords(&execlist->elsp_dwords, 0);

+	desc[0] = get_desc_from_elsp_dwords(&execlist->elsp_dwords, 0);

+	desc[1] = get_desc_from_elsp_dwords(&execlist->elsp_dwords, 1);

-	if (!desc[0].valid) {

+	if (!desc[0]->valid) {

 		gvt_vgpu_err("invalid elsp submission, desc0 is invalid\n");

 		goto inv_desc;

 	}

 	for (i = 0; i < ARRAY_SIZE(desc); i++) {

-		if (!desc[i].valid)

+		if (!desc[i]->valid)

 			continue;

-		if (!desc[i].privilege_access) {

+		if (!desc[i]->privilege_access) {

 			gvt_vgpu_err("unexpected GGTT elsp submission\n");

 			goto inv_desc;

 		}

@@ -798,9 +798,9 @@ int intel_vgpu_submit_execlist(struct in

 	/* submit workload */

 	for (i = 0; i < ARRAY_SIZE(desc); i++) {

-		if (!desc[i].valid)

+		if (!desc[i]->valid)

 			continue;

-		ret = submit_context(vgpu, ring_id, &desc[i], i == 0);

+		ret = submit_context(vgpu, ring_id, desc[i], i == 0);

 		if (ret) {

 			gvt_vgpu_err("failed to submit desc %d\n", i);

 			return ret;

@@ -811,7 +811,7 @@ int intel_vgpu_submit_execlist(struct in

 inv_desc:

 	gvt_vgpu_err("descriptors content: desc0 %08x %08x desc1 %08x %08x\n",

-		     desc[0].udw, desc[0].ldw, desc[1].udw, desc[1].ldw);

+		     desc[0]->udw, desc[0]->ldw, desc[1]->udw, desc[1]->ldw);

 	return -EINVAL;

 }

--- a/drivers/gpu/drm/i915/gvt/execlist.h

+++ b/drivers/gpu/drm/i915/gvt/execlist.h

@@ -37,10 +37,6 @@

 struct execlist_ctx_descriptor_format {

 	union {

-		u32 udw;

-		u32 context_id;

-	};

-	union {

 		u32 ldw;

 		struct {

 			u32 valid                  : 1;

@@ -54,6 +50,10 @@ struct execlist_ctx_descriptor_format {

 			u32 lrca                   : 20;

 		};

 	};

+	union {

+		u32 udw;

+		u32 context_id;

+	};

 };

 struct execlist_status_format {

--- a/drivers/gpu/drm/i915/gvt/handlers.c

+++ b/drivers/gpu/drm/i915/gvt/handlers.c

@@ -1446,7 +1446,7 @@ static int elsp_mmio_write(struct intel_

 	execlist = &vgpu->execlist[ring_id];

-	execlist->elsp_dwords.data[execlist->elsp_dwords.index] = data;

+	execlist->elsp_dwords.data[3 - execlist->elsp_dwords.index] = data;

 	if (execlist->elsp_dwords.index == 3) {

 		ret = intel_vgpu_submit_execlist(vgpu, ring_id);

 		if(ret)