From 08783aa7693f55619859f4f63f384abf17cb58c5 Mon Sep 17 00:00:00 2001

From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>

Date: Thu, 24 Feb 2022 15:21:42 +0200

Subject: drm/i915: s/JSP2/ICP2/ PCH

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Git-commit: 08783aa7693f55619859f4f63f384abf17cb58c5

Patch-mainline: v5.17-rc7

References: bsc#1152489

This JSP2 PCH actually seems to be some special Apple

specific ICP variant rather than a JSP. Make it so. Or at

least all the references to it seem to be some Apple ICL

machines. Didn't manage to find these PCI IDs in any

public chipset docs unfortunately.

The only thing we're losing here with this JSP->ICP change

is Wa_14011294188, but based on the HSD that isn't actually

needed on any ICP based design (including JSP), only TGP

based stuff (including MCC) really need it. The documented

w/a just never made that distinction because Windows didn't

want to differentiate between JSP and MCC (not sure how

they handle hpd/ddc/etc. then though...).

Cc: stable@vger.kernel.org

Cc: Matt Roper <matthew.d.roper@intel.com>

Cc: Vivek Kasireddy <vivek.kasireddy@intel.com>

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4226

Fixes: 943682e3bd19 ("drm/i915: Introduce Jasper Lake PCH")

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Link: https://patchwork.freedesktop.org/patch/msgid/20220224132142.12927-1-ville.syrjala@linux.intel.com

Acked-by: Vivek Kasireddy <vivek.kasireddy@intel.com>

Tested-by: Tomas Bzatek <bugs@bzatek.net>

(cherry picked from commit 53581504a8e216d435f114a4f2596ad0dfd902fc)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Acked-by: Thomas Zimmermann <tzimmermann@suse.de>

---

 drivers/gpu/drm/i915/intel_pch.c |    2 +-

 drivers/gpu/drm/i915/intel_pch.h |    2 +-

 2 files changed, 2 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/i915/intel_pch.c

+++ b/drivers/gpu/drm/i915/intel_pch.c

@@ -110,6 +110,7 @@ intel_pch_type(const struct drm_i915_pri

 		/* Comet Lake V PCH is based on KBP, which is SPT compatible */

 		return PCH_SPT;

 	case INTEL_PCH_ICP_DEVICE_ID_TYPE:

+	case INTEL_PCH_ICP2_DEVICE_ID_TYPE:

 		drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n");

 		drm_WARN_ON(&dev_priv->drm, !IS_ICELAKE(dev_priv));

 		return PCH_ICP;

@@ -125,7 +126,6 @@ intel_pch_type(const struct drm_i915_pri

 			    !IS_GEN9_BC(dev_priv));

 		return PCH_TGP;

 	case INTEL_PCH_JSP_DEVICE_ID_TYPE:

-	case INTEL_PCH_JSP2_DEVICE_ID_TYPE:

 		drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");

 		drm_WARN_ON(&dev_priv->drm, !IS_ELKHARTLAKE(dev_priv));

 		return PCH_JSP;

--- a/drivers/gpu/drm/i915/intel_pch.h

+++ b/drivers/gpu/drm/i915/intel_pch.h

@@ -48,11 +48,11 @@ enum intel_pch {

 #define INTEL_PCH_CMP2_DEVICE_ID_TYPE		0x0680

 #define INTEL_PCH_CMP_V_DEVICE_ID_TYPE		0xA380

 #define INTEL_PCH_ICP_DEVICE_ID_TYPE		0x3480

+#define INTEL_PCH_ICP2_DEVICE_ID_TYPE		0x3880

 #define INTEL_PCH_MCC_DEVICE_ID_TYPE		0x4B00

 #define INTEL_PCH_TGP_DEVICE_ID_TYPE		0xA080

 #define INTEL_PCH_TGP2_DEVICE_ID_TYPE		0x4380

 #define INTEL_PCH_JSP_DEVICE_ID_TYPE		0x4D80

-#define INTEL_PCH_JSP2_DEVICE_ID_TYPE		0x3880

 #define INTEL_PCH_P2X_DEVICE_ID_TYPE		0x7100

 #define INTEL_PCH_P3X_DEVICE_ID_TYPE		0x7000

 #define INTEL_PCH_QEMU_DEVICE_ID_TYPE		0x2900 /* qemu q35 has 2918 */