From: Selvin Xavier <selvin.xavier@broadcom.com>

Date: Wed, 15 Sep 2021 05:32:39 -0700

Subject: RDMA/bnxt_re: Fix FRMR issue with single page MR allocation

Patch-mainline: v5.16-rc1

Git-commit: 2b4ccce6cafae8eff0daec06b7652d9ab75f692f

References: jsc#SLE-18977

When the FRMR is allocated with single page, driver is attempting to

create a level 0 HWQ and not allocating any page because the nopte field

is set. This causes the crash during post_send as the pbl is not

populated.

To avoid this crash, check for the nopte bit during HWQ creation with

single page and create a level 1 page table and populate the pbl address

correctly.

Link: https://lore.kernel.org/r/1631709163-2287-9-git-send-email-selvin.xavier@broadcom.com

Reviewed-by: Leon Romanovsky <leonro@nvidia.com>

Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>

---

 drivers/infiniband/hw/bnxt_re/qplib_res.c |    5 +++--

 1 file changed, 3 insertions(+), 2 deletions(-)

--- a/drivers/infiniband/hw/bnxt_re/qplib_res.c

+++ b/drivers/infiniband/hw/bnxt_re/qplib_res.c

@@ -228,15 +228,16 @@ int bnxt_qplib_alloc_init_hwq(struct bnx

 				npages++;

 	}

-	if (npages == MAX_PBL_LVL_0_PGS) {

+	if (npages == MAX_PBL_LVL_0_PGS && !hwq_attr->sginfo->nopte) {

 		/* This request is Level 0, map PTE */

 		rc = __alloc_pbl(res, &hwq->pbl[PBL_LVL_0], hwq_attr->sginfo);

 		if (rc)

 			goto fail;

 		hwq->level = PBL_LVL_0;

+		goto done;

 	}

-	if (npages > MAX_PBL_LVL_0_PGS) {

+	if (npages >= MAX_PBL_LVL_0_PGS) {

 		if (npages > MAX_PBL_LVL_1_PGS) {

 			u32 flag = (hwq_attr->type == HWQ_TYPE_L2_CMPL) ?

 				    0 : PTU_PTE_VALID;