From ebd0edad1cdfc0cee05632ca032b4a36f54356bf Mon Sep 17 00:00:00 2001

From: Patrisious Haddad <phaddad@nvidia.com>

Date: Wed, 6 Oct 2021 12:31:53 +0300

Subject: [PATCH] RDMA/mlx5: Set user priority for DCT

Git-commit: 1ab52ac1e9bc9391f592c9fa8340a6e3e9c36286

Patch-mainline: v5.15

References: stable-5.14.16

commit 1ab52ac1e9bc9391f592c9fa8340a6e3e9c36286 upstream.

Currently, the driver doesn't set the PCP-based priority for DCT, hence

DCT response packets are transmitted without user priority.

Fix it by setting user provided priority in the eth_prio field in the DCT

context, which in turn sets the value in the transmitted packet.

Fixes: 776a3906b692 ("IB/mlx5: Add support for DC target QP")

Link: https://lore.kernel.org/r/5fd2d94a13f5742d8803c218927322257d53205c.1633512672.git.leonro@nvidia.com

Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>

Reviewed-by: Maor Gottlieb <maorg@nvidia.com>

Signed-off-by: Leon Romanovsky <leonro@nvidia.com>

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Acked-by: Takashi Iwai <tiwai@suse.de>

---

 drivers/infiniband/hw/mlx5/qp.c | 2 ++

 1 file changed, 2 insertions(+)

diff --git a/drivers/infiniband/hw/mlx5/qp.c b/drivers/infiniband/hw/mlx5/qp.c

index fd88b9ae96fe..80d989edb7dd 100644

--- a/drivers/infiniband/hw/mlx5/qp.c

+++ b/drivers/infiniband/hw/mlx5/qp.c

@@ -4309,6 +4309,8 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr,

 		MLX5_SET(dctc, dctc, mtu, attr->path_mtu);

 		MLX5_SET(dctc, dctc, my_addr_index, attr->ah_attr.grh.sgid_index);

 		MLX5_SET(dctc, dctc, hop_limit, attr->ah_attr.grh.hop_limit);

+		if (attr->ah_attr.type == RDMA_AH_ATTR_TYPE_ROCE)

+			MLX5_SET(dctc, dctc, eth_prio, attr->ah_attr.sl & 0x7);

 		err = mlx5_core_create_dct(dev, &qp->dct.mdct, qp->dct.in,

 					   MLX5_ST_SZ_BYTES(create_dct_in), out,

-- 

2.26.2