From e0441e2be1553d34341bc5b60d279f3561d1b8b7 Mon Sep 17 00:00:00 2001

From: Giovanni Cabiddu <giovanni.cabiddu@intel.com>

Date: Thu, 16 Dec 2021 09:13:11 +0000

Subject: [PATCH] crypto: qat - get compression extended capabilities

Git-commit: e0441e2be1553d34341bc5b60d279f3561d1b8b7

Patch-mainline: v5.17-rc1

References: jsc#PED-1073

Get compression extended capabilities mask from firmware through the

init/admin channel.

These capabilities are stored in the accel_dev structure and will be

communicated to VF through the PFVF channel.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>

Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>

Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>

Reviewed-by: Marco Chiappero <marco.chiappero@intel.com>

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

Signed-off-by: Torsten Duwe <duwe@suse.de>

---

 .../crypto/qat/qat_common/adf_accel_devices.h |  1 +

 drivers/crypto/qat/qat_common/adf_admin.c     | 37 +++++++++++++++++++

 .../qat/qat_common/icp_qat_fw_init_admin.h    |  4 +-

 3 files changed, 41 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h

index a1809a7d1c90d..2c380fa10a094 100644

--- a/drivers/crypto/qat/qat_common/adf_accel_devices.h

+++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h

@@ -198,6 +198,7 @@ struct adf_hw_device_data {

 	u32 fuses;

 	u32 straps;

 	u32 accel_capabilities_mask;

+	u32 extended_dc_capabilities;

 	u32 instance_id;

 	u16 accel_mask;

 	u32 ae_mask;

diff --git a/drivers/crypto/qat/qat_common/adf_admin.c b/drivers/crypto/qat/qat_common/adf_admin.c

index 43680e1782427..c381b89d548d1 100644

--- a/drivers/crypto/qat/qat_common/adf_admin.c

+++ b/drivers/crypto/qat/qat_common/adf_admin.c

@@ -194,6 +194,35 @@ static int adf_set_fw_constants(struct adf_accel_dev *accel_dev)

 	return adf_send_admin(accel_dev, &req, &resp, ae_mask);

 }

+static int adf_get_dc_capabilities(struct adf_accel_dev *accel_dev,

+				   u32 *capabilities)

+{

+	struct adf_hw_device_data *hw_device = accel_dev->hw_device;

+	struct icp_qat_fw_init_admin_resp resp;

+	struct icp_qat_fw_init_admin_req req;

+	unsigned long ae_mask;

+	unsigned long ae;

+	int ret;

+

+	/* Target only service accelerator engines */

+	ae_mask = hw_device->ae_mask & ~hw_device->admin_ae_mask;

+

+	memset(&req, 0, sizeof(req));

+	memset(&resp, 0, sizeof(resp));

+	req.cmd_id = ICP_QAT_FW_COMP_CAPABILITY_GET;

+

+	*capabilities = 0;

+	for_each_set_bit(ae, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) {

+		ret = adf_send_admin(accel_dev, &req, &resp, 1ULL << ae);

+		if (ret)

+			return ret;

+

+		*capabilities |= resp.extended_features;

+	}

+

+	return 0;

+}

+

 /**

  * adf_send_admin_init() - Function sends init message to FW

  * @accel_dev: Pointer to acceleration device.

@@ -204,8 +233,16 @@ static int adf_set_fw_constants(struct adf_accel_dev *accel_dev)

  */

 int adf_send_admin_init(struct adf_accel_dev *accel_dev)

 {

+	u32 dc_capabilities = 0;

 	int ret;

+	ret = adf_get_dc_capabilities(accel_dev, &dc_capabilities);

+	if (ret) {

+		dev_err(&GET_DEV(accel_dev), "Cannot get dc capabilities\n");

+		return ret;

+	}

+	accel_dev->hw_device->extended_dc_capabilities = dc_capabilities;

+

 	ret = adf_set_fw_constants(accel_dev);

 	if (ret)

 		return ret;

diff --git a/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h b/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h

index f05ad17fbdd6b..afe59a7684ac5 100644

--- a/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h

+++ b/drivers/crypto/qat/qat_common/icp_qat_fw_init_admin.h

@@ -14,7 +14,8 @@ enum icp_qat_fw_init_admin_cmd_id {

 	ICP_QAT_FW_COUNTERS_GET = 5,

 	ICP_QAT_FW_LOOPBACK = 6,

 	ICP_QAT_FW_HEARTBEAT_SYNC = 7,

-	ICP_QAT_FW_HEARTBEAT_GET = 8

+	ICP_QAT_FW_HEARTBEAT_GET = 8,

+	ICP_QAT_FW_COMP_CAPABILITY_GET = 9,

 };

 enum icp_qat_fw_init_admin_resp_status {

@@ -52,6 +53,7 @@ struct icp_qat_fw_init_admin_resp {

 			__u16 version_minor_num;

 			__u16 version_major_num;

 		};

+		__u32 extended_features;

 	};

 	__u64 opaque_data;

 	union {

-- 

2.35.3