From dbd1003d1252db5973dddf20b24bb0106ac52aa2 Mon Sep 17 00:00:00 2001

From: Changfeng <Changfeng.Zhu@amd.com>

Date: Fri, 14 May 2021 15:28:25 +0800

Subject: [PATCH] drm/amdgpu: disable 3DCGCG on picasso/raven1 to avoid compute hang

Git-commit: dbd1003d1252db5973dddf20b24bb0106ac52aa2

Patch-mainline: v5.13-rc3

References: git-fixes

There is problem with 3DCGCG firmware and it will cause compute test

hang on picasso/raven1. It needs to disable 3DCGCG in driver to avoid

compute hang.

Signed-off-by: Changfeng <Changfeng.Zhu@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Reviewed-by: Huang Rui <ray.huang@amd.com>

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

Cc: stable@vger.kernel.org

Acked-by: Takashi Iwai <tiwai@suse.de>

---

 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++---

 drivers/gpu/drm/amd/amdgpu/soc15.c    |  2 --

 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index a078a38c2cee..516467e962b7 100644

--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

@@ -4943,7 +4943,7 @@ static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,

 	amdgpu_gfx_rlc_enter_safe_mode(adev);

 	/* Enable 3D CGCG/CGLS */

-	if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG)) {

+	if (enable) {

 		/* write cmd to clear cgcg/cgls ov */

 		def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);

 		/* unset CGCG override */

@@ -4955,8 +4955,12 @@ static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,

 		/* enable 3Dcgcg FSM(0x0000363f) */

 		def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D);

-		data = (0x36 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |

-			RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK;

+		if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGCG)

+			data = (0x36 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT) |

+				RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK;

+		else

+			data = 0x0 << RLC_CGCG_CGLS_CTRL_3D__CGCG_GFX_IDLE_THRESHOLD__SHIFT;

+

 		if (adev->cg_flags & AMD_CG_SUPPORT_GFX_3D_CGLS)

 			data |= (0x000F << RLC_CGCG_CGLS_CTRL_3D__CGLS_REP_COMPANSAT_DELAY__SHIFT) |

 				RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK;

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c

index 8e1b9a40839f..980675052b53 100644

--- a/drivers/gpu/drm/amd/amdgpu/soc15.c

+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c

@@ -1392,7 +1392,6 @@ static int soc15_common_early_init(void *handle)

 			adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |

 				AMD_CG_SUPPORT_GFX_MGLS |

 				AMD_CG_SUPPORT_GFX_CP_LS |

-				AMD_CG_SUPPORT_GFX_3D_CGCG |

 				AMD_CG_SUPPORT_GFX_3D_CGLS |

 				AMD_CG_SUPPORT_GFX_CGCG |

 				AMD_CG_SUPPORT_GFX_CGLS |

@@ -1412,7 +1411,6 @@ static int soc15_common_early_init(void *handle)

 				AMD_CG_SUPPORT_GFX_MGLS |

 				AMD_CG_SUPPORT_GFX_RLC_LS |

 				AMD_CG_SUPPORT_GFX_CP_LS |

-				AMD_CG_SUPPORT_GFX_3D_CGCG |

 				AMD_CG_SUPPORT_GFX_3D_CGLS |

 				AMD_CG_SUPPORT_GFX_CGCG |

 				AMD_CG_SUPPORT_GFX_CGLS |

-- 

2.26.2