From 08c7c122ad90799cc3ae674e7f29f236f91063ce Mon Sep 17 00:00:00 2001

From: Matthew Auld <matthew.auld@intel.com>

Date: Mon, 6 Dec 2021 11:25:37 +0000

Subject: [PATCH] drm/i915/migrate: fix offset calculation

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Git-commit: 08c7c122ad90799cc3ae674e7f29f236f91063ce

Patch-mainline: v5.17-rc1

References: git-fixes

Ensure we add the engine base only after we calculate the qword offset

into the PTE window.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>

Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>

Cc: Ramalingam C <ramalingam.c@intel.com>

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

Link: https://patchwork.freedesktop.org/patch/msgid/20211206112539.3149779-2-matthew.auld@intel.com

Acked-by: Takashi Iwai <tiwai@suse.de>

---

 drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +-

 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c b/drivers/gpu/drm/i915/gt/intel_migrate.c

index 0f94dedc1599..64afb9a52013 100644

--- a/drivers/gpu/drm/i915/gt/intel_migrate.c

+++ b/drivers/gpu/drm/i915/gt/intel_migrate.c

@@ -279,10 +279,10 @@ static int emit_pte(struct i915_request *rq,

 	GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);

 	/* Compute the page directory offset for the target address range */

-	offset += (u64)rq->engine->instance << 32;

 	offset >>= 12;

 	offset *= sizeof(u64);

 	offset += 2 * CHUNK_SZ;

+	offset += (u64)rq->engine->instance << 32;

 	cs = intel_ring_begin(rq, 6);

 	if (IS_ERR(cs))

-- 

2.35.3