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Takashi Iwai |
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From 43cb86799ff03e9819c07f37f72f80f8246ad7ed Mon Sep 17 00:00:00 2001
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Takashi Iwai |
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Takashi Iwai |
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Date: Sun, 8 Dec 2019 18:18:31 +0100
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Takashi Iwai |
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Subject: [PATCH] drm: meson: venc: cvbs: fix CVBS mode matching
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Git-commit: 43cb86799ff03e9819c07f37f72f80f8246ad7ed
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Patch-mainline: v5.5-rc2
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References: bsc#1051510
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With commit 222ec1618c3ace ("drm: Add aspect ratio parsing in DRM
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layer") the drm core started honoring the picture_aspect_ratio field
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when comparing two drm_display_modes. Prior to that it was ignored.
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When the CVBS encoder driver was initially submitted there was no aspect
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ratio check.
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Switch from drm_mode_equal() to drm_mode_match() without
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DRM_MODE_MATCH_ASPECT_RATIO to fix "kmscube" and X.org output using the
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CVBS connector. When (for example) kmscube sets the output mode when
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using the CVBS connector it passes HDMI_PICTURE_ASPECT_NONE, making the
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drm_mode_equal() fail as it include the aspect ratio.
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Prior to this patch kmscube reported:
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failed to set mode: Invalid argument
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The CVBS mode checking in the sun4i (drivers/gpu/drm/sun4i/sun4i_tv.c
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sun4i_tv_mode_to_drm_mode) and ZTE (drivers/gpu/drm/zte/zx_tvenc.c
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tvenc_mode_{pal,ntsc}) drivers don't set the "picture_aspect_ratio" at
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all. The Meson VPU driver does not rely on the aspect ratio for the CVBS
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output so we can safely decouple it from the hdmi_picture_aspect
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setting.
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Cc: <stable@vger.kernel.org>
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Fixes: 222ec1618c3ace ("drm: Add aspect ratio parsing in DRM layer")
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Fixes: bbbe775ec5b5da ("drm: Add support for Amlogic Meson Graphic Controller")
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Acked-by: Neil Armstrong <narmstrong@baylibre.com>
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[narmstrong: squashed with drm: meson: venc: cvbs: deduplicate the meson_cvbs_mode lookup code]
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Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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Link: https://patchwork.freedesktop.org/patch/msgid/20191208171832.1064772-3-martin.blumenstingl@googlemail.com
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Acked-by: Takashi Iwai <tiwai@suse.de>
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---
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drivers/gpu/drm/meson/meson_venc_cvbs.c | 48 ++++++++++++++++++---------------
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1 file changed, 27 insertions(+), 21 deletions(-)
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diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c
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index 9ab27aecfcf3..1bd6b6d15ffb 100644
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--- a/drivers/gpu/drm/meson/meson_venc_cvbs.c
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+++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c
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@@ -64,6 +64,25 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = {
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},
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};
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+static const struct meson_cvbs_mode *
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+meson_cvbs_get_mode(const struct drm_display_mode *req_mode)
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+{
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+ int i;
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+
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+ for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
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+ struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
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+
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+ if (drm_mode_match(req_mode, &meson_mode->mode,
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+ DRM_MODE_MATCH_TIMINGS |
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+ DRM_MODE_MATCH_CLOCK |
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+ DRM_MODE_MATCH_FLAGS |
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+ DRM_MODE_MATCH_3D_FLAGS))
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+ return meson_mode;
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+ }
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+
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+ return NULL;
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+}
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+
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/* Connector */
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static void meson_cvbs_connector_destroy(struct drm_connector *connector)
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@@ -136,14 +155,8 @@ static int meson_venc_cvbs_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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- int i;
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-
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- for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
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- struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
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-
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- if (drm_mode_equal(&crtc_state->mode, &meson_mode->mode))
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- return 0;
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- }
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+ if (meson_cvbs_get_mode(&crtc_state->mode))
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+ return 0;
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return -EINVAL;
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}
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@@ -191,24 +204,17 @@ static void meson_venc_cvbs_encoder_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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+ const struct meson_cvbs_mode *meson_mode = meson_cvbs_get_mode(mode);
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struct meson_venc_cvbs *meson_venc_cvbs =
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encoder_to_meson_venc_cvbs(encoder);
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struct meson_drm *priv = meson_venc_cvbs->priv;
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- int i;
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- for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) {
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- struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i];
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+ if (meson_mode) {
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+ meson_venci_cvbs_mode_set(priv, meson_mode->enci);
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- if (drm_mode_equal(mode, &meson_mode->mode)) {
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- meson_venci_cvbs_mode_set(priv,
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- meson_mode->enci);
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-
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- /* Setup 27MHz vclk2 for ENCI and VDAC */
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- meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS,
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- MESON_VCLK_CVBS, MESON_VCLK_CVBS,
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- MESON_VCLK_CVBS, true);
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- break;
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- }
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+ /* Setup 27MHz vclk2 for ENCI and VDAC */
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+ meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS, MESON_VCLK_CVBS,
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+ MESON_VCLK_CVBS, MESON_VCLK_CVBS, true);
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}
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}
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--
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2.16.4
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