From 1ac7a04f4505bee0d54a81d34aea88d2f9604ec3 Mon Sep 17 00:00:00 2001

From: Brandon Wyman <bjwyman@gmail.com>

Date: Fri, 6 Aug 2021 22:51:31 +0000

Subject: [PATCH] hwmon: (pmbus/ibm-cffps) Fix write bits for LED control

Git-commit: 76b72736f574ec38b3e94603ea5f74b1853f26b0

Patch-mainline: v5.15-rc1

References: stable-5.14.6

[ Upstream commit 76b72736f574ec38b3e94603ea5f74b1853f26b0 ]

When doing a PMBus write for the LED control on the IBM Common Form

Factor Power Supplies (ibm-cffps), the DAh command requires that bit 7

be low and bit 6 be high in order to indicate that you are truly

attempting to do a write.

Signed-off-by: Brandon Wyman <bjwyman@gmail.com>

Link: https://lore.kernel.org/r/20210806225131.1808759-1-bjwyman@gmail.com

Signed-off-by: Guenter Roeck <linux@roeck-us.net>

Signed-off-by: Sasha Levin <sashal@kernel.org>

Acked-by: Takashi Iwai <tiwai@suse.de>

---

 drivers/hwmon/pmbus/ibm-cffps.c | 6 +++---

 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c

index 5668d8305b78..df712ce4b164 100644

--- a/drivers/hwmon/pmbus/ibm-cffps.c

+++ b/drivers/hwmon/pmbus/ibm-cffps.c

@@ -50,9 +50,9 @@

 #define CFFPS_MFR_VAUX_FAULT			BIT(6)

 #define CFFPS_MFR_CURRENT_SHARE_WARNING		BIT(7)

-#define CFFPS_LED_BLINK				BIT(0)

-#define CFFPS_LED_ON				BIT(1)

-#define CFFPS_LED_OFF				BIT(2)

+#define CFFPS_LED_BLINK				(BIT(0) | BIT(6))

+#define CFFPS_LED_ON				(BIT(1) | BIT(6))

+#define CFFPS_LED_OFF				(BIT(2) | BIT(6))

 #define CFFPS_BLINK_RATE_MS			250

 enum {

-- 

2.26.2