From: David Woodhouse <dwmw@amazon.co.uk>

Date: Thu, 24 Sep 2020 15:08:42 +0100

Subject: iommu/vt-d: Gracefully handle DMAR units with no supported address

 widths

Git-commit: c40aaaac1018ff1382f2d35df5129a6bcea3df6b

Patch-mainline: v5.10-rc1

References: bsc#1181001, jsc#ECO-3191

Instead of bailing out completely, such a unit can still be used for

interrupt remapping.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>

Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>

Link: https://lore.kernel.org/linux-iommu/549928db2de6532117f36c9c810373c14cf76f51.camel@infradead.org/

Signed-off-by: Joerg Roedel <jroedel@suse.de>

---

 drivers/iommu/dmar.c |   46 +++++++++++++++++++++++++++++++---------------

 1 file changed, 31 insertions(+), 15 deletions(-)

--- a/drivers/iommu/dmar.c

+++ b/drivers/iommu/dmar.c

@@ -1031,8 +1031,8 @@ static int alloc_iommu(struct dmar_drhd_

 {

 	struct intel_iommu *iommu;

 	u32 ver, sts;

-	int agaw = 0;

-	int msagaw = 0;

+	int agaw = -1;

+	int msagaw = -1;

 	int err;

 	if (!drhd->reg_base_addr) {

@@ -1057,17 +1057,28 @@ static int alloc_iommu(struct dmar_drhd_

 	}

 	err = -EINVAL;

-	agaw = iommu_calculate_agaw(iommu);

-	if (agaw < 0) {

-		pr_err("Cannot get a valid agaw for iommu (seq_id = %d)\n",

-			iommu->seq_id);

-		goto err_unmap;

-	}

-	msagaw = iommu_calculate_max_sagaw(iommu);

-	if (msagaw < 0) {

-		pr_err("Cannot get a valid max agaw for iommu (seq_id = %d)\n",

-			iommu->seq_id);

-		goto err_unmap;

+	if (cap_sagaw(iommu->cap) == 0) {

+		pr_info("%s: No supported address widths. Not attempting DMA translation.\n",

+			iommu->name);

+		drhd->ignored = 1;

+	}

+

+	if (!drhd->ignored) {

+		agaw = iommu_calculate_agaw(iommu);

+		if (agaw < 0) {

+			pr_err("Cannot get a valid agaw for iommu (seq_id = %d)\n",

+			       iommu->seq_id);

+			drhd->ignored = 1;

+		}

+	}

+	if (!drhd->ignored) {

+		msagaw = iommu_calculate_max_sagaw(iommu);

+		if (msagaw < 0) {

+			pr_err("Cannot get a valid max agaw for iommu (seq_id = %d)\n",

+			       iommu->seq_id);

+			drhd->ignored = 1;

+			agaw = -1;

+		}

 	}

 	iommu->agaw = agaw;

 	iommu->msagaw = msagaw;

@@ -1094,7 +1105,12 @@ static int alloc_iommu(struct dmar_drhd_

 	raw_spin_lock_init(&iommu->register_lock);

-	if (intel_iommu_enabled) {

+	/*

+	 * This is only for hotplug; at boot time intel_iommu_enabled won't

+	 * be set yet. When intel_iommu_init() runs, it registers the units

+	 * present at boot time, then sets intel_iommu_enabled.

+	 */

+	if (intel_iommu_enabled && !drhd->ignored) {

 		err = iommu_device_sysfs_add(&iommu->iommu, NULL,

 					     intel_iommu_groups,

 					     "%s", iommu->name);

@@ -1123,7 +1139,7 @@ error:

 static void free_iommu(struct intel_iommu *iommu)

 {

-	if (intel_iommu_enabled) {

+	if (intel_iommu_enabled && iommu->iommu.ops) {

 		iommu_device_unregister(&iommu->iommu);

 		iommu_device_sysfs_remove(&iommu->iommu);

 	}