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From f6b97def1dd03e7bf445974451b08640a6fc99e8 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Mon, 25 Apr 2022 17:20:27 +0200
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Subject: [PATCH 07/34] net: dsa: lantiq_gswip: Don't set
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GSWIP_MII_CFG_RMII_CLK
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Git-commit: 71cffebf6358a7f5031f5b208bbdc1cb4db6e539
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Patch-mainline: v5.18-rc5
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References: git-fixes
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Commit 4b5923249b8fa4 ("net: dsa: lantiq_gswip: Configure all remaining
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GSWIP_MII_CFG bits") added all known bits in the GSWIP_MII_CFGp
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register. It helped bring this register into a well-defined state so the
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driver has to rely less on the bootloader to do things right.
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Unfortunately it also sets the GSWIP_MII_CFG_RMII_CLK bit without any
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possibility to configure it. Upon further testing it turns out that all
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boards which are supported by the GSWIP driver in OpenWrt which use an
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RMII PHY have a dedicated oscillator on the board which provides the
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50MHz RMII reference clock.
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Don't set the GSWIP_MII_CFG_RMII_CLK bit (but keep the code which always
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clears it) to fix support for the Fritz!Box 7362 SL in OpenWrt. This is
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a board with two Atheros AR8030 RMII PHYs. With the "RMII clock" bit set
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the MAC also generates the RMII reference clock whose signal then
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conflicts with the signal from the oscillator on the board. This results
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in a constant cycle of the PHY detecting link up/down (and as a result
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of that: the two ports using the AR8030 PHYs are not working).
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At the time of writing this patch there's no known board where the MAC
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(GSWIP) has to generate the RMII reference clock. If needed this can be
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implemented in future by providing a device-tree flag so the
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GSWIP_MII_CFG_RMII_CLK bit can be toggled per port.
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Fixes: 4b5923249b8fa4 ("net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII_CFG bits")
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Tested-by: Jan Hoffmann <jan@3e8.eu>
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
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Link: https://lore.kernel.org/r/20220425152027.2220750-1-martin.blumenstingl@googlemail.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Signed-off-by: Denis Kirjanov <denis.kirjanov@suse.com>
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---
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drivers/net/dsa/lantiq_gswip.c | 3 ---
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1 file changed, 3 deletions(-)
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diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c
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index 9e006a25b636..8a8f392813d8 100644
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--- a/drivers/net/dsa/lantiq_gswip.c
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+++ b/drivers/net/dsa/lantiq_gswip.c
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@@ -1663,9 +1663,6 @@ static void gswip_phylink_mac_config(struct dsa_switch *ds, int port,
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break;
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case PHY_INTERFACE_MODE_RMII:
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miicfg |= GSWIP_MII_CFG_MODE_RMIIM;
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-
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- /* Configure the RMII clock as output: */
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- miicfg |= GSWIP_MII_CFG_RMII_CLK;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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--
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2.16.4
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