From 0dcad700bb2776e3886fe0a645a4bf13b1e747cd Mon Sep 17 00:00:00 2001

From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>

Date: Tue, 19 Apr 2022 17:18:27 +0530

Subject: [PATCH] powerpc/perf: Fix power9 event alternatives

References: bsc#1137728, LTC#178106, git-fixes

Patch-mainline: v5.18-rc4

Git-commit: 0dcad700bb2776e3886fe0a645a4bf13b1e747cd

When scheduling a group of events, there are constraint checks done to

make sure all events can go in a group. Example, one of the criteria is

that events in a group cannot use the same PMC. But platform specific

PMU supports alternative event for some of the event codes. During

perf_event_open(), if any event group doesn't match constraint check

criteria, further lookup is done to find alternative event.

By current design, the array of alternatives events in PMU code is

expected to be sorted by column 0. This is because in

find_alternative() the return criteria is based on event code

comparison. ie. "event < ev_alt[i][0])". This optimisation is there

since find_alternative() can be called multiple times. In power9 PMU

code, the alternative event array is not sorted properly and hence there

is breakage in finding alternative events.

To work with existing logic, fix the alternative event array to be

sorted by column 0 for power9-pmu.c

Results:

With alternative events, multiplexing can be avoided. That is, for

example, in power9 PM_LD_MISS_L1 (0x3e054) has alternative event,

PM_LD_MISS_L1_ALT (0x400f0). This is an identical event which can be

programmed in a different PMC.

Before:

 # perf stat -e r3e054,r300fc

 Performance counter stats for 'system wide':

           1057860      r3e054              (50.21%)

               379      r300fc              (49.79%)

       0.944329741 seconds time elapsed

Since both the events are using PMC3 in this case, they are

multiplexed here.

After:

 # perf stat -e r3e054,r300fc

 Performance counter stats for 'system wide':

           1006948      r3e054

               182      r300fc

Fixes: 91e0bd1e6251 ("powerpc/perf: Add PM_LD_MISS_L1 and PM_BR_2PATH to power9 event list")

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>

Reviewed-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Link: https://lore.kernel.org/r/20220419114828.89843-1-atrajeev@linux.vnet.ibm.com

Acked-by: Michal Suchanek <msuchanek@suse.de>

---

 arch/powerpc/perf/power9-pmu.c | 8 ++++----

 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c

index c9eb5232e68b..c393e837648e 100644

--- a/arch/powerpc/perf/power9-pmu.c

+++ b/arch/powerpc/perf/power9-pmu.c

@@ -133,11 +133,11 @@ int p9_dd22_bl_ev[] = {

 /* Table of alternatives, sorted by column 0 */

 static const unsigned int power9_event_alternatives[][MAX_ALT] = {

-	{ PM_INST_DISP,			PM_INST_DISP_ALT },

-	{ PM_RUN_CYC_ALT,		PM_RUN_CYC },

-	{ PM_RUN_INST_CMPL_ALT,		PM_RUN_INST_CMPL },

-	{ PM_LD_MISS_L1,		PM_LD_MISS_L1_ALT },

 	{ PM_BR_2PATH,			PM_BR_2PATH_ALT },

+	{ PM_INST_DISP,			PM_INST_DISP_ALT },

+	{ PM_RUN_CYC_ALT,               PM_RUN_CYC },

+	{ PM_LD_MISS_L1,                PM_LD_MISS_L1_ALT },

+	{ PM_RUN_INST_CMPL_ALT,         PM_RUN_INST_CMPL },

 };

 static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[])

-- 

2.34.1