From f4fd84ae0765a80494b28c43b756a95100351a94 Mon Sep 17 00:00:00 2001

From: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Date: Thu, 21 Apr 2022 19:33:56 -0700

Subject: [PATCH] usb: dwc3: core: Only handle soft-reset in DCTL

Git-commit: f4fd84ae0765a80494b28c43b756a95100351a94

References: git-fixes

Patch-mainline: v5.18-rc5

Make sure not to set run_stop bit or link state change request while

initiating soft-reset. Register read-modify-write operation may

unintentionally start the controller before the initialization completes

with its previous DCTL value, which can cause initialization failure.

Fixes: f59dcab17629 ("usb: dwc3: core: improve reset sequence")

Cc: <stable@vger.kernel.org>

Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Link: https://lore.kernel.org/r/6aecbd78328f102003d40ccf18ceeebd411d3703.1650594792.git.Thinh.Nguyen@synopsys.com

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Signed-off-by: Oliver Neukum <oneukum@suse.com>

---

 drivers/usb/dwc3/core.c | 3 ++-

 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c

index 1ca9dae57855..d28cd1a6709b 100644

--- a/drivers/usb/dwc3/core.c

+++ b/drivers/usb/dwc3/core.c

@@ -274,7 +274,8 @@ int dwc3_core_soft_reset(struct dwc3 *dwc)

 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);

 	reg |= DWC3_DCTL_CSFTRST;

-	dwc3_writel(dwc->regs, DWC3_DCTL, reg);

+	reg &= ~DWC3_DCTL_RUN_STOP;

+	dwc3_gadget_dctl_write_safe(dwc, reg);

 	/*

 	 * For DWC_usb31 controller 1.90a and later, the DCTL.CSFRST bit

-- 

2.35.3