From f8df91e73a6827a4569bb56cd53e55b4ea2f5b1f Mon Sep 17 00:00:00 2001

From: Jim Mattson <jmattson@google.com>

Date: Thu, 1 Sep 2022 14:18:06 -0700

Subject: [PATCH] x86/cpufeatures: Add macros for Intel's new fast rep string features

Git-commit: f8df91e73a6827a4569bb56cd53e55b4ea2f5b1f

Patch-mainline: v6.3-rc1

References: bsc#1211140

KVM_GET_SUPPORTED_CPUID should reflect these host CPUID bits. The bits

are already cached in word 12. Give the bits X86_FEATURE names, so

that they can be easily referenced. Hide these bits from

/proc/cpuinfo, since the host kernel makes no use of them at present.

Signed-off-by: Jim Mattson <jmattson@google.com>

Reviewed-by: Sean Christopherson <seanjc@google.com>

Link: https://lore.kernel.org/r/20220901211811.2883855-1-jmattson@google.com

Signed-off-by: Sean Christopherson <seanjc@google.com>

Acked-by: Takashi Iwai <tiwai@suse.de>

---

 arch/x86/include/asm/cpufeatures.h |    3 +++

 1 file changed, 3 insertions(+)

--- a/arch/x86/include/asm/cpufeatures.h

+++ b/arch/x86/include/asm/cpufeatures.h

@@ -307,6 +307,9 @@

 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */

 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */

 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */

+#define X86_FEATURE_FZRM		(12*32+10) /* "" Fast zero-length REP MOVSB */

+#define X86_FEATURE_FSRS		(12*32+11) /* "" Fast short REP STOSB */

+#define X86_FEATURE_FSRC		(12*32+12) /* "" Fast short REP {CMPSB,SCASB} */

 #define X86_FEATURE_AMX_TILE		(18*32+24) /* AMX tile Support */

 /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */