From 48aaf5ca650cf993923c53c26d84fc65a6e5d852 Mon Sep 17 00:00:00 2001
From: Jiri Slaby <jslaby@suse.cz>
Date: Apr 20 2023 11:00:19 +0000
Subject: IB/mlx5: Add support for 400G_8X lane speed (bsc#1012628).


---

diff --git a/patches.kernel.org/6.2.12-035-IB-mlx5-Add-support-for-400G_8X-lane-speed.patch b/patches.kernel.org/6.2.12-035-IB-mlx5-Add-support-for-400G_8X-lane-speed.patch
new file mode 100644
index 0000000..b943c8b
--- /dev/null
+++ b/patches.kernel.org/6.2.12-035-IB-mlx5-Add-support-for-400G_8X-lane-speed.patch
@@ -0,0 +1,47 @@
+From: Maher Sanalla <msanalla@nvidia.com>
+Date: Thu, 16 Mar 2023 15:40:49 +0200
+Subject: [PATCH] IB/mlx5: Add support for 400G_8X lane speed
+References: bsc#1012628
+Patch-mainline: 6.2.12
+Git-commit: 88c9483faf15ada14eca82714114656893063458
+
+[ Upstream commit 88c9483faf15ada14eca82714114656893063458 ]
+
+Currently, when driver queries PTYS to report which link speed is being
+used on its RoCE ports, it does not check the case of having 400Gbps
+transmitted over 8 lanes. Thus it fails to report the said speed and
+instead it defaults to report 10G over 4 lanes.
+
+Add a check for the said speed when querying PTYS and report it back
+correctly when needed.
+
+Fixes: 08e8676f1607 ("IB/mlx5: Add support for 50Gbps per lane link modes")
+Signed-off-by: Maher Sanalla <msanalla@nvidia.com>
+Reviewed-by: Aya Levin <ayal@nvidia.com>
+Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
+Link: https://lore.kernel.org/r/ec9040548d119d22557d6a4b4070d6f421701fd4.1678973994.git.leon@kernel.org
+Signed-off-by: Leon Romanovsky <leon@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+Signed-off-by: Jiri Slaby <jslaby@suse.cz>
+---
+ drivers/infiniband/hw/mlx5/main.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
+index c669ef6e..eaa35e1d 100644
+--- a/drivers/infiniband/hw/mlx5/main.c
++++ b/drivers/infiniband/hw/mlx5/main.c
+@@ -442,6 +442,10 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u16 *active_speed,
+ 		*active_width = IB_WIDTH_2X;
+ 		*active_speed = IB_SPEED_NDR;
+ 		break;
++	case MLX5E_PROT_MASK(MLX5E_400GAUI_8):
++		*active_width = IB_WIDTH_8X;
++		*active_speed = IB_SPEED_HDR;
++		break;
+ 	case MLX5E_PROT_MASK(MLX5E_400GAUI_4_400GBASE_CR4_KR4):
+ 		*active_width = IB_WIDTH_4X;
+ 		*active_speed = IB_SPEED_NDR;
+-- 
+2.35.3
+
diff --git a/series.conf b/series.conf
index 0eb2d28..f915bcc 100644
--- a/series.conf
+++ b/series.conf
@@ -2262,6 +2262,7 @@
 	patches.kernel.org/6.2.12-032-RDMA-irdma-Fix-memory-leak-of-PBLE-objects.patch
 	patches.kernel.org/6.2.12-033-RDMA-irdma-Increase-iWARP-CM-default-rexmit-co.patch
 	patches.kernel.org/6.2.12-034-RDMA-irdma-Add-ipv4-check-to-irdma_find_listen.patch
+	patches.kernel.org/6.2.12-035-IB-mlx5-Add-support-for-400G_8X-lane-speed.patch
 
 	########################################################
 	# Build fixes that apply to the vanilla kernel too.