From be46abd0ed4ca9327b62f5b0f6156d948de97893 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mar 03 2023 11:25:15 +0000 Subject: drm/amd/display: Move DCN314 DOMAIN power control to DMCUB (bsc#1012628). --- diff --git a/patches.kernel.org/6.2.2-005-drm-amd-display-Move-DCN314-DOMAIN-power-contro.patch b/patches.kernel.org/6.2.2-005-drm-amd-display-Move-DCN314-DOMAIN-power-contro.patch new file mode 100644 index 0000000..733d833 --- /dev/null +++ b/patches.kernel.org/6.2.2-005-drm-amd-display-Move-DCN314-DOMAIN-power-contro.patch @@ -0,0 +1,146 @@ +From: Nicholas Kazlauskas +Date: Mon, 23 Jan 2023 14:59:28 -0500 +Subject: [PATCH] drm/amd/display: Move DCN314 DOMAIN power control to DMCUB +References: bsc#1012628 +Patch-mainline: 6.2.2 +Git-commit: e383b12709e32d6494c948422070c2464b637e44 + +commit e383b12709e32d6494c948422070c2464b637e44 upstream. + +[Why] +DOMAIN power gating control is now required to be done via firmware +due to interlock with other power features. This is to avoid +intermittent issues in the LB memories. + +[How] +If the firmware supports the command then use the new firmware as +the sequence can avoid potential display corruption issues. + +The command will be ignored on firmware that does not support DOMAIN +power control and the pipes will remain always on - frequent PG cycling +can cause the issue to occur on the old sequence, so we should avoid it. + +Reviewed-by: Hansen Dsouza +Acked-by: Qingqing Zhuo +Signed-off-by: Nicholas Kazlauskas +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Cc: "Limonciello, Mario" +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Jiri Slaby +--- + .../drm/amd/display/dc/dcn314/dcn314_hwseq.c | 24 ++++++++++++++++++ + .../drm/amd/display/dc/dcn314/dcn314_hwseq.h | 2 ++ + .../drm/amd/display/dc/dcn314/dcn314_init.c | 2 +- + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 25 +++++++++++++++++++ + 4 files changed, 52 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c +index a0741794..8e824dc8 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.c +@@ -391,3 +391,27 @@ void dcn314_set_pixels_per_cycle(struct pipe_ctx *pipe_ctx) + pipe_ctx->stream_res.stream_enc->funcs->set_input_mode(pipe_ctx->stream_res.stream_enc, + pix_per_cycle); + } ++ ++void dcn314_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on) ++{ ++ struct dc_context *ctx = hws->ctx; ++ union dmub_rb_cmd cmd; ++ ++ if (hws->ctx->dc->debug.disable_hubp_power_gate) ++ return; ++ ++ PERF_TRACE(); ++ ++ memset(&cmd, 0, sizeof(cmd)); ++ cmd.domain_control.header.type = DMUB_CMD__VBIOS; ++ cmd.domain_control.header.sub_type = DMUB_CMD__VBIOS_DOMAIN_CONTROL; ++ cmd.domain_control.header.payload_bytes = sizeof(cmd.domain_control.data); ++ cmd.domain_control.data.inst = hubp_inst; ++ cmd.domain_control.data.power_gate = !power_on; ++ ++ dc_dmub_srv_cmd_queue(ctx->dmub_srv, &cmd); ++ dc_dmub_srv_cmd_execute(ctx->dmub_srv); ++ dc_dmub_srv_wait_idle(ctx->dmub_srv); ++ ++ PERF_TRACE(); ++} +diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h +index 24428029..c419d3db 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h ++++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h +@@ -41,4 +41,6 @@ unsigned int dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsig + + void dcn314_set_pixels_per_cycle(struct pipe_ctx *pipe_ctx); + ++void dcn314_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on); ++ + #endif /* __DC_HWSS_DCN314_H__ */ +diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c +index 31feb4b0..25f345ff 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_init.c +@@ -137,7 +137,7 @@ static const struct hwseq_private_funcs dcn314_private_funcs = { + .plane_atomic_disable = dcn20_plane_atomic_disable, + .plane_atomic_power_down = dcn10_plane_atomic_power_down, + .enable_power_gating_plane = dcn314_enable_power_gating_plane, +- .hubp_pg_control = dcn31_hubp_pg_control, ++ .hubp_pg_control = dcn314_hubp_pg_control, + .program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree, + .update_odm = dcn314_update_odm, + .dsc_pg_control = dcn314_dsc_pg_control, +diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +index 33907fee..8fea8e42 100644 +--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h ++++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +@@ -457,6 +457,10 @@ enum dmub_cmd_vbios_type { + * Query DP alt status on a transmitter. + */ + DMUB_CMD__VBIOS_TRANSMITTER_QUERY_DP_ALT = 26, ++ /** ++ * Controls domain power gating ++ */ ++ DMUB_CMD__VBIOS_DOMAIN_CONTROL = 28, + }; + + //============================================================================== +@@ -1204,6 +1208,23 @@ struct dmub_rb_cmd_dig1_transmitter_control { + union dmub_cmd_dig1_transmitter_control_data transmitter_control; /**< payload */ + }; + ++/** ++ * struct dmub_rb_cmd_domain_control_data - Data for DOMAIN power control ++ */ ++struct dmub_rb_cmd_domain_control_data { ++ uint8_t inst : 6; /**< DOMAIN instance to control */ ++ uint8_t power_gate : 1; /**< 1=power gate, 0=power up */ ++ uint8_t reserved[3]; /**< Reserved for future use */ ++}; ++ ++/** ++ * struct dmub_rb_cmd_domain_control - Controls DOMAIN power gating ++ */ ++struct dmub_rb_cmd_domain_control { ++ struct dmub_cmd_header header; /**< header */ ++ struct dmub_rb_cmd_domain_control_data data; /**< payload */ ++}; ++ + /** + * DPIA tunnel command parameters. + */ +@@ -3231,6 +3252,10 @@ union dmub_rb_cmd { + * Definition of a DMUB_CMD__VBIOS_DIG1_TRANSMITTER_CONTROL command. + */ + struct dmub_rb_cmd_dig1_transmitter_control dig1_transmitter_control; ++ /** ++ * Definition of a DMUB_CMD__VBIOS_DOMAIN_CONTROL command. ++ */ ++ struct dmub_rb_cmd_domain_control domain_control; + /** + * Definition of a DMUB_CMD__PSR_SET_VERSION command. + */ +-- +2.35.3 + diff --git a/series.conf b/series.conf index 5d27c3b..21a5dca 100644 --- a/series.conf +++ b/series.conf @@ -44,6 +44,7 @@ patches.kernel.org/6.2.2-002-crypto-arm64-sm4-gcm-Fix-possible-crash-in-GCM-.patch patches.kernel.org/6.2.2-003-bpf-bpf_fib_lookup-should-not-return-neigh-in-N.patch patches.kernel.org/6.2.2-004-vc_screen-don-t-clobber-return-value-in-vcs_rea.patch + patches.kernel.org/6.2.2-005-drm-amd-display-Move-DCN314-DOMAIN-power-contro.patch ######################################################## # Build fixes that apply to the vanilla kernel too.