From d3b23eb3cb86c84c4982dd91e9393e5a6aeff3ad Mon Sep 17 00:00:00 2001 From: Yousaf Kaukab Date: Oct 12 2022 10:42:09 +0000 Subject: Merge remote-tracking branch 'origin/users/trenn/SLE15-SP5/for-next' into SLE15-SP5 Pull powercap backports from Thomas Renninger --- diff --git a/patches.suse/powercap-Add-Power-Limit4-support-for-Alder-Lake-SoC.patch b/patches.suse/powercap-Add-Power-Limit4-support-for-Alder-Lake-SoC.patch new file mode 100644 index 0000000..898476a --- /dev/null +++ b/patches.suse/powercap-Add-Power-Limit4-support-for-Alder-Lake-SoC.patch @@ -0,0 +1,28 @@ +From: Sumeet Pawnikar +Subject: powercap: Add Power Limit4 support for Alder Lake SoC +References: jsc#PED-769 +Patch-Mainline: v5.15-rc1 +Git-commit: 1cc5b9a411e43aa2cb5060429ede6c50217bad90 + + +Add Power Limit4 support for Alder Lake SoC. + +Signed-off-by: Sumeet Pawnikar +Acked-by: Zhang Rui +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c +index cc3b22881bfe..1be45f36ab6c 100644 +--- a/drivers/powercap/intel_rapl_msr.c ++++ b/drivers/powercap/intel_rapl_msr.c +@@ -138,6 +138,8 @@ static int rapl_msr_write_raw(int cpu, struct reg_action *ra) + /* List of verified CPUs. */ + static const struct x86_cpu_id pl4_support_ids[] = { + { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY }, ++ { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE, X86_FEATURE_ANY }, ++ { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE_L, X86_FEATURE_ANY }, + {} + }; + diff --git a/patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-Alder-Lake-N-and-Raptor-Lake-P.patch b/patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-Alder-Lake-N-and-Raptor-Lake-P.patch new file mode 100644 index 0000000..5307701 --- /dev/null +++ b/patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-Alder-Lake-N-and-Raptor-Lake-P.patch @@ -0,0 +1,33 @@ +From: Sumeet Pawnikar +Subject: powercap: RAPL: Add Power Limit4 support for Alder Lake-N and Raptor Lake-P +References: jsc#PED-769 +Patch-Mainline: v6.0-rc1 +Git-commit: b08b95cf30f53b674bdef510d4cfd0623199b036 + + +Add Alder Lake-N and Raptor Lake-P to the list of processor models +for which Power Limit4 is supported by the Intel RAPL driver. + +Signed-off-by: Sumeet Pawnikar +Reviewed-by: Srinivas Pandruvada +Reviewed-by: Andy Shevchenko +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +--- + drivers/powercap/intel_rapl_msr.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/powercap/intel_rapl_msr.c ++++ b/drivers/powercap/intel_rapl_msr.c +@@ -140,7 +140,9 @@ static const struct x86_cpu_id pl4_suppo + { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE_L, X86_FEATURE_ANY }, ++ { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE_N, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_RAPTORLAKE, X86_FEATURE_ANY }, ++ { X86_VENDOR_INTEL, 6, INTEL_FAM6_RAPTORLAKE_P, X86_FEATURE_ANY }, + {} + }; + diff --git a/patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-RaptorLake.patch b/patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-RaptorLake.patch new file mode 100644 index 0000000..0395ddb --- /dev/null +++ b/patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-RaptorLake.patch @@ -0,0 +1,30 @@ +From: Sumeet Pawnikar +Subject: powercap: RAPL: Add Power Limit4 support for RaptorLake +References: jsc#PED-769 +Patch-Mainline: v5.19-rc1 +Git-commit: 515755906921fa9393d6c9de18fac4343882a88d + + +Add RaptorLake to the list of processor models for which Power Limit4 +is supported by the Intel RAPL driver. + +Signed-off-by: Sumeet Pawnikar +[ rjw: Changelog rewrite ] +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +--- + drivers/powercap/intel_rapl_msr.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/powercap/intel_rapl_msr.c ++++ b/drivers/powercap/intel_rapl_msr.c +@@ -140,6 +140,7 @@ static const struct x86_cpu_id pl4_suppo + { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE, X86_FEATURE_ANY }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ALDERLAKE_L, X86_FEATURE_ANY }, ++ { X86_VENDOR_INTEL, 6, INTEL_FAM6_RAPTORLAKE, X86_FEATURE_ANY }, + {} + }; + diff --git a/patches.suse/powercap-intel_rapl-Add-support-for-RAPTORLAKE_P.patch b/patches.suse/powercap-intel_rapl-Add-support-for-RAPTORLAKE_P.patch new file mode 100644 index 0000000..2c7beb4 --- /dev/null +++ b/patches.suse/powercap-intel_rapl-Add-support-for-RAPTORLAKE_P.patch @@ -0,0 +1,32 @@ +From: George D Sworo +Subject: powercap: intel_rapl: Add support for RAPTORLAKE_P +References: jsc#PED-686 +Patch-Mainline: v6.0-rc1 +Git-commit: 2755714656d0f2f41adfe231f3865e72da2cbe39 + + +Add RAPTORLAKE_P to the list of supported processor models in the Intel +RAPL power capping driver. + +Signed-off-by: George D Sworo +Acked-by: Zhang Rui +Tested-by: Sumeet Pawnikar +[ rjw: Minor changelog edits ] +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +--- + drivers/powercap/intel_rapl_common.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/powercap/intel_rapl_common.c ++++ b/drivers/powercap/intel_rapl_common.c +@@ -1109,6 +1109,7 @@ static const struct x86_cpu_id rapl_ids[ + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core), ++ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &rapl_defaults_spr_server), + X86_MATCH_INTEL_FAM6_MODEL(LAKEFIELD, &rapl_defaults_core), + diff --git a/patches.suse/powercap-intel_rapl-add-support-for-ALDERLAKE_N.patch b/patches.suse/powercap-intel_rapl-add-support-for-ALDERLAKE_N.patch new file mode 100644 index 0000000..2aa976e --- /dev/null +++ b/patches.suse/powercap-intel_rapl-add-support-for-ALDERLAKE_N.patch @@ -0,0 +1,30 @@ +From: Zhang Rui +Subject: powercap: intel_rapl: add support for ALDERLAKE_N +References: jsc#PED-695 +Patch-Mainline: v5.19-rc1 +Git-commit: f125bdbdd6bd4a88f3697e5850359d3ffe43a3f2 + + +Add ALDERLAKE_N to the list of supported processor models in the Intel +RAPL power capping driver. + +Signed-off-by: Zhang Rui +[ rjw: Changelog ] +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +--- + drivers/powercap/intel_rapl_common.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/powercap/intel_rapl_common.c ++++ b/drivers/powercap/intel_rapl_common.c +@@ -1107,6 +1107,7 @@ static const struct x86_cpu_id rapl_ids[ + X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core), ++ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &rapl_defaults_spr_server), + X86_MATCH_INTEL_FAM6_MODEL(LAKEFIELD, &rapl_defaults_core), diff --git a/patches.suse/powercap-intel_rapl-add-support-for-RaptorLake.patch b/patches.suse/powercap-intel_rapl-add-support-for-RaptorLake.patch new file mode 100644 index 0000000..9ec97fb --- /dev/null +++ b/patches.suse/powercap-intel_rapl-add-support-for-RaptorLake.patch @@ -0,0 +1,28 @@ +From: Zhang Rui +Subject: powercap: intel_rapl: add support for RaptorLake +References: jsc#PED-769 +Patch-Mainline: v5.19-rc1 +Git-commit: ae0dc7ed1a7c713ee9ba563a328d3b4d59223d7c + + +Add intel_rapl support for the RaptorLake platform. + +Signed-off-by: Zhang Rui +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +--- + drivers/powercap/intel_rapl_common.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/powercap/intel_rapl_common.c ++++ b/drivers/powercap/intel_rapl_common.c +@@ -1107,6 +1107,7 @@ static const struct x86_cpu_id rapl_ids[ + X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &rapl_defaults_core), ++ X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, &rapl_defaults_core), + X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &rapl_defaults_spr_server), + X86_MATCH_INTEL_FAM6_MODEL(LAKEFIELD, &rapl_defaults_core), + diff --git a/patches.suse/powercap-intel_rapl-support-new-layout-of-Psys-PowerLimit-Register-on-SPR.patch b/patches.suse/powercap-intel_rapl-support-new-layout-of-Psys-PowerLimit-Register-on-SPR.patch new file mode 100644 index 0000000..88eb3d3 --- /dev/null +++ b/patches.suse/powercap-intel_rapl-support-new-layout-of-Psys-PowerLimit-Register-on-SPR.patch @@ -0,0 +1,150 @@ +From: Zhang Rui +Subject: powercap: intel_rapl: support new layout of Psys PowerLimit Register on SPR +References: jsc#PED-648 +Patch-Mainline: v5.17-rc1 +Git-commit: 931da6a0de5d620425af4425344259e6ff46b654 + + +On Sapphire Rapids, the layout of the Psys domain Power Limit Register +is different from from what it was before. + +Enhance the code to support the new Psys PL register layout. + +Signed-off-by: Zhang Rui +Reported-and-tested-by: Alkattan Dana +[ rjw: Subject and changelog edits ] +Signed-off-by: Rafael J. Wysocki + + +Signed-off-by: +--- + drivers/powercap/intel_rapl_common.c | 61 +++++++++++++++++++++++++++++++++-- + include/linux/intel_rapl.h | 6 +++ + 2 files changed, 65 insertions(+), 2 deletions(-) + +--- a/drivers/powercap/intel_rapl_common.c ++++ b/drivers/powercap/intel_rapl_common.c +@@ -61,6 +61,20 @@ + #define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff + #define PP_POLICY_MASK 0x1F + ++/* ++ * SPR has different layout for Psys Domain PowerLimit registers. ++ * There are 17 bits of PL1 and PL2 instead of 15 bits. ++ * The Enable bits and TimeWindow bits are also shifted as a result. ++ */ ++#define PSYS_POWER_LIMIT1_MASK 0x1FFFF ++#define PSYS_POWER_LIMIT1_ENABLE BIT(17) ++ ++#define PSYS_POWER_LIMIT2_MASK (0x1FFFFULL<<32) ++#define PSYS_POWER_LIMIT2_ENABLE BIT_ULL(49) ++ ++#define PSYS_TIME_WINDOW1_MASK (0x7FULL<<19) ++#define PSYS_TIME_WINDOW2_MASK (0x7FULL<<51) ++ + /* Non HW constants */ + #define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */ + #define RAPL_PRIMITIVE_DUMMY BIT(2) +@@ -97,6 +111,7 @@ struct rapl_defaults { + bool to_raw); + unsigned int dram_domain_energy_unit; + unsigned int psys_domain_energy_unit; ++ bool spr_psys_bits; + }; + static struct rapl_defaults *rapl_defaults; + +@@ -669,12 +684,51 @@ static struct rapl_primitive_info rpi[] + RAPL_DOMAIN_REG_PERF, TIME_UNIT, 0), + PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0, + RAPL_DOMAIN_REG_POLICY, ARBITRARY_UNIT, 0), ++ PRIMITIVE_INFO_INIT(PSYS_POWER_LIMIT1, PSYS_POWER_LIMIT1_MASK, 0, ++ RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0), ++ PRIMITIVE_INFO_INIT(PSYS_POWER_LIMIT2, PSYS_POWER_LIMIT2_MASK, 32, ++ RAPL_DOMAIN_REG_LIMIT, POWER_UNIT, 0), ++ PRIMITIVE_INFO_INIT(PSYS_PL1_ENABLE, PSYS_POWER_LIMIT1_ENABLE, 17, ++ RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0), ++ PRIMITIVE_INFO_INIT(PSYS_PL2_ENABLE, PSYS_POWER_LIMIT2_ENABLE, 49, ++ RAPL_DOMAIN_REG_LIMIT, ARBITRARY_UNIT, 0), ++ PRIMITIVE_INFO_INIT(PSYS_TIME_WINDOW1, PSYS_TIME_WINDOW1_MASK, 19, ++ RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0), ++ PRIMITIVE_INFO_INIT(PSYS_TIME_WINDOW2, PSYS_TIME_WINDOW2_MASK, 51, ++ RAPL_DOMAIN_REG_LIMIT, TIME_UNIT, 0), + /* non-hardware */ + PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT, + RAPL_PRIMITIVE_DERIVED), + {NULL, 0, 0, 0}, + }; + ++static enum rapl_primitives ++prim_fixups(struct rapl_domain *rd, enum rapl_primitives prim) ++{ ++ if (!rapl_defaults->spr_psys_bits) ++ return prim; ++ ++ if (rd->id != RAPL_DOMAIN_PLATFORM) ++ return prim; ++ ++ switch (prim) { ++ case POWER_LIMIT1: ++ return PSYS_POWER_LIMIT1; ++ case POWER_LIMIT2: ++ return PSYS_POWER_LIMIT2; ++ case PL1_ENABLE: ++ return PSYS_PL1_ENABLE; ++ case PL2_ENABLE: ++ return PSYS_PL2_ENABLE; ++ case TIME_WINDOW1: ++ return PSYS_TIME_WINDOW1; ++ case TIME_WINDOW2: ++ return PSYS_TIME_WINDOW2; ++ default: ++ return prim; ++ } ++} ++ + /* Read primitive data based on its related struct rapl_primitive_info. + * if xlate flag is set, return translated data based on data units, i.e. + * time, energy, and power. +@@ -692,7 +746,8 @@ static int rapl_read_data_raw(struct rap + enum rapl_primitives prim, bool xlate, u64 *data) + { + u64 value; +- struct rapl_primitive_info *rp = &rpi[prim]; ++ enum rapl_primitives prim_fixed = prim_fixups(rd, prim); ++ struct rapl_primitive_info *rp = &rpi[prim_fixed]; + struct reg_action ra; + int cpu; + +@@ -738,7 +793,8 @@ static int rapl_write_data_raw(struct ra + enum rapl_primitives prim, + unsigned long long value) + { +- struct rapl_primitive_info *rp = &rpi[prim]; ++ enum rapl_primitives prim_fixed = prim_fixups(rd, prim); ++ struct rapl_primitive_info *rp = &rpi[prim_fixed]; + int cpu; + u64 bits; + struct reg_action ra; +@@ -981,6 +1037,7 @@ static const struct rapl_defaults rapl_d + .compute_time_window = rapl_compute_time_window_core, + .dram_domain_energy_unit = 15300, + .psys_domain_energy_unit = 1000000000, ++ .spr_psys_bits = true, + }; + + static const struct rapl_defaults rapl_defaults_byt = { +--- a/include/linux/intel_rapl.h ++++ b/include/linux/intel_rapl.h +@@ -58,6 +58,12 @@ enum rapl_primitives { + THROTTLED_TIME, + PRIORITY_LEVEL, + ++ PSYS_POWER_LIMIT1, ++ PSYS_POWER_LIMIT2, ++ PSYS_PL1_ENABLE, ++ PSYS_PL2_ENABLE, ++ PSYS_TIME_WINDOW1, ++ PSYS_TIME_WINDOW2, + /* below are not raw primitive data */ + AVERAGE_POWER, + NR_RAPL_PRIMITIVES, diff --git a/series.conf b/series.conf index c4dc523..5ac8dcd 100644 --- a/series.conf +++ b/series.conf @@ -513,6 +513,7 @@ patches.suse/PM-sleep-s2idle-Replace-deprecated-CPU-hotplug-functions.patch patches.suse/opp-Don-t-print-an-error-if-required-opps-is-missing.patch patches.suse/powercap-intel_rapl-Replace-deprecated-CPU-hotplug-functions.patch + patches.suse/powercap-Add-Power-Limit4-support-for-Alder-Lake-SoC.patch patches.suse/ACPICA-iASL-Add-support-for-the-AEST-table-data-comp-e692fa13.patch patches.suse/ACPICA-Fix-an-if-statement-add-parens-5ecce804.patch patches.suse/ACPICA-Macros-should-not-use-a-trailing-semicolon-78df71b3.patch @@ -9318,6 +9319,7 @@ patches.suse/ACPI-CPPC-Add-CPPC-enable-register-function.patch patches.suse/PM-runtime-Add-safety-net-to-supplier-device-release.patch patches.suse/PM-hibernate-Allow-ACPI-hardware-signature-to-be-hon.patch + patches.suse/powercap-intel_rapl-support-new-layout-of-Psys-PowerLimit-Register-on-SPR.patch patches.suse/thermal-drivers-imx-Implement-runtime-PM-support.patch patches.suse/thermal-drivers-imx8mm-Enable-ADC-when-enabling-moni.patch patches.suse/thermal-drivers-int340x-Fix-RFIM-mailbox-write-comma.patch @@ -13686,6 +13688,9 @@ patches.suse/ACPI-sysfs-Fix-BERT-error-region-memory-mapping.patch patches.suse/ACPI-AGDI-Fix-missing-prototype-warning-for-acpi_agd.patch patches.suse/PM-devfreq-rk3399_dmc-Disable-edev-on-remove.patch + patches.suse/powercap-intel_rapl-add-support-for-RaptorLake.patch + patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-RaptorLake.patch + patches.suse/powercap-intel_rapl-add-support-for-ALDERLAKE_N.patch patches.suse/ACPI-CPPC-Assume-no-transition-latency-if-no-PCCT.patch patches.suse/PM-domains-Fix-initialization-of-genpd-s-next_wakeup.patch patches.suse/thermal-drivers-bcm2711-Don-t-clamp-temperature-at-z.patch @@ -15424,6 +15429,8 @@ patches.suse/ACPI-video-Shortening-quirk-list-by-identifying-Clev.patch patches.suse/Documentation-ACPI-EINJ-Fix-obsolete-example.patch patches.suse/PM-hibernate-defer-device-probing-when-resuming-from.patch + patches.suse/powercap-intel_rapl-Add-support-for-RAPTORLAKE_P.patch + patches.suse/powercap-RAPL-Add-Power-Limit4-support-for-Alder-Lake-N-and-Raptor-Lake-P.patch patches.suse/PM-domains-Ensure-genpd_debugfs_dir-exists-before-re.patch patches.suse/Documentation-PM-Drop-pme_interrupt-reference.patch patches.suse/thermal-tools-tmon-Include-pthread-and-time-headers-.patch