From 4ba285d4154ab587cc00bf9bd04bb8c7b19b595a Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Thu, 1 Feb 2018 13:03:42 +0200 Subject: [PATCH] drm/i915/dp: clean up source rate limiting for cnl Mime-version: 1.0 Content-type: text/plain; charset=UTF-8 Content-transfer-encoding: 8bit Git-commit: 4ba285d4154ab587cc00bf9bd04bb8c7b19b595a Patch-mainline: v4.17-rc1 References: FATE#322643 bsc#1055900 Make the limiting rate based instead of messing with the array size. Cc: Ville Syrjälä Cc: Rodrigo Vivi Cc: Dhinakaran Pandiyan Reviewed-by: Ville Syrjälä Reviewed-by: Rodrigo Vivi Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/cb03b9419191a7d6359bf371aacb2d3725c746de.1517482774.git.jani.nikula@intel.com Acked-by: Takashi Iwai --- drivers/gpu/drm/i915/intel_dp.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -240,7 +240,7 @@ intel_dp_downstream_max_dotclock(struct return max_dotclk; } -static int cnl_adjusted_max_rate(struct intel_dp *intel_dp, int size) +static int cnl_max_source_rate(struct intel_dp *intel_dp) { struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); @@ -250,17 +250,17 @@ static int cnl_adjusted_max_rate(struct /* Low voltage SKUs are limited to max of 5.4G */ if (voltage == VOLTAGE_INFO_0_85V) - return size - 2; + return 540000; /* For this SKU 8.1G is supported in all ports */ if (IS_CNL_WITH_PORT_F(dev_priv)) - return size; + return 810000; /* For other SKUs, max rate on ports A and B is 5.4G */ if (port == PORT_A || port == PORT_D) - return size - 2; + return 540000; - return size; + return 810000; } static void @@ -269,7 +269,7 @@ intel_dp_set_source_rates(struct intel_d struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); const int *source_rates; - int size; + int size, max_rate = 0; /* This should only be done once */ WARN_ON(intel_dp->source_rates || intel_dp->num_source_rates); @@ -279,7 +279,8 @@ intel_dp_set_source_rates(struct intel_d size = ARRAY_SIZE(bxt_rates); } else if (IS_CANNONLAKE(dev_priv)) { source_rates = cnl_rates; - size = cnl_adjusted_max_rate(intel_dp, ARRAY_SIZE(cnl_rates)); + size = ARRAY_SIZE(cnl_rates); + max_rate = cnl_max_source_rate(intel_dp); } else if (IS_GEN9_BC(dev_priv)) { source_rates = skl_rates; size = ARRAY_SIZE(skl_rates); @@ -292,6 +293,9 @@ intel_dp_set_source_rates(struct intel_d size = ARRAY_SIZE(default_rates) - 1; } + if (max_rate) + size = intel_dp_rate_limit_len(source_rates, size, max_rate); + intel_dp->source_rates = source_rates; intel_dp->num_source_rates = size; }