From: Yongqiang Sun <yongqiang.sun@amd.com>
Date: Thu, 8 Dec 2016 09:47:11 -0500
Subject: drm/amd/display: Added timing sync trace.
Git-commit: 9474980ac470a20d244318db9a7c12be01437805
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c                    |    4 +
 drivers/gpu/drm/amd/display/dc/core/dc_debug.c              |   32 ++++++++++++
 drivers/gpu/drm/amd/display/dc/dc.h                         |    1 
 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c |    1 
 drivers/gpu/drm/amd/display/include/logger_interface.h      |    5 +
 5 files changed, 41 insertions(+), 2 deletions(-)

--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1488,8 +1488,10 @@ void dc_update_surfaces_for_target(struc
 				core_dc->hwss.prepare_pipe_for_context(
 						core_dc, pipe_ctx, context);
 		}
-		if (apply_ctx)
+		if (apply_ctx) {
 			core_dc->hwss.apply_ctx_for_surface(core_dc, surface, context);
+			context_timing_trace(dc, &context->res_ctx);
+		}
 	}
 
 	for (i = context->res_ctx.pool->pipe_count - 1; i >= 0; i--) {
--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
@@ -22,6 +22,13 @@
 					##__VA_ARGS__); \
 } while (0)
 
+#define TIMING_TRACE(...) do {\
+	if (dc->debug.timing_trace) \
+		dm_logger_write(logger, \
+				LOG_SYNC, \
+				##__VA_ARGS__); \
+} while (0)
+
 void pre_surface_trace(
 		const struct dc *dc,
 		const struct dc_surface *const *surfaces,
@@ -268,3 +275,28 @@ void post_surface_trace(const struct dc
 	SURFACE_TRACE("post surface process.\n");
 
 }
+
+void context_timing_trace(
+		const struct dc *dc,
+		struct resource_context *res_ctx)
+{
+	int i;
+	struct core_dc *core_dc = DC_TO_CORE(dc);
+	struct dal_logger *logger =  core_dc->ctx->logger;
+
+	for (i = 0; i < core_dc->res_pool->pipe_count; i++) {
+		struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
+		int h_pos = 0;
+		int v_pos = 0;
+
+		if (pipe_ctx->stream == NULL)
+			continue;
+
+		pipe_ctx->tg->funcs->get_position(pipe_ctx->tg, &h_pos, &v_pos);
+		TIMING_TRACE("Pipe_%d   H_tot:%d  V_tot:%d   H_pos:%d  V_pos:%d\n",
+				pipe_ctx->pipe_idx,
+				pipe_ctx->stream->public.timing.h_total,
+				pipe_ctx->stream->public.timing.v_total,
+				h_pos, v_pos);
+	}
+}
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -140,6 +140,7 @@ struct dc_debug {
 	bool max_disp_clk;
 	bool target_trace;
 	bool surface_trace;
+	bool timing_trace;
 	bool validation_trace;
 	bool disable_stutter;
 	bool disable_dcc;
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -1892,7 +1892,6 @@ static void dce110_apply_ctx_for_surface
 		program_blender(dc, pipe_ctx);
 
 	}
-
 }
 
 static void dce110_power_down_fe(struct core_dc *dc, struct pipe_ctx *pipe)
--- a/drivers/gpu/drm/amd/display/include/logger_interface.h
+++ b/drivers/gpu/drm/amd/display/include/logger_interface.h
@@ -31,6 +31,7 @@
 struct dc_context;
 struct dc_link;
 struct dc_surface_update;
+struct resource_context;
 
 /*
  *
@@ -85,6 +86,10 @@ void update_surface_trace(
 
 void post_surface_trace(const struct dc *dc);
 
+void context_timing_trace(
+		const struct dc *dc,
+		struct resource_context *res_ctx);
+
 
 /* Any function which is empty or have incomplete implementation should be
  * marked by this macro.