From: Wenjing Liu Date: Tue, 15 Aug 2017 19:10:14 -0400 Subject: drm/amd/display: Cache edp config in dc link Git-commit: 9799624ac236eb238b5a5c885c759b1cbcac6349 Patch-mainline: v4.15-rc1 References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166 Signed-off-by: Wenjing Liu Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher Acked-by: Petr Tesarik --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 ++ drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c @@ -2258,6 +2258,8 @@ static void retrieve_link_cap(struct dc_ DP_EDP_CONFIGURATION_CAP - DP_DPCD_REV]; link->dpcd_caps.panel_mode_edp = edp_config_cap.bits.ALT_SCRAMBLER_RESET; + link->dpcd_caps.dpcd_display_control_capable = + edp_config_cap.bits.DPCD_DISPLAY_CONTROL_CAPABLE; link->test_pattern_enabled = false; link->compliance_test_state.raw = 0; --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -760,6 +760,7 @@ struct dpcd_caps { bool allow_invalid_MSA_timing_param; bool panel_mode_edp; + bool dpcd_display_control_capable; }; struct dc_link_status { @@ -834,7 +835,6 @@ struct dc_link { struct dpcd_caps dpcd_caps; unsigned short chip_caps; unsigned int dpcd_sink_count; - enum edp_revision edp_revision; bool psr_enabled;