diff --git a/patches.kernel.org/6.3.3-203-drm-amd-display-Enforce-60us-prefetch-for-200Mh.patch b/patches.kernel.org/6.3.3-203-drm-amd-display-Enforce-60us-prefetch-for-200Mh.patch new file mode 100644 index 0000000..e2df5c3 --- /dev/null +++ b/patches.kernel.org/6.3.3-203-drm-amd-display-Enforce-60us-prefetch-for-200Mh.patch @@ -0,0 +1,73 @@ +From: Alvin Lee +Date: Thu, 27 Apr 2023 15:10:13 -0400 +Subject: [PATCH] drm/amd/display: Enforce 60us prefetch for 200Mhz DCFCLK + modes +References: bsc#1012628 +Patch-mainline: 6.3.3 +Git-commit: b504f99ccaa64da364443431e388ecf30b604e38 + +commit b504f99ccaa64da364443431e388ecf30b604e38 upstream. + +[Description] +- Due to bandwidth / arbitration issues at 200Mhz DCFCLK, + we want to enforce minimum 60us of prefetch to avoid + intermittent underflow issues +- Since 60us prefetch is already enforced for UCLK DPM0, + and many DCFCLK's > 200Mhz are mapped to UCLK DPM1, in + theory there should not be any UCLK DPM regressions by + enforcing greater prefetch + +Reviewed-by: Nevenko Stupar +Reviewed-by: Jun Lei +Cc: Mario Limonciello +Cc: Alex Deucher +Cc: stable@vger.kernel.org +Acked-by: Alex Hung +Signed-off-by: Alvin Lee +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Jiri Slaby +--- + .../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 5 +++-- + .../gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h | 1 + + 2 files changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +index 3b2a014c..fead104a 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +@@ -810,7 +810,8 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman + v->SwathHeightY[k], + v->SwathHeightC[k], + TWait, +- v->DRAMSpeedPerState[mode_lib->vba.VoltageLevel] <= MEM_STROBE_FREQ_MHZ ? ++ (v->DRAMSpeedPerState[mode_lib->vba.VoltageLevel] <= MEM_STROBE_FREQ_MHZ || ++ v->DCFCLKPerState[mode_lib->vba.VoltageLevel] <= MIN_DCFCLK_FREQ_MHZ) ? + mode_lib->vba.ip.min_prefetch_in_strobe_us : 0, + /* Output */ + &v->DSTXAfterScaler[k], +@@ -3309,7 +3310,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l + v->swath_width_chroma_ub_this_state[k], + v->SwathHeightYThisState[k], + v->SwathHeightCThisState[k], v->TWait, +- v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ ? ++ (v->DRAMSpeedPerState[i] <= MEM_STROBE_FREQ_MHZ || v->DCFCLKState[i][j] <= MIN_DCFCLK_FREQ_MHZ) ? + mode_lib->vba.ip.min_prefetch_in_strobe_us : 0, + + /* Output */ +diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h +index 500b3dd6..d98e36a9 100644 +--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h ++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.h +@@ -53,6 +53,7 @@ + #define BPP_BLENDED_PIPE 0xffffffff + + #define MEM_STROBE_FREQ_MHZ 1600 ++#define MIN_DCFCLK_FREQ_MHZ 200 + #define MEM_STROBE_MAX_DELIVERY_TIME_US 60.0 + + struct display_mode_lib; +-- +2.35.3 + diff --git a/series.conf b/series.conf index ddbf80c..5561f86 100644 --- a/series.conf +++ b/series.conf @@ -936,6 +936,7 @@ patches.kernel.org/6.3.3-200-drm-amdgpu-jpeg-Remove-harvest-checking-for-JPE.patch patches.kernel.org/6.3.3-201-drm-amdgpu-change-gfx-11.0.4-external_id-range.patch patches.kernel.org/6.3.3-202-drm-amdgpu-Fix-vram-recover-doesn-t-work-after-.patch + patches.kernel.org/6.3.3-203-drm-amd-display-Enforce-60us-prefetch-for-200Mh.patch ######################################################## # Build fixes that apply to the vanilla kernel too.