From 6b764a594fc4e9f1caa537728a5a8e2192e18fc6 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Tue, 25 Apr 2017 11:38:35 +0100 Subject: [PATCH] drm/i915: Report request restarts for both execlists/guc Git-commit: 6b764a594fc4e9f1caa537728a5a8e2192e18fc6 Patch-mainline: v4.13-rc1 References: FATE#322643 bsc#1055900 As we now share the execlist_port[] tracking for both execlists/guc, we can reset the inflight count on both and report which requests are being restarted. Suggested-by: Michel Thierry Signed-off-by: Chris Wilson Cc: Michel Thierry Cc: Mika Kuoppala Cc: Tvrtko Ursulin Link: http://patchwork.freedesktop.org/patch/msgid/20170425103835.31871-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin Acked-by: Takashi Iwai --- drivers/gpu/drm/i915/intel_lrc.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1147,14 +1147,11 @@ static int intel_init_workaround_bb(stru return ret; } -static u32 port_seqno(struct execlist_port *port) -{ - return port->request ? port->request->global_seqno : 0; -} - static int gen8_init_common_ring(struct intel_engine_cs *engine) { struct drm_i915_private *dev_priv = engine->i915; + struct execlist_port *port = engine->execlist_port; + unsigned int n; int ret; ret = intel_mocs_init_engine(engine); @@ -1175,16 +1172,22 @@ static int gen8_init_common_ring(struct /* After a GPU reset, we may have requests to replay */ clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted); - if (!i915.enable_guc_submission && !execlists_elsp_idle(engine)) { - DRM_DEBUG_DRIVER("Restarting %s from requests [0x%x, 0x%x]\n", - engine->name, - port_seqno(&engine->execlist_port[0]), - port_seqno(&engine->execlist_port[1])); - engine->execlist_port[0].count = 0; - engine->execlist_port[1].count = 0; - execlists_submit_ports(engine); + + for (n = 0; n < ARRAY_SIZE(engine->execlist_port); n++) { + if (!port[n].request) + break; + + DRM_DEBUG_DRIVER("Restarting %s:%d from 0x%x\n", + engine->name, n, + port[n].request->global_seqno); + + /* Discard the current inflight count */ + port[n].count = 0; } + if (!i915.enable_guc_submission && !execlists_elsp_idle(engine)) + execlists_submit_ports(engine); + return 0; }