From b4e3c935b2313b3e557066b630efd0367c7fb34c Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 22 Nov 2017 22:25:10 +0000 Subject: [PATCH] drm/i915: Save/restore irq state for vlv_residency_raw() Git-commit: b4e3c935b2313b3e557066b630efd0367c7fb34c Patch-mainline: v4.16-rc1 References: FATE#322643 bsc#1055900 Since commit 6060b6aec03c ("drm/i915/pmu: Add RC6 residency metrics"), vlv_residency_raw() may be called from an irq-disabled context (via perf event sampling on remote cpu). As such, we can no longer assume that we are called from process context and must save/restore the irq state for the spinlock. Fixes: 6060b6aec03c ("drm/i915/pmu: Add RC6 residency metrics") Testcase: igt/perf_pmu/other-init-3 Signed-off-by: Chris Wilson Cc: Chris Wilson Link: https://patchwork.freedesktop.org/patch/msgid/20171122222510.22627-1-chris@chris-wilson.co.uk Reviewed-by: Tvrtko Ursulin Acked-by: Takashi Iwai --- drivers/gpu/drm/i915/intel_pm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -9396,12 +9396,13 @@ static u64 vlv_residency_raw(struct drm_ const i915_reg_t reg) { u32 lower, upper, tmp; + unsigned long flags; int loop = 2; /* The register accessed do not need forcewake. We borrow * uncore lock to prevent concurrent access to range reg. */ - spin_lock_irq(&dev_priv->uncore.lock); + spin_lock_irqsave(&dev_priv->uncore.lock, flags); /* vlv and chv residency counters are 40 bits in width. * With a control bit, we can choose between upper or lower @@ -9432,7 +9433,7 @@ static u64 vlv_residency_raw(struct drm_ * now. */ - spin_unlock_irq(&dev_priv->uncore.lock); + spin_unlock_irqrestore(&dev_priv->uncore.lock, flags); return lower | (u64)upper << 8; } @@ -9451,7 +9452,6 @@ u64 intel_rc6_residency_ns(struct drm_i9 mul = 1000000; div = dev_priv->czclk_freq; time_hw = vlv_residency_raw(dev_priv, reg); - } else { /* 833.33ns units on Gen9LP, 1.28us elsewhere. */ if (IS_GEN9_LP(dev_priv)) {