diff --git a/patches.kernel.org/6.3.3-218-drm-i915-mtl-Add-Wa_14017856879.patch b/patches.kernel.org/6.3.3-218-drm-i915-mtl-Add-Wa_14017856879.patch new file mode 100644 index 0000000..8338d6d --- /dev/null +++ b/patches.kernel.org/6.3.3-218-drm-i915-mtl-Add-Wa_14017856879.patch @@ -0,0 +1,58 @@ +From: Haridhar Kalvala +Date: Tue, 4 Apr 2023 23:02:20 +0530 +Subject: [PATCH] drm/i915/mtl: Add Wa_14017856879 +References: bsc#1012628 +Patch-mainline: 6.3.3 +Git-commit: 4b51210f98c2b89ce37aede5b8dc5105be0572c6 + +[ Upstream commit 4b51210f98c2b89ce37aede5b8dc5105be0572c6 ] + +Wa_14017856879 implementation for mtl. + +Bspec: 46046 + +Signed-off-by: Haridhar Kalvala +Reviewed-by: Gustavo Sousa +Signed-off-by: Matt Roper +Link: https://patchwork.freedesktop.org/patch/msgid/20230404173220.3175577-1-haridhar.kalvala@intel.com +Stable-dep-of: 81900e3a3775 ("drm/i915: disable sampler indirect state in bindless heap") +Signed-off-by: Sasha Levin +Signed-off-by: Jiri Slaby +--- + drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 ++ + drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++ + 2 files changed, 7 insertions(+) + +diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h +index 15b86368..72275749 100644 +--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h ++++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h +@@ -1172,7 +1172,9 @@ + #define THREAD_EX_ARB_MODE_RR_AFTER_DEP REG_FIELD_PREP(THREAD_EX_ARB_MODE, 0x2) + + #define HSW_ROW_CHICKEN3 _MMIO(0xe49c) ++#define GEN9_ROW_CHICKEN3 MCR_REG(0xe49c) + #define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6) ++#define MTL_DISABLE_FIX_FOR_EOT_FLUSH REG_BIT(9) + + #define GEN8_ROW_CHICKEN MCR_REG(0xe4f0) + #define FLOW_CONTROL_ENABLE REG_BIT(15) +diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c +index bfdffb6a..b7c6c078 100644 +--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c ++++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c +@@ -3015,6 +3015,11 @@ general_render_compute_wa_init(struct intel_engine_cs *engine, struct i915_wa_li + + add_render_compute_tuning_settings(i915, wal); + ++ if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_B0, STEP_FOREVER) || ++ IS_MTL_GRAPHICS_STEP(i915, P, STEP_B0, STEP_FOREVER)) ++ /* Wa_14017856879 */ ++ wa_mcr_masked_en(wal, GEN9_ROW_CHICKEN3, MTL_DISABLE_FIX_FOR_EOT_FLUSH); ++ + if (IS_MTL_GRAPHICS_STEP(i915, M, STEP_A0, STEP_B0) || + IS_MTL_GRAPHICS_STEP(i915, P, STEP_A0, STEP_B0)) + /* +-- +2.35.3 + diff --git a/series.conf b/series.conf index cd0bff5..9d8509d 100644 --- a/series.conf +++ b/series.conf @@ -951,6 +951,7 @@ patches.kernel.org/6.3.3-215-drm-amd-display-hpd-rx-irq-not-working-with-eDP.patch patches.kernel.org/6.3.3-216-drm-i915-Add-_PICK_EVEN_2RANGES.patch patches.kernel.org/6.3.3-217-drm-i915-mtl-Add-workarounds-Wa_14017066071-and.patch + patches.kernel.org/6.3.3-218-drm-i915-mtl-Add-Wa_14017856879.patch ######################################################## # Build fixes that apply to the vanilla kernel too.