From 9787e835fa98bbcd9abf90eff90c6f603d25d416 Mon Sep 17 00:00:00 2001 From: Rodrigo Vivi Date: Mon, 29 Jan 2018 15:22:22 -0800 Subject: [PATCH] drm/i915/cnl: Enable DDI-F on Cannonlake. Mime-version: 1.0 Content-type: text/plain; charset=UTF-8 Content-transfer-encoding: 8bit Git-commit: 9787e835fa98bbcd9abf90eff90c6f603d25d416 Patch-mainline: v4.17-rc1 References: FATE#322643 bsc#1055900 Now let's finish the Port-F support by adding the proper port F detection, irq and power well support. V2: Rebase V3: Use BIT_ULL V4: Cover missed case on ddi init. V5: Update commit message. V6: Rebase on top of display headers rework. V7: Squash power-well handling related to DDI F to this patch to avoid warns as pointed out by DK. V8: Introduce DDI_F_LANES to PG2. (DK) V9: Squash in the PORT_F case for enabling DP MST encoder. (DK) Cc: Dhinakaran Pandiyan Cc: Manasi Navare Cc: Ville Syrjälä Signed-off-by: Rodrigo Vivi Reviewed-by: David Weinehall Reviewed-by: Dhinakaran Pandiyan Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-9-rodrigo.vivi@intel.com Acked-by: Takashi Iwai --- drivers/gpu/drm/i915/i915_reg.h | 2 ++ drivers/gpu/drm/i915/intel_ddi.c | 4 ++++ drivers/gpu/drm/i915/intel_display.c | 6 +++++- drivers/gpu/drm/i915/intel_display.h | 2 ++ drivers/gpu/drm/i915/intel_dp.c | 3 ++- drivers/gpu/drm/i915/intel_runtime_pm.c | 20 +++++++++++++++++--- 6 files changed, 32 insertions(+), 5 deletions(-) --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1304,6 +1304,7 @@ enum i915_power_well_id { SKL_DISP_PW_DDI_B, SKL_DISP_PW_DDI_C, SKL_DISP_PW_DDI_D, + CNL_DISP_PW_DDI_F = 6, GLK_DISP_PW_AUX_A = 8, GLK_DISP_PW_AUX_B, @@ -8860,6 +8861,7 @@ enum skl_power_gate { #define SFUSE_STRAP_RAW_FREQUENCY (1<<8) #define SFUSE_STRAP_DISPLAY_DISABLED (1<<7) #define SFUSE_STRAP_CRT_DISABLED (1<<6) +#define SFUSE_STRAP_DDIF_DETECTED (1<<3) #define SFUSE_STRAP_DDIB_DETECTED (1<<2) #define SFUSE_STRAP_DDIC_DETECTED (1<<1) #define SFUSE_STRAP_DDID_DETECTED (1<<0) --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2907,6 +2907,10 @@ void intel_ddi_init(struct drm_i915_priv intel_dig_port->ddi_io_power_domain = POWER_DOMAIN_PORT_DDI_E_IO; break; + case PORT_F: + intel_dig_port->ddi_io_power_domain = + POWER_DOMAIN_PORT_DDI_F_IO; + break; default: MISSING_CASE(port); } --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5671,6 +5671,8 @@ enum intel_display_power_domain intel_po return POWER_DOMAIN_PORT_DDI_D_LANES; case PORT_E: return POWER_DOMAIN_PORT_DDI_E_LANES; + case PORT_F: + return POWER_DOMAIN_PORT_DDI_F_LANES; default: MISSING_CASE(port); return POWER_DOMAIN_PORT_OTHER; @@ -13643,7 +13645,7 @@ static void intel_setup_outputs(struct d if (found || IS_GEN9_BC(dev_priv)) intel_ddi_init(dev_priv, PORT_A); - /* DDI B, C and D detection is indicated by the SFUSE_STRAP + /* DDI B, C, D, and F detection is indicated by the SFUSE_STRAP * register */ found = I915_READ(SFUSE_STRAP); @@ -13653,6 +13655,8 @@ static void intel_setup_outputs(struct d intel_ddi_init(dev_priv, PORT_C); if (found & SFUSE_STRAP_DDID_DETECTED) intel_ddi_init(dev_priv, PORT_D); + if (found & SFUSE_STRAP_DDIF_DETECTED) + intel_ddi_init(dev_priv, PORT_F); /* * On SKL we don't have a way to detect DDI-E so we rely on VBT. */ --- a/drivers/gpu/drm/i915/intel_display.h +++ b/drivers/gpu/drm/i915/intel_display.h @@ -157,11 +157,13 @@ enum intel_display_power_domain { POWER_DOMAIN_PORT_DDI_C_LANES, POWER_DOMAIN_PORT_DDI_D_LANES, POWER_DOMAIN_PORT_DDI_E_LANES, + POWER_DOMAIN_PORT_DDI_F_LANES, POWER_DOMAIN_PORT_DDI_A_IO, POWER_DOMAIN_PORT_DDI_B_IO, POWER_DOMAIN_PORT_DDI_C_IO, POWER_DOMAIN_PORT_DDI_D_IO, POWER_DOMAIN_PORT_DDI_E_IO, + POWER_DOMAIN_PORT_DDI_F_IO, POWER_DOMAIN_PORT_DSI, POWER_DOMAIN_PORT_CRT, POWER_DOMAIN_PORT_OTHER, --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -6128,7 +6128,8 @@ intel_dp_init_connector(struct intel_dig /* init MST on ports that can support it */ if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) && - (port == PORT_B || port == PORT_C || port == PORT_D)) + (port == PORT_B || port == PORT_C || + port == PORT_D || port == PORT_F)) intel_dp_mst_encoder_init(intel_dig_port, intel_connector->base.base.id); --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -94,6 +94,8 @@ intel_display_power_domain_str(enum inte return "PORT_DDI_D_LANES"; case POWER_DOMAIN_PORT_DDI_E_LANES: return "PORT_DDI_E_LANES"; + case POWER_DOMAIN_PORT_DDI_F_LANES: + return "PORT_DDI_F_LANES"; case POWER_DOMAIN_PORT_DDI_A_IO: return "PORT_DDI_A_IO"; case POWER_DOMAIN_PORT_DDI_B_IO: @@ -104,6 +106,8 @@ intel_display_power_domain_str(enum inte return "PORT_DDI_D_IO"; case POWER_DOMAIN_PORT_DDI_E_IO: return "PORT_DDI_E_IO"; + case POWER_DOMAIN_PORT_DDI_F_IO: + return "PORT_DDI_F_IO"; case POWER_DOMAIN_PORT_DSI: return "PORT_DSI"; case POWER_DOMAIN_PORT_CRT: @@ -1827,6 +1831,7 @@ void intel_display_power_put(struct drm_ BIT_ULL(POWER_DOMAIN_PORT_DDI_B_LANES) | \ BIT_ULL(POWER_DOMAIN_PORT_DDI_C_LANES) | \ BIT_ULL(POWER_DOMAIN_PORT_DDI_D_LANES) | \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_F_LANES) | \ BIT_ULL(POWER_DOMAIN_AUX_B) | \ BIT_ULL(POWER_DOMAIN_AUX_C) | \ BIT_ULL(POWER_DOMAIN_AUX_D) | \ @@ -1861,6 +1866,9 @@ void intel_display_power_put(struct drm_ #define CNL_DISPLAY_AUX_F_POWER_DOMAINS ( \ BIT_ULL(POWER_DOMAIN_AUX_F) | \ BIT_ULL(POWER_DOMAIN_INIT)) +#define CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS ( \ + BIT_ULL(POWER_DOMAIN_PORT_DDI_F_IO) | \ + BIT_ULL(POWER_DOMAIN_INIT)) #define CNL_DISPLAY_DC_OFF_POWER_DOMAINS ( \ CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \ BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ @@ -2412,6 +2420,12 @@ static struct i915_power_well cnl_power_ .id = SKL_DISP_PW_DDI_D, }, { + .name = "DDI F IO power well", + .domains = CNL_DISPLAY_DDI_F_IO_POWER_DOMAINS, + .ops = &hsw_power_well_ops, + .id = CNL_DISP_PW_DDI_F, + }, + { .name = "AUX F", .domains = CNL_DISPLAY_AUX_F_POWER_DOMAINS, .ops = &hsw_power_well_ops, @@ -2534,13 +2548,13 @@ int intel_power_domains_init(struct drm_ set_power_wells(power_domains, cnl_power_wells); /* - * Aux IO is getting enabled for all ports + * DDI and Aux IO are getting enabled for all ports * regardless the presence or use. So, in order to avoid - * timeouts, lets remove it from the list + * timeouts, lets remove them from the list * for the SKUs without port F. */ if (!IS_CNL_WITH_PORT_F(dev_priv)) - power_domains->power_well_count -= 1; + power_domains->power_well_count -= 2; } else if (IS_BROXTON(dev_priv)) { set_power_wells(power_domains, bxt_power_wells);