From ec46d48360432cbc9280e52692ec2f15bd85bdca Mon Sep 17 00:00:00 2001 From: Imre Deak Date: Thu, 6 Jul 2017 17:40:33 +0300 Subject: [PATCH] drm/i915/hsw, bdw: Split power well set to enable/disable helpers Git-commit: ec46d48360432cbc9280e52692ec2f15bd85bdca Patch-mainline: v4.14-rc1 References: FATE#322643 bsc#1055900 We can reduce the code indentation by splitting the set helper to separate enable/disable helpers. This also allows us to unify the HSW/BDW and GEN9+ power well ops in follow-up patches, which introduces some differences between the enable and disable helpers. While at it also remove the redundant enable/disable debug messages, the same info is printed already elsewhere. Signed-off-by: Imre Deak Reviewed-by: Arkadiusz Hiler Link: https://patchwork.freedesktop.org/patch/msgid/1499352040-8819-12-git-send-email-imre.deak@intel.com Signed-off-by: Daniel Vetter Acked-by: Takashi Iwai --- drivers/gpu/drm/i915/intel_runtime_pm.c | 50 ++++++++++---------------------- 1 file changed, 17 insertions(+), 33 deletions(-) --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -396,30 +396,26 @@ static void gen9_wait_for_power_well_dis !!(reqs & 1), !!(reqs & 2), !!(reqs & 4), !!(reqs & 8)); } -static void hsw_set_power_well(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well, bool enable) +static void hsw_power_well_enable(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) { - uint32_t tmp; + I915_WRITE(HSW_PWR_WELL_DRIVER, HSW_PWR_WELL_ENABLE_REQUEST); - tmp = I915_READ(HSW_PWR_WELL_DRIVER); - - if (enable) { - I915_WRITE(HSW_PWR_WELL_DRIVER, HSW_PWR_WELL_ENABLE_REQUEST); + if (intel_wait_for_register(dev_priv, + HSW_PWR_WELL_DRIVER, + HSW_PWR_WELL_STATE_ENABLED, + HSW_PWR_WELL_STATE_ENABLED, + 20)) + DRM_ERROR("Timeout enabling power well\n"); + hsw_power_well_post_enable(dev_priv); +} - DRM_DEBUG_KMS("Enabling power well\n"); - if (intel_wait_for_register(dev_priv, - HSW_PWR_WELL_DRIVER, - HSW_PWR_WELL_STATE_ENABLED, - HSW_PWR_WELL_STATE_ENABLED, - 20)) - DRM_ERROR("Timeout enabling power well\n"); - hsw_power_well_post_enable(dev_priv); - } else { - hsw_power_well_pre_disable(dev_priv); - I915_WRITE(HSW_PWR_WELL_DRIVER, 0); - POSTING_READ(HSW_PWR_WELL_DRIVER); - DRM_DEBUG_KMS("Requesting to disable the power well\n"); - } +static void hsw_power_well_disable(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well) +{ + hsw_power_well_pre_disable(dev_priv); + I915_WRITE(HSW_PWR_WELL_DRIVER, 0); + POSTING_READ(HSW_PWR_WELL_DRIVER); } #define SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \ @@ -889,18 +885,6 @@ static void hsw_power_well_sync_hw(struc } } -static void hsw_power_well_enable(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) -{ - hsw_set_power_well(dev_priv, power_well, true); -} - -static void hsw_power_well_disable(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well) -{ - hsw_set_power_well(dev_priv, power_well, false); -} - static bool skl_power_well_enabled(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) {