From 3c2d06714d6e083eba94a1a4e865f6acb98ef611 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Mon, 18 Dec 2017 15:19:58 +0000 Subject: [PATCH] drm/i915: reorder field in gem_request tracepoints Git-commit: 3c2d06714d6e083eba94a1a4e865f6acb98ef611 Patch-mainline: v4.16-rc1 References: FATE#322643 bsc#1055900 Let's make the order of the fields of the tracepoints involving gem request match across i915. This makes userspace processing of tracepoint a bit easier. Suggested-by: Chris Wilson Signed-off-by: Lionel Landwerlin Reviewed-by: Chris Wilson Link: https://patchwork.freedesktop.org/patch/msgid/20171218151959.14073-2-lionel.g.landwerlin@intel.com Acked-by: Takashi Iwai --- drivers/gpu/drm/i915/i915_trace.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -640,8 +640,8 @@ DECLARE_EVENT_CLASS(i915_gem_request, TP_STRUCT__entry( __field(u32, dev) - __field(u32, ctx) __field(u32, ring) + __field(u32, ctx) __field(u32, seqno) __field(u32, global) ), @@ -683,9 +683,9 @@ DECLARE_EVENT_CLASS(i915_gem_request_hw, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, ctx) __field(u32, seqno) __field(u32, global_seqno) - __field(u32, ctx) __field(u32, port) ),