From: Ben Skeggs Date: Tue, 8 May 2018 20:39:47 +1000 Subject: drm/nouveau/gr/gf100-: update 419a3c where required Git-commit: 8d56fc48d3563cb3767c1d3dd243974168067f99 Patch-mainline: v4.18-rc1 References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166 Signed-off-by: Ben Skeggs Acked-by: Petr Tesarik --- drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c | 2 ++ drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h | 2 ++ drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c | 8 ++++++++ drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp107.c | 1 + 6 files changed, 15 insertions(+) --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c @@ -1434,6 +1434,8 @@ gf100_grctx_generate_main(struct gf100_g grctx->r419e00(gr); if (grctx->r418e94) grctx->r418e94(gr); + if (grctx->r419a3c) + grctx->r419a3c(gr); } #define CB_RESERVED 0x80000 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h @@ -68,6 +68,7 @@ struct gf100_grctx_func { void (*r419eb0)(struct gf100_gr *); void (*r419e00)(struct gf100_gr *); void (*r418e94)(struct gf100_gr *); + void (*r419a3c)(struct gf100_gr *); }; extern const struct gf100_grctx_func gf100_grctx; @@ -129,6 +130,7 @@ void gm200_grctx_generate_dist_skip_tabl void gm200_grctx_generate_r406500(struct gf100_gr *); void gm200_grctx_generate_tpc_mask(struct gf100_gr *); void gm200_grctx_generate_smid_config(struct gf100_gr *); +void gm200_grctx_generate_r419a3c(struct gf100_gr *); extern const struct gf100_grctx_func gm20b_grctx; --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.c @@ -27,6 +27,13 @@ * PGRAPH context implementation ******************************************************************************/ +void +gm200_grctx_generate_r419a3c(struct gf100_gr *gr) +{ + struct nvkm_device *device = gr->base.engine.subdev.device; + nvkm_mask(device, 0x419a3c, 0x00000014, 0x00000000); +} + static void gm200_grctx_generate_r418e94(struct gf100_gr *gr) { @@ -152,4 +159,5 @@ gm200_grctx = { .tpc_mask = gm200_grctx_generate_tpc_mask, .smid_config = gm200_grctx_generate_smid_config, .r418e94 = gm200_grctx_generate_r418e94, + .r419a3c = gm200_grctx_generate_r419a3c, }; --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.c @@ -165,4 +165,5 @@ gp100_grctx = { .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr, .tpc_mask = gm200_grctx_generate_tpc_mask, .smid_config = gp100_grctx_generate_smid_config, + .r419a3c = gm200_grctx_generate_r419a3c, }; --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.c @@ -101,4 +101,5 @@ gp102_grctx = { .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr, .tpc_mask = gm200_grctx_generate_tpc_mask, .smid_config = gp100_grctx_generate_smid_config, + .r419a3c = gm200_grctx_generate_r419a3c, }; --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp107.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp107.c @@ -51,4 +51,5 @@ gp107_grctx = { .gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr, .tpc_mask = gm200_grctx_generate_tpc_mask, .smid_config = gp100_grctx_generate_smid_config, + .r419a3c = gm200_grctx_generate_r419a3c, };