diff --git a/README.BRANCH b/README.BRANCH index ab1621e..48bccf3 100644 --- a/README.BRANCH +++ b/README.BRANCH @@ -5,7 +5,7 @@ The persons in charge of this branch are: Mel Gorman Jeffrey Cheung -It is the above person's responsiblity for checking in this kernel to +It is the above persons' responsiblity for checking in this kernel to the build system, anyone else who wishes to do so, needs to get permission from them first. diff --git a/config/x86_64/rt b/config/x86_64/rt index 9f05c83..8ed5c48 100644 --- a/config/x86_64/rt +++ b/config/x86_64/rt @@ -1,10 +1,10 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/x86_64 5.3.0-rc4 Kernel Configuration +# Linux/x86_64 5.3.0-rc7 Kernel Configuration # # -# Compiler: gcc-7 (SUSE Linux) 7.4.1 20190725 [gcc-7-branch revision 273795] +# Compiler: gcc (SUSE Linux) 7.4.1 20190424 [gcc-7-branch revision 270538] # CONFIG_CC_IS_GCC=y CONFIG_GCC_VERSION=70401 @@ -89,8 +89,8 @@ CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ_COMMON=y # CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set +# CONFIG_NO_HZ_IDLE is not set +CONFIG_NO_HZ_FULL=y CONFIG_CONTEXT_TRACKING=y # CONFIG_CONTEXT_TRACKING_FORCE is not set CONFIG_NO_HZ=y @@ -105,7 +105,6 @@ CONFIG_PREEMPT_NONE=y # CPU/Task time and stats accounting # CONFIG_VIRT_CPU_ACCOUNTING=y -# CONFIG_TICK_CPU_ACCOUNTING is not set CONFIG_VIRT_CPU_ACCOUNTING_GEN=y # CONFIG_IRQ_TIME_ACCOUNTING is not set CONFIG_BSD_PROCESS_ACCT=y @@ -130,6 +129,7 @@ CONFIG_TREE_SRCU=y CONFIG_TASKS_RCU=y CONFIG_RCU_STALL_COMMON=y CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_NOCB_CPU=y # end of RCU Subsystem CONFIG_BUILD_BIN2C=y @@ -137,7 +137,7 @@ CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y # CONFIG_IKHEADERS is not set CONFIG_LOG_BUF_SHIFT=18 -CONFIG_LOG_CPU_MAX_BUF_SHIFT=15 +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y @@ -194,7 +194,7 @@ CONFIG_RD_BZIP2=y CONFIG_RD_LZMA=y CONFIG_RD_XZ=y CONFIG_RD_LZO=y -CONFIG_RD_LZ4=y +# CONFIG_RD_LZ4 is not set CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y @@ -257,7 +257,7 @@ CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_SLAB_MERGE_DEFAULT=y CONFIG_SLAB_FREELIST_RANDOM=y -# CONFIG_SLAB_FREELIST_HARDENED is not set +CONFIG_SLAB_FREELIST_HARDENED=y CONFIG_SHUFFLE_PAGE_ALLOCATOR=y CONFIG_SLUB_CPU_PARTIAL=y CONFIG_SYSTEM_DATA_VERIFICATION=y @@ -373,11 +373,11 @@ CONFIG_DMI=y CONFIG_GART_IOMMU=y CONFIG_CALGARY_IOMMU=y # CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT is not set -# CONFIG_MAXSMP is not set -CONFIG_NR_CPUS_RANGE_BEGIN=2 -CONFIG_NR_CPUS_RANGE_END=512 -CONFIG_NR_CPUS_DEFAULT=64 -CONFIG_NR_CPUS=512 +CONFIG_MAXSMP=y +CONFIG_NR_CPUS_RANGE_BEGIN=8192 +CONFIG_NR_CPUS_RANGE_END=8192 +CONFIG_NR_CPUS_DEFAULT=8192 +CONFIG_NR_CPUS=8192 CONFIG_SCHED_SMT=y CONFIG_SCHED_MC=y CONFIG_SCHED_MC_PRIO=y @@ -402,14 +402,13 @@ CONFIG_PERF_EVENTS_AMD_POWER=m # end of Performance monitoring # CONFIG_VM86 is not set -CONFIG_X86_16BIT=y -CONFIG_X86_ESPFIX64=y +# CONFIG_X86_16BIT is not set CONFIG_X86_VSYSCALL_EMULATION=y CONFIG_I8K=m CONFIG_MICROCODE=y CONFIG_MICROCODE_INTEL=y CONFIG_MICROCODE_AMD=y -CONFIG_MICROCODE_OLD_INTERFACE=y +# CONFIG_MICROCODE_OLD_INTERFACE is not set CONFIG_X86_MSR=m CONFIG_X86_CPUID=m # CONFIG_X86_5LEVEL is not set @@ -423,7 +422,7 @@ CONFIG_AMD_NUMA=y CONFIG_X86_64_ACPI_NUMA=y CONFIG_NODES_SPAN_OTHER_NODES=y CONFIG_NUMA_EMU=y -CONFIG_NODES_SHIFT=9 +CONFIG_NODES_SHIFT=10 CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y @@ -503,10 +502,8 @@ CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PM_WAKELOCKS_GC=y +# CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y CONFIG_PM_DEBUG=y CONFIG_PM_ADVANCED_DEBUG=y @@ -530,7 +527,7 @@ CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_SPCR_TABLE=y CONFIG_ACPI_LPIT=y CONFIG_ACPI_SLEEP=y -# CONFIG_ACPI_PROCFS_POWER is not set +CONFIG_ACPI_PROCFS_POWER=y CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y CONFIG_ACPI_EC_DEBUGFS=m CONFIG_ACPI_AC=m @@ -579,12 +576,7 @@ CONFIG_DPTF_POWER=m CONFIG_ACPI_WATCHDOG=y CONFIG_ACPI_EXTLOG=m CONFIG_ACPI_ADXL=y -CONFIG_PMIC_OPREGION=y -CONFIG_CRC_PMIC_OPREGION=y -CONFIG_XPOWER_PMIC_OPREGION=y -CONFIG_BXT_WC_PMIC_OPREGION=y -CONFIG_CHT_WC_PMIC_OPREGION=y -CONFIG_CHT_DC_TI_PMIC_OPREGION=y +# CONFIG_PMIC_OPREGION is not set CONFIG_ACPI_CONFIGFS=m CONFIG_X86_PM_TIMER=y # CONFIG_SFI is not set @@ -658,7 +650,7 @@ CONFIG_AMD_NB=y # Binary Emulations # CONFIG_IA32_EMULATION=y -CONFIG_X86_X32=y +# CONFIG_X86_X32 is not set CONFIG_COMPAT_32=y CONFIG_COMPAT=y CONFIG_COMPAT_FOR_U64_ALIGNMENT=y @@ -687,8 +679,7 @@ CONFIG_FW_CFG_SYSFS_CMDLINE=y # CONFIG_EFI_VARS=y CONFIG_EFI_ESRT=y -CONFIG_EFI_VARS_PSTORE=m -# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set +# CONFIG_EFI_VARS_PSTORE is not set CONFIG_EFI_RUNTIME_MAP=y # CONFIG_EFI_FAKE_MEMMAP is not set CONFIG_EFI_RUNTIME_WRAPPERS=y @@ -797,7 +788,7 @@ CONFIG_HAVE_ARCH_STACKLEAK=y CONFIG_HAVE_STACKPROTECTOR=y CONFIG_CC_HAS_STACKPROTECTOR_NONE=y CONFIG_STACKPROTECTOR=y -# CONFIG_STACKPROTECTOR_STRONG is not set +CONFIG_STACKPROTECTOR_STRONG=y CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES=y CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y @@ -998,8 +989,8 @@ CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y CONFIG_HWPOISON_INJECT=m CONFIG_TRANSPARENT_HUGEPAGE=y -# CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS is not set -CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_THP_SWAP=y CONFIG_TRANSPARENT_HUGE_PAGECACHE=y @@ -1019,9 +1010,10 @@ CONFIG_DEFERRED_STRUCT_PAGE_INIT=y # CONFIG_IDLE_PAGE_TRACKING is not set CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DEVICE=y +CONFIG_MIGRATE_VMA_HELPER=y CONFIG_DEV_PAGEMAP_OPS=y -# CONFIG_HMM_MIRROR is not set -# CONFIG_DEVICE_PRIVATE is not set +CONFIG_HMM_MIRROR=y +CONFIG_DEVICE_PRIVATE=y CONFIG_FRAME_VECTOR=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y CONFIG_ARCH_HAS_PKEYS=y @@ -1057,8 +1049,7 @@ CONFIG_XFRM_MIGRATE=y CONFIG_XFRM_IPCOMP=m CONFIG_NET_KEY=m CONFIG_NET_KEY_MIGRATE=y -CONFIG_SMC=m -CONFIG_SMC_DIAG=m +# CONFIG_SMC is not set CONFIG_XDP_SOCKETS=y CONFIG_XDP_SOCKETS_DIAG=m CONFIG_INET=y @@ -1069,10 +1060,7 @@ CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_ROUTE_CLASSID=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y +# CONFIG_IP_PNP is not set CONFIG_NET_IPIP=m CONFIG_NET_IPGRE_DEMUX=m CONFIG_NET_IP_TUNNEL=m @@ -1134,7 +1122,7 @@ CONFIG_INET6_XFRM_TUNNEL=m CONFIG_INET6_TUNNEL=m CONFIG_IPV6_VTI=m CONFIG_IPV6_SIT=m -CONFIG_IPV6_SIT_6RD=y +# CONFIG_IPV6_SIT_6RD is not set CONFIG_IPV6_NDISC_NODETYPE=y CONFIG_IPV6_TUNNEL=m CONFIG_IPV6_GRE=m @@ -1416,7 +1404,7 @@ CONFIG_NF_FLOW_TABLE_IPV4=m CONFIG_NF_DUP_IPV4=m CONFIG_NF_LOG_ARP=m CONFIG_NF_LOG_IPV4=m -CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_REJECT_IPV4=y CONFIG_NF_NAT_SNMP_BASIC=m CONFIG_NF_NAT_PPTP=m CONFIG_NF_NAT_H323=m @@ -1454,7 +1442,7 @@ CONFIG_NFT_DUP_IPV6=m CONFIG_NFT_FIB_IPV6=m CONFIG_NF_FLOW_TABLE_IPV6=m CONFIG_NF_DUP_IPV6=m -CONFIG_NF_REJECT_IPV6=m +CONFIG_NF_REJECT_IPV6=y CONFIG_NF_LOG_IPV6=m CONFIG_IP6_NF_IPTABLES=m CONFIG_IP6_NF_MATCH_AH=m @@ -1508,24 +1496,7 @@ CONFIG_BRIDGE_EBT_LOG=m CONFIG_BRIDGE_EBT_NFLOG=m CONFIG_BPFILTER=y CONFIG_BPFILTER_UMH=m -CONFIG_IP_DCCP=m -CONFIG_INET_DCCP_DIAG=m - -# -# DCCP CCIDs Configuration -# -# CONFIG_IP_DCCP_CCID2_DEBUG is not set -CONFIG_IP_DCCP_CCID3=y -# CONFIG_IP_DCCP_CCID3_DEBUG is not set -CONFIG_IP_DCCP_TFRC_LIB=y -# end of DCCP CCIDs Configuration - -# -# DCCP Kernel Hacking -# -# CONFIG_IP_DCCP_DEBUG is not set -# end of DCCP Kernel Hacking - +# CONFIG_IP_DCCP is not set CONFIG_IP_SCTP=m # CONFIG_SCTP_DBG_OBJCNT is not set CONFIG_SCTP_DEFAULT_COOKIE_HMAC_MD5=y @@ -1561,20 +1532,32 @@ CONFIG_BRIDGE=m CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y CONFIG_HAVE_NET_DSA=y -# CONFIG_NET_DSA is not set +CONFIG_NET_DSA=m +CONFIG_NET_DSA_TAG_8021Q=m +CONFIG_NET_DSA_TAG_BRCM_COMMON=m +CONFIG_NET_DSA_TAG_BRCM=m +CONFIG_NET_DSA_TAG_BRCM_PREPEND=m +CONFIG_NET_DSA_TAG_GSWIP=m +CONFIG_NET_DSA_TAG_DSA=m +CONFIG_NET_DSA_TAG_EDSA=m +CONFIG_NET_DSA_TAG_MTK=m +CONFIG_NET_DSA_TAG_KSZ_COMMON=m +CONFIG_NET_DSA_TAG_KSZ=m +CONFIG_NET_DSA_TAG_KSZ9477=m +CONFIG_NET_DSA_TAG_QCA=m +CONFIG_NET_DSA_TAG_LAN9303=m +CONFIG_NET_DSA_TAG_SJA1105=m +CONFIG_NET_DSA_TAG_TRAILER=m CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y # CONFIG_DECNET is not set CONFIG_LLC=m -CONFIG_LLC2=m -CONFIG_ATALK=m -CONFIG_DEV_APPLETALK=m -CONFIG_IPDDP=m -CONFIG_IPDDP_ENCAP=y -CONFIG_X25=m -CONFIG_LAPB=m -CONFIG_PHONET=m +# CONFIG_LLC2 is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_PHONET is not set CONFIG_6LOWPAN=m # CONFIG_6LOWPAN_DEBUGFS is not set CONFIG_6LOWPAN_NHC=m @@ -1591,11 +1574,7 @@ CONFIG_6LOWPAN_GHC_ICMPV6=m CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m -CONFIG_IEEE802154=m -# CONFIG_IEEE802154_NL802154_EXPERIMENTAL is not set -CONFIG_IEEE802154_SOCKET=m -CONFIG_IEEE802154_6LOWPAN=m -CONFIG_MAC802154=m +# CONFIG_IEEE802154 is not set CONFIG_NET_SCHED=y # @@ -1688,16 +1667,7 @@ CONFIG_NET_IFE_SKBTCINDEX=m CONFIG_NET_SCH_FIFO=y CONFIG_DCB=y CONFIG_DNS_RESOLVER=m -CONFIG_BATMAN_ADV=m -CONFIG_BATMAN_ADV_BATMAN_V=y -CONFIG_BATMAN_ADV_BLA=y -CONFIG_BATMAN_ADV_DAT=y -CONFIG_BATMAN_ADV_NC=y -CONFIG_BATMAN_ADV_MCAST=y -CONFIG_BATMAN_ADV_DEBUGFS=y -CONFIG_BATMAN_ADV_DEBUG=y -CONFIG_BATMAN_ADV_SYSFS=y -# CONFIG_BATMAN_ADV_TRACING is not set +# CONFIG_BATMAN_ADV is not set CONFIG_OPENVSWITCH=m CONFIG_OPENVSWITCH_GRE=m CONFIG_OPENVSWITCH_VXLAN=m @@ -1738,28 +1708,7 @@ CONFIG_NET_DROP_MONITOR=m # end of Network testing # end of Networking options -CONFIG_HAMRADIO=y - -# -# Packet Radio protocols -# -CONFIG_AX25=m -CONFIG_AX25_DAMA_SLAVE=y -CONFIG_NETROM=m -CONFIG_ROSE=m - -# -# AX.25 network device drivers -# -CONFIG_MKISS=m -CONFIG_6PACK=m -CONFIG_BPQETHER=m -CONFIG_BAYCOM_SER_FDX=m -CONFIG_BAYCOM_SER_HDX=m -CONFIG_BAYCOM_PAR=m -CONFIG_YAM=m -# end of AX.25 network device drivers - +# CONFIG_HAMRADIO is not set CONFIG_CAN=m CONFIG_CAN_RAW=m CONFIG_CAN_BCM=m @@ -1783,22 +1732,12 @@ CONFIG_CAN_PEAK_PCIEFD=m CONFIG_CAN_SJA1000=m # CONFIG_CAN_SJA1000_ISA is not set # CONFIG_CAN_SJA1000_PLATFORM is not set -CONFIG_CAN_EMS_PCMCIA=m CONFIG_CAN_EMS_PCI=m -CONFIG_CAN_PEAK_PCMCIA=m CONFIG_CAN_PEAK_PCI=m CONFIG_CAN_PEAK_PCIEC=y CONFIG_CAN_KVASER_PCI=m CONFIG_CAN_PLX_PCI=m -CONFIG_CAN_SOFTING=m -CONFIG_CAN_SOFTING_CS=m - -# -# CAN SPI interfaces -# -CONFIG_CAN_HI311X=m -# CONFIG_CAN_MCP251X is not set -# end of CAN SPI interfaces +# CONFIG_CAN_SOFTING is not set # # CAN USB interfaces @@ -1823,7 +1762,6 @@ CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_BNEP=m CONFIG_BT_BNEP_MC_FILTER=y CONFIG_BT_BNEP_PROTO_FILTER=y -CONFIG_BT_CMTP=m CONFIG_BT_HIDP=m CONFIG_BT_HS=y CONFIG_BT_LE=y @@ -1861,23 +1799,17 @@ CONFIG_BT_HCIUART_MRVL=y CONFIG_BT_HCIBCM203X=m CONFIG_BT_HCIBPA10X=m CONFIG_BT_HCIBFUSB=m -CONFIG_BT_HCIDTL1=m -CONFIG_BT_HCIBT3C=m -CONFIG_BT_HCIBLUECARD=m CONFIG_BT_HCIVHCI=m CONFIG_BT_MRVL=m CONFIG_BT_MRVL_SDIO=m CONFIG_BT_ATH3K=m +CONFIG_BT_WILINK=m CONFIG_BT_MTKSDIO=m CONFIG_BT_MTKUART=m CONFIG_BT_HCIRSI=m # end of Bluetooth device drivers -CONFIG_AF_RXRPC=m -CONFIG_AF_RXRPC_IPV6=y -# CONFIG_AF_RXRPC_INJECT_LOSS is not set -# CONFIG_AF_RXRPC_DEBUG is not set -CONFIG_RXKAD=y +# CONFIG_AF_RXRPC is not set CONFIG_AF_KCM=m CONFIG_STREAM_PARSER=y CONFIG_FIB_RULES=y @@ -1914,8 +1846,7 @@ CONFIG_MAC80211_DEBUGFS=y # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_MAC80211_STA_HASH_MAX_SIZE=0 -CONFIG_WIMAX=m -CONFIG_WIMAX_DEBUG_LEVEL=8 +# CONFIG_WIMAX is not set CONFIG_RFKILL=m CONFIG_RFKILL_LEDS=y CONFIG_RFKILL_INPUT=y @@ -1925,17 +1856,13 @@ CONFIG_NET_9P_VIRTIO=m CONFIG_NET_9P_XEN=m CONFIG_NET_9P_RDMA=m # CONFIG_NET_9P_DEBUG is not set -CONFIG_CAIF=m -# CONFIG_CAIF_DEBUG is not set -CONFIG_CAIF_NETDEV=m -CONFIG_CAIF_USB=m +# CONFIG_CAIF is not set CONFIG_CEPH_LIB=m -CONFIG_CEPH_LIB_PRETTYDEBUG=y +# CONFIG_CEPH_LIB_PRETTYDEBUG is not set # CONFIG_CEPH_LIB_USE_DNS_RESOLVER is not set CONFIG_NFC=m CONFIG_NFC_DIGITAL=m CONFIG_NFC_NCI=m -# CONFIG_NFC_NCI_SPI is not set CONFIG_NFC_NCI_UART=m CONFIG_NFC_HCI=m CONFIG_NFC_SHDLC=y @@ -1943,7 +1870,6 @@ CONFIG_NFC_SHDLC=y # # Near Field Communication (NFC) devices # -# CONFIG_NFC_TRF7970A is not set CONFIG_NFC_MEI_PHY=m CONFIG_NFC_SIM=m CONFIG_NFC_PORT100=m @@ -1966,12 +1892,10 @@ CONFIG_NFC_ST21NFCA=m CONFIG_NFC_ST21NFCA_I2C=m CONFIG_NFC_ST_NCI=m CONFIG_NFC_ST_NCI_I2C=m -CONFIG_NFC_ST_NCI_SPI=m CONFIG_NFC_NXP_NCI=m CONFIG_NFC_NXP_NCI_I2C=m CONFIG_NFC_S3FWRN5=m CONFIG_NFC_S3FWRN5_I2C=m -CONFIG_NFC_ST95HF=m # end of Near Field Communication (NFC) devices CONFIG_PSAMPLE=m @@ -2069,22 +1993,13 @@ CONFIG_PCI_SW_SWITCHTEC=m # end of PCI switch controller drivers CONFIG_PCCARD=m -CONFIG_PCMCIA=m -CONFIG_PCMCIA_LOAD_CIS=y +# CONFIG_PCMCIA is not set CONFIG_CARDBUS=y # # PC-card bridges # -CONFIG_YENTA=m -CONFIG_YENTA_O2=y -CONFIG_YENTA_RICOH=y -CONFIG_YENTA_TI=y -CONFIG_YENTA_ENE_TUNE=y -CONFIG_YENTA_TOSHIBA=y -CONFIG_PD6729=m -CONFIG_I82092=m -CONFIG_PCCARD_NONSTATIC=y +# CONFIG_YENTA is not set CONFIG_RAPIDIO=m CONFIG_RAPIDIO_TSI721=m CONFIG_RAPIDIO_DISC_TIMEOUT=30 @@ -2140,11 +2055,8 @@ CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_SPI=y -CONFIG_REGMAP_W1=m CONFIG_REGMAP_MMIO=m CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_SOUNDWIRE=m CONFIG_REGMAP_SCCB=m CONFIG_DMA_SHARED_BUFFER=y # CONFIG_DMA_FENCE_TRACE is not set @@ -2243,8 +2155,6 @@ CONFIG_MTD_SCB2_FLASH=m CONFIG_MTD_NETtel=m CONFIG_MTD_L440GX=m CONFIG_MTD_PCI=m -CONFIG_MTD_PCMCIA=m -# CONFIG_MTD_PCMCIA_ANONYMOUS is not set CONFIG_MTD_INTEL_VR_NOR=m CONFIG_MTD_PLATRAM=m # end of Mapping drivers for chip access @@ -2255,10 +2165,6 @@ CONFIG_MTD_PLATRAM=m CONFIG_MTD_PMC551=m CONFIG_MTD_PMC551_BUGFIX=y # CONFIG_MTD_PMC551_DEBUG is not set -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_MCHP23K256 is not set -# CONFIG_MTD_SST25L is not set CONFIG_MTD_SLRAM=m CONFIG_MTD_PHRAM=m CONFIG_MTD_MTDRAM=m @@ -2269,7 +2175,9 @@ CONFIG_MTD_BLOCK2MTD=m # # Disk-On-Chip Device Drivers # -# CONFIG_MTD_DOCG3 is not set +CONFIG_MTD_DOCG3=m +CONFIG_BCH_CONST_M=14 +CONFIG_BCH_CONST_T=4 # end of Self-contained MTD device drivers CONFIG_MTD_NAND_CORE=m @@ -2303,7 +2211,6 @@ CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y -CONFIG_MTD_SPI_NAND=m # # LPDDR & LPDDR2 PCM memory drivers @@ -2331,7 +2238,6 @@ CONFIG_PARPORT_PC=m CONFIG_PARPORT_SERIAL=m CONFIG_PARPORT_PC_FIFO=y CONFIG_PARPORT_PC_SUPERIO=y -CONFIG_PARPORT_PC_PCMCIA=m # CONFIG_PARPORT_GSC is not set CONFIG_PARPORT_AX88796=m CONFIG_PARPORT_1284=y @@ -2345,38 +2251,10 @@ CONFIG_PNP=y CONFIG_PNPACPI=y CONFIG_BLK_DEV=y CONFIG_BLK_DEV_NULL_BLK=m -# CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION is not set +CONFIG_BLK_DEV_NULL_BLK_FAULT_INJECTION=y CONFIG_BLK_DEV_FD=m CONFIG_CDROM=m -CONFIG_PARIDE=m - -# -# Parallel IDE high-level drivers -# -CONFIG_PARIDE_PD=m -CONFIG_PARIDE_PCD=m -CONFIG_PARIDE_PF=m -CONFIG_PARIDE_PT=m -CONFIG_PARIDE_PG=m - -# -# Parallel IDE protocol modules -# -CONFIG_PARIDE_ATEN=m -CONFIG_PARIDE_BPCK=m -CONFIG_PARIDE_COMM=m -CONFIG_PARIDE_DSTR=m -CONFIG_PARIDE_FIT2=m -CONFIG_PARIDE_FIT3=m -CONFIG_PARIDE_EPAT=m -CONFIG_PARIDE_EPATC8=y -CONFIG_PARIDE_EPIA=m -CONFIG_PARIDE_FRIQ=m -CONFIG_PARIDE_FRPW=m -CONFIG_PARIDE_KBIC=m -CONFIG_PARIDE_KTTI=m -CONFIG_PARIDE_ON20=m -CONFIG_PARIDE_ON26=m +# CONFIG_PARIDE is not set CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m CONFIG_ZRAM=m CONFIG_ZRAM_WRITEBACK=y @@ -2386,8 +2264,7 @@ CONFIG_BLK_DEV_UMEM=m CONFIG_BLK_DEV_LOOP=m CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 CONFIG_BLK_DEV_CRYPTOLOOP=m -CONFIG_BLK_DEV_DRBD=m -# CONFIG_DRBD_FAULT_INJECTION is not set +# CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_SKD=m CONFIG_BLK_DEV_SX8=m @@ -2403,7 +2280,7 @@ CONFIG_XEN_BLKDEV_BACKEND=m CONFIG_VIRTIO_BLK=m # CONFIG_VIRTIO_BLK_SCSI is not set CONFIG_BLK_DEV_RBD=m -CONFIG_BLK_DEV_RSXX=m +# CONFIG_BLK_DEV_RSXX is not set # # NVME Support @@ -2429,7 +2306,6 @@ CONFIG_NVME_TARGET_TCP=m CONFIG_SENSORS_LIS3LV02D=m CONFIG_AD525X_DPOT=m CONFIG_AD525X_DPOT_I2C=m -# CONFIG_AD525X_DPOT_SPI is not set CONFIG_DUMMY_IRQ=m CONFIG_IBM_ASM=m CONFIG_PHANTOM=m @@ -2451,7 +2327,6 @@ CONFIG_SENSORS_APDS990X=m CONFIG_HMC6352=m CONFIG_DS1682=m CONFIG_VMWARE_BALLOON=m -# CONFIG_LATTICE_ECP3_CONFIG is not set # CONFIG_SRAM is not set CONFIG_PCI_ENDPOINT_TEST=m # CONFIG_XILINX_SDFEC is not set @@ -2464,11 +2339,9 @@ CONFIG_C2PORT_DURAMAR_2150=m # EEPROM support # CONFIG_EEPROM_AT24=m -# CONFIG_EEPROM_AT25 is not set CONFIG_EEPROM_LEGACY=m CONFIG_EEPROM_MAX6875=m CONFIG_EEPROM_93CX6=m -# CONFIG_EEPROM_93XX46 is not set CONFIG_EEPROM_IDT_89HPESX=m CONFIG_EEPROM_EE1004=m # end of EEPROM support @@ -2480,7 +2353,7 @@ CONFIG_CB710_DEBUG_ASSUMPTIONS=y # # Texas Instruments shared transport line discipline # -# CONFIG_TI_ST is not set +CONFIG_TI_ST=m # end of Texas Instruments shared transport line discipline CONFIG_SENSORS_LIS3_I2C=m @@ -2498,12 +2371,12 @@ CONFIG_VMWARE_VMCI=m # # Intel MIC Bus Driver # -CONFIG_INTEL_MIC_BUS=m +# CONFIG_INTEL_MIC_BUS is not set # # SCIF Bus Driver # -CONFIG_SCIF_BUS=m +# CONFIG_SCIF_BUS is not set # # VOP Bus Driver @@ -2513,22 +2386,18 @@ CONFIG_VOP_BUS=m # # Intel MIC Host Driver # -CONFIG_INTEL_MIC_HOST=m # # Intel MIC Card Driver # -CONFIG_INTEL_MIC_CARD=m # # SCIF Driver # -CONFIG_SCIF=m # # Intel MIC Coprocessor State Management (COSM) Drivers # -CONFIG_MIC_COSM=m # # VOP Driver @@ -2537,8 +2406,7 @@ CONFIG_VOP=m CONFIG_VHOST_RING=m # end of Intel MIC & related support -CONFIG_GENWQE=m -CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY=0 +# CONFIG_GENWQE is not set CONFIG_ECHO=m CONFIG_MISC_ALCOR_PCI=m CONFIG_MISC_RTSX_PCI=m @@ -2552,9 +2420,9 @@ CONFIG_HAVE_IDE=y # # SCSI device support # -CONFIG_SCSI_MOD=y +CONFIG_SCSI_MOD=m CONFIG_RAID_ATTRS=m -CONFIG_SCSI=y +CONFIG_SCSI=m CONFIG_SCSI_DMA=y CONFIG_SCSI_NETLINK=y CONFIG_SCSI_PROC_FS=y @@ -2562,7 +2430,7 @@ CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # -CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SD=m CONFIG_CHR_DEV_ST=m CONFIG_BLK_DEV_SR=m # CONFIG_BLK_DEV_SR_VENDOR is not set @@ -2619,7 +2487,7 @@ CONFIG_SCSI_MVSAS=m CONFIG_SCSI_MVSAS_TASKLET=y CONFIG_SCSI_MVUMI=m CONFIG_SCSI_DPT_I2O=m -CONFIG_SCSI_ADVANSYS=m +# CONFIG_SCSI_ADVANSYS is not set CONFIG_SCSI_ARCMSR=m CONFIG_SCSI_ESAS2R=m CONFIG_MEGARAID_NEWGEN=y @@ -2630,7 +2498,7 @@ CONFIG_MEGARAID_SAS=m CONFIG_SCSI_MPT3SAS=m CONFIG_SCSI_MPT2SAS_MAX_SGE=128 CONFIG_SCSI_MPT3SAS_MAX_SGE=128 -# CONFIG_SCSI_MPT2SAS is not set +CONFIG_SCSI_MPT2SAS=m CONFIG_SCSI_SMARTPQI=m CONFIG_SCSI_UFSHCD=m CONFIG_SCSI_UFSHCD_PCI=m @@ -2652,7 +2520,7 @@ CONFIG_LIBFCOE=m CONFIG_FCOE=m CONFIG_FCOE_FNIC=m CONFIG_SCSI_SNIC=m -# CONFIG_SCSI_SNIC_DEBUG_FS is not set +CONFIG_SCSI_SNIC_DEBUG_FS=y CONFIG_SCSI_DMX3191D=m CONFIG_SCSI_FDOMAIN=m CONFIG_SCSI_FDOMAIN_PCI=m @@ -2671,9 +2539,7 @@ CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 CONFIG_SCSI_SYM53C8XX_MMIO=y -CONFIG_SCSI_IPR=m -CONFIG_SCSI_IPR_TRACE=y -CONFIG_SCSI_IPR_DUMP=y +# CONFIG_SCSI_IPR is not set CONFIG_SCSI_QLOGIC_1280=m CONFIG_SCSI_QLA_FC=m CONFIG_TCM_QLA2XXX=m @@ -2692,11 +2558,6 @@ CONFIG_SCSI_PM8001=m CONFIG_SCSI_BFA_FC=m CONFIG_SCSI_VIRTIO=m CONFIG_SCSI_CHELSIO_FCOE=m -CONFIG_SCSI_LOWLEVEL_PCMCIA=y -CONFIG_PCMCIA_AHA152X=m -# CONFIG_PCMCIA_FDOMAIN is not set -CONFIG_PCMCIA_QLOGIC=m -CONFIG_PCMCIA_SYM53C500=m CONFIG_SCSI_DH=y CONFIG_SCSI_DH_RDAC=m CONFIG_SCSI_DH_HP_SW=m @@ -2704,7 +2565,7 @@ CONFIG_SCSI_DH_EMC=m CONFIG_SCSI_DH_ALUA=m # end of SCSI device support -CONFIG_ATA=y +CONFIG_ATA=m CONFIG_ATA_VERBOSE_ERROR=y CONFIG_ATA_ACPI=y CONFIG_SATA_ZPODD=y @@ -2713,7 +2574,7 @@ CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # -CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI=m CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=m CONFIG_SATA_INIC162X=m @@ -2789,7 +2650,6 @@ CONFIG_PATA_CMD640_PCI=m CONFIG_PATA_MPIIX=m CONFIG_PATA_NS87410=m CONFIG_PATA_OPTI=m -CONFIG_PATA_PCMCIA=m # CONFIG_PATA_PLATFORM is not set CONFIG_PATA_RZ1000=m @@ -2806,7 +2666,7 @@ CONFIG_MD_RAID0=m CONFIG_MD_RAID1=m CONFIG_MD_RAID10=m CONFIG_MD_RAID456=m -CONFIG_MD_MULTIPATH=m +# CONFIG_MD_MULTIPATH is not set CONFIG_MD_FAULTY=m CONFIG_MD_CLUSTER=m CONFIG_BCACHE=m @@ -2853,7 +2713,7 @@ CONFIG_LOOPBACK_TARGET=m CONFIG_TCM_FC=m CONFIG_ISCSI_TARGET=m CONFIG_ISCSI_TARGET_CXGB4=m -CONFIG_SBP_TARGET=m +# CONFIG_SBP_TARGET is not set CONFIG_FUSION=y CONFIG_FUSION_SPI=m CONFIG_FUSION_FC=m @@ -2957,22 +2817,34 @@ CONFIG_ATM_SOLOS=m # # CAIF transport drivers # -CONFIG_CAIF_TTY=m -CONFIG_CAIF_SPI_SLAVE=m -# CONFIG_CAIF_SPI_SYNC is not set -CONFIG_CAIF_HSI=m -CONFIG_CAIF_VIRTIO=m # # Distributed Switch Architecture drivers # +CONFIG_B53=m +# CONFIG_B53_MDIO_DRIVER is not set +# CONFIG_B53_MMAP_DRIVER is not set +# CONFIG_B53_SRAB_DRIVER is not set +# CONFIG_B53_SERDES is not set +CONFIG_NET_DSA_BCM_SF2=m +# CONFIG_NET_DSA_LOOP is not set +CONFIG_NET_DSA_LANTIQ_GSWIP=m +# CONFIG_NET_DSA_MT7530 is not set +CONFIG_NET_DSA_MV88E6060=m +CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=m +CONFIG_NET_DSA_MICROCHIP_KSZ9477=m +CONFIG_NET_DSA_MV88E6XXX=m +CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y +CONFIG_NET_DSA_MV88E6XXX_PTP=y +# CONFIG_NET_DSA_QCA8K is not set +CONFIG_NET_DSA_REALTEK_SMI=m +# CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set +# CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set # end of Distributed Switch Architecture drivers CONFIG_ETHERNET=y CONFIG_MDIO=m CONFIG_NET_VENDOR_3COM=y -CONFIG_PCMCIA_3C574=m -CONFIG_PCMCIA_3C589=m CONFIG_VORTEX=m CONFIG_TYPHOON=m CONFIG_NET_VENDOR_ADAPTEC=y @@ -2980,7 +2852,7 @@ CONFIG_ADAPTEC_STARFIRE=m CONFIG_NET_VENDOR_AGERE=y CONFIG_ET131X=m CONFIG_NET_VENDOR_ALACRITECH=y -CONFIG_SLICOSS=m +# CONFIG_SLICOSS is not set CONFIG_NET_VENDOR_ALTEON=y CONFIG_ACENIC=m # CONFIG_ACENIC_OMIT_TIGON_I is not set @@ -2989,8 +2861,7 @@ CONFIG_NET_VENDOR_AMAZON=y CONFIG_ENA_ETHERNET=m CONFIG_NET_VENDOR_AMD=y CONFIG_AMD8111_ETH=m -CONFIG_PCNET32=m -CONFIG_PCMCIA_NMCLAN=m +# CONFIG_PCNET32 is not set CONFIG_AMD_XGBE=m CONFIG_AMD_XGBE_DCB=y CONFIG_AMD_XGBE_HAVE_ECC=y @@ -2998,7 +2869,7 @@ CONFIG_NET_VENDOR_AQUANTIA=y CONFIG_AQTION=m CONFIG_NET_VENDOR_ARC=y CONFIG_NET_VENDOR_ATHEROS=y -CONFIG_ATL2=m +# CONFIG_ATL2 is not set CONFIG_ATL1=m CONFIG_ATL1E=m CONFIG_ATL1C=m @@ -3010,7 +2881,7 @@ CONFIG_B44=m CONFIG_B44_PCI_AUTOSELECT=y CONFIG_B44_PCICORE_AUTOSELECT=y CONFIG_B44_PCI=y -CONFIG_BCMGENET=m +# CONFIG_BCMGENET is not set CONFIG_BNX2=m CONFIG_CNIC=m CONFIG_TIGON3=m @@ -3033,15 +2904,14 @@ CONFIG_NET_VENDOR_CAVIUM=y # CONFIG_THUNDER_NIC_BGX is not set # CONFIG_THUNDER_NIC_RGX is not set CONFIG_CAVIUM_PTP=m -# CONFIG_LIQUIDIO is not set -# CONFIG_LIQUIDIO_VF is not set +CONFIG_LIQUIDIO=m +CONFIG_LIQUIDIO_VF=m CONFIG_NET_VENDOR_CHELSIO=y CONFIG_CHELSIO_T1=m CONFIG_CHELSIO_T1_1G=y CONFIG_CHELSIO_T3=m CONFIG_CHELSIO_T4=m -CONFIG_CHELSIO_T4_DCB=y -CONFIG_CHELSIO_T4_FCOE=y +# CONFIG_CHELSIO_T4_DCB is not set CONFIG_CHELSIO_T4VF=m CONFIG_CHELSIO_LIB=m CONFIG_NET_VENDOR_CISCO=y @@ -3049,20 +2919,7 @@ CONFIG_ENIC=m CONFIG_NET_VENDOR_CORTINA=y CONFIG_CX_ECAT=m CONFIG_DNET=m -CONFIG_NET_VENDOR_DEC=y -CONFIG_NET_TULIP=y -CONFIG_DE2104X=m -CONFIG_DE2104X_DSL=0 -CONFIG_TULIP=m -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -CONFIG_TULIP_NAPI=y -CONFIG_TULIP_NAPI_HW_MITIGATION=y -CONFIG_DE4X5=m -CONFIG_WINBOND_840=m -CONFIG_DM9102=m -CONFIG_ULI526X=m -CONFIG_PCMCIA_XIRCOM=m +# CONFIG_NET_VENDOR_DEC is not set CONFIG_NET_VENDOR_DLINK=y CONFIG_DL2K=m CONFIG_SUNDANCE=m @@ -3075,8 +2932,6 @@ CONFIG_BE2NET_BE3=y CONFIG_BE2NET_LANCER=y CONFIG_BE2NET_SKYHAWK=y CONFIG_NET_VENDOR_EZCHIP=y -CONFIG_NET_VENDOR_FUJITSU=y -CONFIG_PCMCIA_FMVJ18X=m CONFIG_NET_VENDOR_GOOGLE=y CONFIG_GVE=m CONFIG_NET_VENDOR_HP=y @@ -3150,8 +3005,7 @@ CONFIG_MLXSW_MINIMAL=m CONFIG_MLXFW=m CONFIG_NET_VENDOR_MICREL=y CONFIG_KS8842=m -# CONFIG_KS8851 is not set -# CONFIG_KS8851_MLL is not set +CONFIG_KS8851_MLL=m CONFIG_KSZ884X_PCI=m # CONFIG_NET_VENDOR_MICROCHIP is not set CONFIG_NET_VENDOR_MICROSEMI=y @@ -3175,13 +3029,11 @@ CONFIG_NFP_APP_ABM_NIC=y CONFIG_NET_VENDOR_NI=y CONFIG_NI_XGE_MANAGEMENT_ENET=m CONFIG_NET_VENDOR_8390=y -CONFIG_PCMCIA_AXNET=m -CONFIG_NE2K_PCI=m -CONFIG_PCMCIA_PCNET=m +# CONFIG_NE2K_PCI is not set CONFIG_NET_VENDOR_NVIDIA=y CONFIG_FORCEDETH=m CONFIG_NET_VENDOR_OKI=y -# CONFIG_ETHOC is not set +CONFIG_ETHOC=m CONFIG_NET_VENDOR_PACKET_ENGINES=y CONFIG_HAMACHI=m CONFIG_YELLOWFIN=m @@ -3207,7 +3059,7 @@ CONFIG_NET_VENDOR_QUALCOMM=y CONFIG_NET_VENDOR_RDC=y CONFIG_R6040=m CONFIG_NET_VENDOR_REALTEK=y -CONFIG_ATP=m +# CONFIG_ATP is not set CONFIG_8139CP=m CONFIG_8139TOO=m # CONFIG_8139TOO_PIO is not set @@ -3232,22 +3084,21 @@ CONFIG_SFC_FALCON_MTD=y CONFIG_NET_VENDOR_SILAN=y CONFIG_SC92031=m CONFIG_NET_VENDOR_SIS=y -CONFIG_SIS900=m +# CONFIG_SIS900 is not set CONFIG_SIS190=m CONFIG_NET_VENDOR_SMSC=y -CONFIG_PCMCIA_SMC91C92=m -CONFIG_EPIC100=m +# CONFIG_EPIC100 is not set CONFIG_SMSC911X=m # CONFIG_SMSC911X_ARCH_HOOKS is not set CONFIG_SMSC9420=m -CONFIG_NET_VENDOR_SOCIONEXT=y +# CONFIG_NET_VENDOR_SOCIONEXT is not set CONFIG_NET_VENDOR_STMICRO=y CONFIG_STMMAC_ETH=m # CONFIG_STMMAC_SELFTESTS is not set # CONFIG_STMMAC_PLATFORM is not set CONFIG_STMMAC_PCI=m CONFIG_NET_VENDOR_SUN=y -CONFIG_HAPPYMEAL=m +# CONFIG_HAPPYMEAL is not set CONFIG_SUNGEM=m CONFIG_CASSINI=m CONFIG_NIU=m @@ -3269,12 +3120,9 @@ CONFIG_WIZNET_W5300=m # CONFIG_WIZNET_BUS_DIRECT is not set # CONFIG_WIZNET_BUS_INDIRECT is not set CONFIG_WIZNET_BUS_ANY=y -CONFIG_WIZNET_W5100_SPI=m CONFIG_NET_VENDOR_XILINX=y CONFIG_XILINX_AXI_EMAC=m CONFIG_XILINX_LL_TEMAC=m -CONFIG_NET_VENDOR_XIRCOM=y -CONFIG_PCMCIA_XIRC2PS=m CONFIG_FDDI=m CONFIG_DEFXX=m CONFIG_DEFXX_MMIO=y @@ -3337,7 +3185,6 @@ CONFIG_STE10XP=m CONFIG_TERANETICS_PHY=m CONFIG_VITESSE_PHY=m # CONFIG_XILINX_GMII2RGMII is not set -# CONFIG_MICREL_KS8995MA is not set CONFIG_PLIP=m CONFIG_PPP=m CONFIG_PPP_BSDCOMP=m @@ -3399,7 +3246,6 @@ CONFIG_USB_NET_KALMIA=m CONFIG_USB_NET_QMI_WWAN=m CONFIG_USB_HSO=m CONFIG_USB_NET_INT51X1=m -CONFIG_USB_CDC_PHONET=m CONFIG_USB_IPHETH=m CONFIG_USB_SIERRA_NET=m CONFIG_USB_VL600=m @@ -3459,7 +3305,6 @@ CONFIG_WCN36XX=m CONFIG_WLAN_VENDOR_ATMEL=y CONFIG_ATMEL=m CONFIG_PCI_ATMEL=m -CONFIG_PCMCIA_ATMEL=m CONFIG_AT76C50X_USB=m CONFIG_WLAN_VENDOR_BROADCOM=y CONFIG_B43=m @@ -3493,17 +3338,11 @@ CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y # CONFIG_B43LEGACY_PIO_MODE is not set CONFIG_BRCMUTIL=m CONFIG_BRCMSMAC=m -CONFIG_BRCMFMAC=m -CONFIG_BRCMFMAC_PROTO_BCDC=y -CONFIG_BRCMFMAC_PROTO_MSGBUF=y -CONFIG_BRCMFMAC_SDIO=y -CONFIG_BRCMFMAC_USB=y -CONFIG_BRCMFMAC_PCIE=y +# CONFIG_BRCMFMAC is not set # CONFIG_BRCM_TRACING is not set # CONFIG_BRCMDBG is not set CONFIG_WLAN_VENDOR_CISCO=y CONFIG_AIRO=m -CONFIG_AIRO_CS=m CONFIG_WLAN_VENDOR_INTEL=y CONFIG_IPW2100=m CONFIG_IPW2100_MONITOR=y @@ -3549,29 +3388,22 @@ CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y CONFIG_HOSTAP_PLX=m CONFIG_HOSTAP_PCI=m -CONFIG_HOSTAP_CS=m CONFIG_HERMES=m -CONFIG_HERMES_PRISM=y +# CONFIG_HERMES_PRISM is not set CONFIG_HERMES_CACHE_FW_ON_INIT=y CONFIG_PLX_HERMES=m CONFIG_TMD_HERMES=m CONFIG_NORTEL_HERMES=m -CONFIG_PCI_HERMES=m -CONFIG_PCMCIA_HERMES=m -CONFIG_PCMCIA_SPECTRUM=m CONFIG_ORINOCO_USB=m CONFIG_P54_COMMON=m CONFIG_P54_USB=m CONFIG_P54_PCI=m -# CONFIG_P54_SPI is not set CONFIG_P54_LEDS=y -CONFIG_PRISM54=m +# CONFIG_PRISM54 is not set CONFIG_WLAN_VENDOR_MARVELL=y CONFIG_LIBERTAS=m CONFIG_LIBERTAS_USB=m -CONFIG_LIBERTAS_CS=m CONFIG_LIBERTAS_SDIO=m -# CONFIG_LIBERTAS_SPI is not set # CONFIG_LIBERTAS_DEBUG is not set CONFIG_LIBERTAS_MESH=y CONFIG_LIBERTAS_THINFIRM=m @@ -3666,10 +3498,8 @@ CONFIG_RSI_COEX=y CONFIG_WLAN_VENDOR_ST=y CONFIG_CW1200=m CONFIG_CW1200_WLAN_SDIO=m -# CONFIG_CW1200_WLAN_SPI is not set CONFIG_WLAN_VENDOR_TI=y CONFIG_WL1251=m -# CONFIG_WL1251_SPI is not set CONFIG_WL1251_SDIO=m CONFIG_WL12XX=m CONFIG_WL18XX=m @@ -3683,53 +3513,14 @@ CONFIG_ZD1211RW=m CONFIG_WLAN_VENDOR_QUANTENNA=y CONFIG_QTNFMAC=m CONFIG_QTNFMAC_PCIE=m -CONFIG_PCMCIA_RAYCS=m -CONFIG_PCMCIA_WL3501=m CONFIG_MAC80211_HWSIM=m CONFIG_USB_NET_RNDIS_WLAN=m CONFIG_VIRT_WIFI=m # -# WiMAX Wireless Broadband devices -# -CONFIG_WIMAX_I2400M=m -CONFIG_WIMAX_I2400M_USB=m -CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 -# end of WiMAX Wireless Broadband devices - -CONFIG_WAN=y -CONFIG_LANMEDIA=m -CONFIG_HDLC=m -CONFIG_HDLC_RAW=m -CONFIG_HDLC_RAW_ETH=m -CONFIG_HDLC_CISCO=m -CONFIG_HDLC_FR=m -CONFIG_HDLC_PPP=m -CONFIG_HDLC_X25=m -CONFIG_PCI200SYN=m -CONFIG_WANXL=m -CONFIG_PC300TOO=m -CONFIG_FARSYNC=m -CONFIG_DSCC4=m -CONFIG_DSCC4_PCISYNC=y -CONFIG_DSCC4_PCI_RST=y -CONFIG_DLCI=m -CONFIG_DLCI_MAX=8 -CONFIG_LAPBETHER=m -CONFIG_X25_ASY=m -CONFIG_SBNI=m -CONFIG_SBNI_MULTILINE=y -CONFIG_IEEE802154_DRIVERS=m -CONFIG_IEEE802154_FAKELB=m -# CONFIG_IEEE802154_AT86RF230 is not set -# CONFIG_IEEE802154_MRF24J40 is not set -# CONFIG_IEEE802154_CC2520 is not set -# CONFIG_IEEE802154_ATUSB is not set -CONFIG_IEEE802154_ADF7242=m -CONFIG_IEEE802154_CA8210=m -# CONFIG_IEEE802154_CA8210_DEBUGFS is not set -CONFIG_IEEE802154_MCR20A=m -CONFIG_IEEE802154_HWSIM=m +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set CONFIG_XEN_NETDEV_FRONTEND=m CONFIG_XEN_NETDEV_BACKEND=m CONFIG_VMXNET3=m @@ -3738,29 +3529,7 @@ CONFIG_THUNDERBOLT_NET=m CONFIG_HYPERV_NET=m CONFIG_NETDEVSIM=m CONFIG_NET_FAILOVER=m -CONFIG_ISDN=y -CONFIG_ISDN_CAPI=m -CONFIG_CAPI_TRACE=y -CONFIG_ISDN_CAPI_CAPI20=m -CONFIG_ISDN_CAPI_MIDDLEWARE=y -CONFIG_MISDN=m -CONFIG_MISDN_DSP=m -CONFIG_MISDN_L1OIP=m - -# -# mISDN hardware drivers -# -CONFIG_MISDN_HFCPCI=m -CONFIG_MISDN_HFCMULTI=m -CONFIG_MISDN_HFCUSB=m -CONFIG_MISDN_AVMFRITZ=m -CONFIG_MISDN_SPEEDFAX=m -CONFIG_MISDN_INFINEON=m -CONFIG_MISDN_W6692=m -CONFIG_MISDN_NETJET=m -CONFIG_MISDN_HDLC=m -CONFIG_MISDN_IPAC=m -CONFIG_MISDN_ISAR=m +# CONFIG_ISDN is not set CONFIG_NVM=y CONFIG_NVM_PBLK=m # CONFIG_NVM_PBLK_DEBUG is not set @@ -3793,7 +3562,6 @@ CONFIG_INPUT_KEYBOARD=y # CONFIG_KEYBOARD_ADC is not set CONFIG_KEYBOARD_ADP5588=m CONFIG_KEYBOARD_ADP5589=m -CONFIG_KEYBOARD_APPLESPI=m CONFIG_KEYBOARD_ATKBD=y CONFIG_KEYBOARD_QT1050=m CONFIG_KEYBOARD_QT1070=m @@ -3847,38 +3615,36 @@ CONFIG_MOUSE_GPIO=m CONFIG_MOUSE_SYNAPTICS_I2C=m CONFIG_MOUSE_SYNAPTICS_USB=m CONFIG_INPUT_JOYSTICK=y -CONFIG_JOYSTICK_ANALOG=m -CONFIG_JOYSTICK_A3D=m -CONFIG_JOYSTICK_ADI=m -CONFIG_JOYSTICK_COBRA=m -CONFIG_JOYSTICK_GF2K=m -CONFIG_JOYSTICK_GRIP=m -CONFIG_JOYSTICK_GRIP_MP=m -CONFIG_JOYSTICK_GUILLEMOT=m -CONFIG_JOYSTICK_INTERACT=m -CONFIG_JOYSTICK_SIDEWINDER=m -CONFIG_JOYSTICK_TMDC=m +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set CONFIG_JOYSTICK_IFORCE=m CONFIG_JOYSTICK_IFORCE_USB=m -CONFIG_JOYSTICK_IFORCE_232=m -CONFIG_JOYSTICK_WARRIOR=m -CONFIG_JOYSTICK_MAGELLAN=m -CONFIG_JOYSTICK_SPACEORB=m -CONFIG_JOYSTICK_SPACEBALL=m -CONFIG_JOYSTICK_STINGER=m -CONFIG_JOYSTICK_TWIDJOY=m -CONFIG_JOYSTICK_ZHENHUA=m +# CONFIG_JOYSTICK_IFORCE_232 is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set CONFIG_JOYSTICK_DB9=m CONFIG_JOYSTICK_GAMECON=m CONFIG_JOYSTICK_TURBOGRAFX=m CONFIG_JOYSTICK_AS5011=m -CONFIG_JOYSTICK_JOYDUMP=m +# CONFIG_JOYSTICK_JOYDUMP is not set CONFIG_JOYSTICK_XPAD=m CONFIG_JOYSTICK_XPAD_FF=y CONFIG_JOYSTICK_XPAD_LEDS=y CONFIG_JOYSTICK_WALKERA0701=m -CONFIG_JOYSTICK_PSXPAD_SPI=m -CONFIG_JOYSTICK_PSXPAD_SPI_FF=y CONFIG_JOYSTICK_PXRC=m CONFIG_INPUT_TABLET=y CONFIG_TABLET_USB_ACECAD=m @@ -3890,53 +3656,47 @@ CONFIG_TABLET_USB_PEGASUS=m CONFIG_TABLET_SERIAL_WACOM4=m CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_PROPERTIES=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_AD7877 is not set CONFIG_TOUCHSCREEN_AD7879=m CONFIG_TOUCHSCREEN_AD7879_I2C=m -# CONFIG_TOUCHSCREEN_AD7879_SPI is not set CONFIG_TOUCHSCREEN_ADC=m CONFIG_TOUCHSCREEN_ATMEL_MXT=m # CONFIG_TOUCHSCREEN_ATMEL_MXT_T37 is not set -CONFIG_TOUCHSCREEN_AUO_PIXCIR=m +# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set CONFIG_TOUCHSCREEN_BU21013=m CONFIG_TOUCHSCREEN_BU21029=m CONFIG_TOUCHSCREEN_CHIPONE_ICN8505=m CONFIG_TOUCHSCREEN_CY8CTMG110=m -CONFIG_TOUCHSCREEN_CYTTSP_CORE=m -CONFIG_TOUCHSCREEN_CYTTSP_I2C=m -# CONFIG_TOUCHSCREEN_CYTTSP_SPI is not set -CONFIG_TOUCHSCREEN_CYTTSP4_CORE=m -CONFIG_TOUCHSCREEN_CYTTSP4_I2C=m -# CONFIG_TOUCHSCREEN_CYTTSP4_SPI is not set -CONFIG_TOUCHSCREEN_DYNAPRO=m -CONFIG_TOUCHSCREEN_HAMPSHIRE=m +# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set +# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set +# CONFIG_TOUCHSCREEN_DYNAPRO is not set +# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set CONFIG_TOUCHSCREEN_EETI=m CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m CONFIG_TOUCHSCREEN_EXC3000=m -CONFIG_TOUCHSCREEN_FUJITSU=m +# CONFIG_TOUCHSCREEN_FUJITSU is not set CONFIG_TOUCHSCREEN_GOODIX=m CONFIG_TOUCHSCREEN_HIDEEP=m -CONFIG_TOUCHSCREEN_ILI210X=m +# CONFIG_TOUCHSCREEN_ILI210X is not set CONFIG_TOUCHSCREEN_S6SY761=m -CONFIG_TOUCHSCREEN_GUNZE=m +# CONFIG_TOUCHSCREEN_GUNZE is not set CONFIG_TOUCHSCREEN_EKTF2127=m CONFIG_TOUCHSCREEN_ELAN=m -CONFIG_TOUCHSCREEN_ELO=m -CONFIG_TOUCHSCREEN_WACOM_W8001=m -CONFIG_TOUCHSCREEN_WACOM_I2C=m +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_WACOM_I2C is not set CONFIG_TOUCHSCREEN_MAX11801=m CONFIG_TOUCHSCREEN_MCS5000=m -CONFIG_TOUCHSCREEN_MMS114=m +# CONFIG_TOUCHSCREEN_MMS114 is not set CONFIG_TOUCHSCREEN_MELFAS_MIP4=m -CONFIG_TOUCHSCREEN_MTOUCH=m -CONFIG_TOUCHSCREEN_INEXIO=m +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set CONFIG_TOUCHSCREEN_MK712=m -CONFIG_TOUCHSCREEN_PENMOUNT=m -CONFIG_TOUCHSCREEN_EDT_FT5X06=m -CONFIG_TOUCHSCREEN_TOUCHRIGHT=m -CONFIG_TOUCHSCREEN_TOUCHWIN=m -CONFIG_TOUCHSCREEN_PIXCIR=m +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set +# CONFIG_TOUCHSCREEN_PIXCIR is not set CONFIG_TOUCHSCREEN_WDT87XX_I2C=m CONFIG_TOUCHSCREEN_WM97XX=m CONFIG_TOUCHSCREEN_WM9705=y @@ -3961,20 +3721,18 @@ CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y CONFIG_TOUCHSCREEN_USB_NEXIO=y CONFIG_TOUCHSCREEN_USB_EASYTOUCH=y -CONFIG_TOUCHSCREEN_TOUCHIT213=m -CONFIG_TOUCHSCREEN_TSC_SERIO=m +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC_SERIO is not set CONFIG_TOUCHSCREEN_TSC200X_CORE=m CONFIG_TOUCHSCREEN_TSC2004=m -# CONFIG_TOUCHSCREEN_TSC2005 is not set CONFIG_TOUCHSCREEN_TSC2007=m -CONFIG_TOUCHSCREEN_TSC2007_IIO=y +# CONFIG_TOUCHSCREEN_TSC2007_IIO is not set CONFIG_TOUCHSCREEN_RM_TS=m CONFIG_TOUCHSCREEN_SILEAD=m CONFIG_TOUCHSCREEN_SIS_I2C=m CONFIG_TOUCHSCREEN_ST1232=m # CONFIG_TOUCHSCREEN_STMFTS is not set CONFIG_TOUCHSCREEN_SUR40=m -CONFIG_TOUCHSCREEN_SURFACE3_SPI=m CONFIG_TOUCHSCREEN_SX8654=m CONFIG_TOUCHSCREEN_TPS6507X=m CONFIG_TOUCHSCREEN_ZET6223=m @@ -3984,22 +3742,20 @@ CONFIG_TOUCHSCREEN_IQS5XX=m CONFIG_INPUT_MISC=y CONFIG_INPUT_AD714X=m CONFIG_INPUT_AD714X_I2C=m -# CONFIG_INPUT_AD714X_SPI is not set -CONFIG_INPUT_BMA150=m +# CONFIG_INPUT_BMA150 is not set # CONFIG_INPUT_E3X0_BUTTON is not set # CONFIG_INPUT_MSM_VIBRATOR is not set CONFIG_INPUT_PCSPKR=m -CONFIG_INPUT_MMA8450=m +# CONFIG_INPUT_MMA8450 is not set CONFIG_INPUT_APANEL=m -CONFIG_INPUT_GP2A=m +# CONFIG_INPUT_GP2A is not set # CONFIG_INPUT_GPIO_BEEPER is not set CONFIG_INPUT_GPIO_DECODER=m # CONFIG_INPUT_GPIO_VIBRA is not set CONFIG_INPUT_ATLAS_BTNS=m CONFIG_INPUT_ATI_REMOTE2=m CONFIG_INPUT_KEYSPAN_REMOTE=m -CONFIG_INPUT_KXTJ9=m -# CONFIG_INPUT_KXTJ9_POLLED_MODE is not set +# CONFIG_INPUT_KXTJ9 is not set CONFIG_INPUT_POWERMATE=m CONFIG_INPUT_YEALINK=m CONFIG_INPUT_CM109=m @@ -4007,25 +3763,23 @@ CONFIG_INPUT_REGULATOR_HAPTIC=m CONFIG_INPUT_AXP20X_PEK=m CONFIG_INPUT_UINPUT=m CONFIG_INPUT_PCF8574=m -CONFIG_INPUT_PWM_BEEPER=m +# CONFIG_INPUT_PWM_BEEPER is not set CONFIG_INPUT_PWM_VIBRA=m CONFIG_INPUT_GPIO_ROTARY_ENCODER=m CONFIG_INPUT_DA9063_ONKEY=m CONFIG_INPUT_ADXL34X=m CONFIG_INPUT_ADXL34X_I2C=m -# CONFIG_INPUT_ADXL34X_SPI is not set -CONFIG_INPUT_IMS_PCU=m +# CONFIG_INPUT_IMS_PCU is not set CONFIG_INPUT_CMA3000=m CONFIG_INPUT_CMA3000_I2C=m CONFIG_INPUT_XEN_KBDDEV_FRONTEND=m CONFIG_INPUT_IDEAPAD_SLIDEBAR=m -CONFIG_INPUT_SOC_BUTTON_ARRAY=m +# CONFIG_INPUT_SOC_BUTTON_ARRAY is not set CONFIG_INPUT_DRV260X_HAPTICS=m CONFIG_INPUT_DRV2665_HAPTICS=m CONFIG_INPUT_DRV2667_HAPTICS=m CONFIG_RMI4_CORE=m CONFIG_RMI4_I2C=m -CONFIG_RMI4_SPI=m CONFIG_RMI4_SMB=m CONFIG_RMI4_F03=y CONFIG_RMI4_F03_SERIO=m @@ -4055,11 +3809,7 @@ CONFIG_SERIO_PS2MULT=m CONFIG_HYPERV_KEYBOARD=m CONFIG_SERIO_GPIO_PS2=m CONFIG_USERIO=m -CONFIG_GAMEPORT=m -CONFIG_GAMEPORT_NS558=m -CONFIG_GAMEPORT_L4=m -CONFIG_GAMEPORT_EMU10K1=m -CONFIG_GAMEPORT_FM801=m +# CONFIG_GAMEPORT is not set # end of Hardware I/O ports # end of Input device support @@ -4082,9 +3832,9 @@ CONFIG_CYCLADES=m # CONFIG_CYZ_INTR is not set CONFIG_MOXA_INTELLIO=m CONFIG_MOXA_SMARTIO=m -CONFIG_SYNCLINK=m -CONFIG_SYNCLINKMP=m -CONFIG_SYNCLINK_GT=m +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set CONFIG_NOZOMI=m CONFIG_ISI=m CONFIG_N_HDLC=m @@ -4108,7 +3858,6 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_DMA=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_EXAR=y -CONFIG_SERIAL_8250_CS=m CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=32 CONFIG_SERIAL_8250_EXTENDED=y @@ -4127,8 +3876,6 @@ CONFIG_SERIAL_8250_MOXA=y # Non-8250 serial port support # # CONFIG_SERIAL_KGDB_NMI is not set -# CONFIG_SERIAL_MAX3100 is not set -# CONFIG_SERIAL_MAX310X is not set # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y @@ -4138,16 +3885,14 @@ CONFIG_SERIAL_JSM=m CONFIG_SERIAL_SC16IS7XX_CORE=m CONFIG_SERIAL_SC16IS7XX=m CONFIG_SERIAL_SC16IS7XX_I2C=y -CONFIG_SERIAL_SC16IS7XX_SPI=y CONFIG_SERIAL_ALTERA_JTAGUART=m CONFIG_SERIAL_ALTERA_UART=m CONFIG_SERIAL_ALTERA_UART_MAXPORTS=4 CONFIG_SERIAL_ALTERA_UART_BAUDRATE=115200 -# CONFIG_SERIAL_IFX6X60 is not set # CONFIG_SERIAL_ARC is not set CONFIG_SERIAL_RP2=m CONFIG_SERIAL_RP2_NR_UARTS=32 -# CONFIG_SERIAL_FSL_LPUART is not set +CONFIG_SERIAL_FSL_LPUART=m # end of Serial drivers CONFIG_SERIAL_MCTRL_GPIO=y @@ -4160,7 +3905,7 @@ CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y CONFIG_HVC_XEN=y CONFIG_HVC_XEN_FRONTEND=y -CONFIG_VIRTIO_CONSOLE=y +CONFIG_VIRTIO_CONSOLE=m CONFIG_IPMI_HANDLER=m CONFIG_IPMI_DMI_DECODE=y CONFIG_IPMI_PLAT_DATA=y @@ -4179,17 +3924,6 @@ CONFIG_HW_RANDOM_VIA=m CONFIG_HW_RANDOM_VIRTIO=m CONFIG_NVRAM=y CONFIG_APPLICOM=m - -# -# PCMCIA character devices -# -CONFIG_SYNCLINK_CS=m -CONFIG_CARDMAN_4000=m -CONFIG_CARDMAN_4040=m -CONFIG_SCR24X=m -CONFIG_IPWIRELESS=m -# end of PCMCIA character devices - CONFIG_MWAVE=m CONFIG_RAW_DRIVER=m CONFIG_MAX_RAW_DEVS=4096 @@ -4202,7 +3936,6 @@ CONFIG_TCG_TPM=y CONFIG_HW_RANDOM_TPM=y CONFIG_TCG_TIS_CORE=y CONFIG_TCG_TIS=y -CONFIG_TCG_TIS_SPI=m CONFIG_TCG_TIS_I2C_ATMEL=m CONFIG_TCG_TIS_I2C_INFINEON=m CONFIG_TCG_TIS_I2C_NUVOTON=m @@ -4212,9 +3945,7 @@ CONFIG_TCG_INFINEON=m CONFIG_TCG_XEN=m CONFIG_TCG_CRB=y CONFIG_TCG_VTPM_PROXY=m -CONFIG_TCG_TIS_ST33ZP24=m -CONFIG_TCG_TIS_ST33ZP24_I2C=m -CONFIG_TCG_TIS_ST33ZP24_SPI=m +# CONFIG_TCG_TIS_ST33ZP24_I2C is not set CONFIG_TELCLOCK=m CONFIG_DEVPORT=y CONFIG_CRASHER=m @@ -4248,7 +3979,6 @@ CONFIG_I2C_MUX_MLXCPLD=m CONFIG_I2C_HELPER_AUTO=y CONFIG_I2C_SMBUS=m CONFIG_I2C_ALGOBIT=m -CONFIG_I2C_ALGOPCA=m # # I2C Hardware Bus support @@ -4268,7 +3998,6 @@ CONFIG_I2C_I801=m CONFIG_I2C_ISCH=m CONFIG_I2C_ISMT=m CONFIG_I2C_PIIX4=m -CONFIG_I2C_CHT_WC=m CONFIG_I2C_NFORCE2=m CONFIG_I2C_NFORCE2_S4985=m CONFIG_I2C_NVIDIA_GPU=m @@ -4286,18 +4015,16 @@ CONFIG_I2C_SCMI=m # # I2C system bus drivers (mostly embedded / system-on-chip) # -CONFIG_I2C_CBUS_GPIO=m -CONFIG_I2C_DESIGNWARE_CORE=y -CONFIG_I2C_DESIGNWARE_PLATFORM=y +# CONFIG_I2C_CBUS_GPIO is not set +CONFIG_I2C_DESIGNWARE_CORE=m +CONFIG_I2C_DESIGNWARE_PLATFORM=m # CONFIG_I2C_DESIGNWARE_SLAVE is not set -CONFIG_I2C_DESIGNWARE_PCI=m +# CONFIG_I2C_DESIGNWARE_PCI is not set CONFIG_I2C_DESIGNWARE_BAYTRAIL=y # CONFIG_I2C_EMEV2 is not set -CONFIG_I2C_GPIO=m -# CONFIG_I2C_GPIO_FAULT_INJECTOR is not set -CONFIG_I2C_KEMPLD=m -CONFIG_I2C_OCORES=m -CONFIG_I2C_PCA_PLATFORM=m +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_PXA_PCI is not set # CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_XILINX is not set @@ -4331,42 +4058,7 @@ CONFIG_I2C_STUB=m CONFIG_I3C=m CONFIG_CDNS_I3C_MASTER=m CONFIG_DW_I3C_MASTER=m -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_ALTERA is not set -# CONFIG_SPI_AXI_SPI_ENGINE is not set -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_BUTTERFLY is not set -# CONFIG_SPI_CADENCE is not set -# CONFIG_SPI_DESIGNWARE is not set -CONFIG_SPI_DLN2=m -# CONFIG_SPI_NXP_FLEXSPI is not set -# CONFIG_SPI_GPIO is not set -# CONFIG_SPI_LM70_LLP is not set -# CONFIG_SPI_OC_TINY is not set -CONFIG_SPI_PXA2XX=m -CONFIG_SPI_PXA2XX_PCI=m -# CONFIG_SPI_ROCKCHIP is not set -# CONFIG_SPI_SC18IS602 is not set -# CONFIG_SPI_SIFIVE is not set -# CONFIG_SPI_MXIC is not set -# CONFIG_SPI_XCOMM is not set -# CONFIG_SPI_XILINX is not set -# CONFIG_SPI_ZYNQMP_GQSPI is not set - -# -# SPI Protocol Masters -# -# CONFIG_SPI_SPIDEV is not set -CONFIG_SPI_LOOPBACK_TEST=m -# CONFIG_SPI_TLE62X0 is not set -# CONFIG_SPI_SLAVE is not set +# CONFIG_SPI is not set CONFIG_SPMI=m CONFIG_HSI=m CONFIG_HSI_BOARDINFO=y @@ -4379,7 +4071,7 @@ CONFIG_HSI_BOARDINFO=y # HSI clients # CONFIG_HSI_CHAR=m -CONFIG_PPS=m +CONFIG_PPS=y # CONFIG_PPS_DEBUG is not set # @@ -4388,7 +4080,7 @@ CONFIG_PPS=m # CONFIG_PPS_CLIENT_KTIMER is not set CONFIG_PPS_CLIENT_LDISC=m CONFIG_PPS_CLIENT_PARPORT=m -# CONFIG_PPS_CLIENT_GPIO is not set +CONFIG_PPS_CLIENT_GPIO=m # # PPS generators support @@ -4397,7 +4089,7 @@ CONFIG_PPS_CLIENT_PARPORT=m # # PTP clock support # -CONFIG_PTP_1588_CLOCK=m +CONFIG_PTP_1588_CLOCK=y # # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. @@ -4410,10 +4102,10 @@ CONFIG_PINMUX=y CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set -CONFIG_PINCTRL_AMD=m +CONFIG_PINCTRL_AMD=y # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_SX150X is not set -CONFIG_PINCTRL_BAYTRAIL=y +# CONFIG_PINCTRL_BAYTRAIL is not set CONFIG_PINCTRL_CHERRYVIEW=m CONFIG_PINCTRL_INTEL=m CONFIG_PINCTRL_BROXTON=m @@ -4445,7 +4137,7 @@ CONFIG_GPIO_AMDPT=m CONFIG_GPIO_EXAR=m CONFIG_GPIO_GENERIC_PLATFORM=m CONFIG_GPIO_ICH=m -CONFIG_GPIO_LYNXPOINT=m +# CONFIG_GPIO_LYNXPOINT is not set # CONFIG_GPIO_MB86S7X is not set CONFIG_GPIO_VX855=m CONFIG_GPIO_XILINX=m @@ -4481,9 +4173,7 @@ CONFIG_GPIO_TPIC2810=m # # MFD GPIO expanders # -CONFIG_GPIO_CRYSTAL_COVE=m CONFIG_GPIO_DLN2=m -CONFIG_GPIO_KEMPLD=m CONFIG_GPIO_LP3943=m CONFIG_GPIO_MADERA=m CONFIG_GPIO_TQMX86=m @@ -4494,6 +4184,7 @@ CONFIG_GPIO_WHISKEY_COVE=m # PCI GPIO expanders # CONFIG_GPIO_AMD8111=m +# CONFIG_GPIO_BT8XX is not set CONFIG_GPIO_ML_IOH=m CONFIG_GPIO_PCI_IDIO_16=m CONFIG_GPIO_PCIE_IDIO_24=m @@ -4501,58 +4192,14 @@ CONFIG_GPIO_PCIE_IDIO_24=m # end of PCI GPIO expanders # -# SPI GPIO expanders -# -CONFIG_GPIO_MAX3191X=m -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MC33880 is not set -CONFIG_GPIO_PISOSR=m -# CONFIG_GPIO_XRA1403 is not set -# end of SPI GPIO expanders - -# # USB GPIO expanders # CONFIG_GPIO_VIPERBOARD=m # end of USB GPIO expanders CONFIG_GPIO_MOCKUP=m -CONFIG_W1=m -CONFIG_W1_CON=y - -# -# 1-wire Bus Masters -# -CONFIG_W1_MASTER_MATROX=m -CONFIG_W1_MASTER_DS2490=m -CONFIG_W1_MASTER_DS2482=m -CONFIG_W1_MASTER_DS1WM=m -# CONFIG_W1_MASTER_GPIO is not set -# end of 1-wire Bus Masters - -# -# 1-wire Slaves -# -CONFIG_W1_SLAVE_THERM=m -CONFIG_W1_SLAVE_SMEM=m -CONFIG_W1_SLAVE_DS2405=m -CONFIG_W1_SLAVE_DS2408=m -CONFIG_W1_SLAVE_DS2408_READBACK=y -CONFIG_W1_SLAVE_DS2413=m -CONFIG_W1_SLAVE_DS2406=m -CONFIG_W1_SLAVE_DS2423=m -CONFIG_W1_SLAVE_DS2805=m -CONFIG_W1_SLAVE_DS2431=m -CONFIG_W1_SLAVE_DS2433=m -CONFIG_W1_SLAVE_DS2433_CRC=y -CONFIG_W1_SLAVE_DS2438=m -CONFIG_W1_SLAVE_DS2780=m -CONFIG_W1_SLAVE_DS2781=m -CONFIG_W1_SLAVE_DS28E04=m -CONFIG_W1_SLAVE_DS28E17=m -# end of 1-wire Slaves - -CONFIG_POWER_AVS=y +# CONFIG_W1 is not set +# CONFIG_POWER_AVS is not set # CONFIG_POWER_RESET is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set @@ -4561,25 +4208,20 @@ CONFIG_PDA_POWER=m # CONFIG_GENERIC_ADC_BATTERY is not set # CONFIG_TEST_POWER is not set CONFIG_CHARGER_ADP5061=m -CONFIG_BATTERY_DS2760=m -CONFIG_BATTERY_DS2780=m -CONFIG_BATTERY_DS2781=m +# CONFIG_BATTERY_DS2780 is not set +# CONFIG_BATTERY_DS2781 is not set CONFIG_BATTERY_DS2782=m -CONFIG_BATTERY_SBS=m +# CONFIG_BATTERY_SBS is not set CONFIG_CHARGER_SBS=m CONFIG_MANAGER_SBS=m CONFIG_BATTERY_BQ27XXX=m CONFIG_BATTERY_BQ27XXX_I2C=m -CONFIG_BATTERY_BQ27XXX_HDQ=m # CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set -CONFIG_CHARGER_AXP20X=m -CONFIG_BATTERY_AXP20X=m -CONFIG_AXP20X_POWER=m +# CONFIG_AXP20X_POWER is not set CONFIG_AXP288_CHARGER=m -CONFIG_AXP288_FUEL_GAUGE=m +# CONFIG_AXP288_FUEL_GAUGE is not set CONFIG_BATTERY_MAX17040=m CONFIG_BATTERY_MAX17042=m -CONFIG_BATTERY_MAX1721X=m CONFIG_CHARGER_ISP1704=m CONFIG_CHARGER_MAX8903=m CONFIG_CHARGER_LP8727=m @@ -4605,7 +4247,6 @@ CONFIG_HWMON_VID=m # CONFIG_SENSORS_ABITUGURU=m CONFIG_SENSORS_ABITUGURU3=m -# CONFIG_SENSORS_AD7314 is not set CONFIG_SENSORS_AD7414=m CONFIG_SENSORS_AD7418=m CONFIG_SENSORS_ADM1021=m @@ -4615,7 +4256,6 @@ CONFIG_SENSORS_ADM1029=m CONFIG_SENSORS_ADM1031=m CONFIG_SENSORS_ADM9240=m CONFIG_SENSORS_ADT7X10=m -# CONFIG_SENSORS_ADT7310 is not set CONFIG_SENSORS_ADT7410=m CONFIG_SENSORS_ADT7411=m CONFIG_SENSORS_ADT7462=m @@ -4628,7 +4268,7 @@ CONFIG_SENSORS_FAM15H_POWER=m CONFIG_SENSORS_APPLESMC=m CONFIG_SENSORS_ASB100=m CONFIG_SENSORS_ASPEED=m -CONFIG_SENSORS_ATXP1=m +# CONFIG_SENSORS_ATXP1 is not set CONFIG_SENSORS_DS620=m CONFIG_SENSORS_DS1621=m CONFIG_SENSORS_DELL_SMM=m @@ -4638,11 +4278,11 @@ CONFIG_SENSORS_F71882FG=m CONFIG_SENSORS_F75375S=m CONFIG_SENSORS_FSCHMD=m CONFIG_SENSORS_FTSTEUTATES=m -CONFIG_SENSORS_GL518SM=m -CONFIG_SENSORS_GL520SM=m +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set CONFIG_SENSORS_G760A=m CONFIG_SENSORS_G762=m -CONFIG_SENSORS_HIH6130=m +# CONFIG_SENSORS_HIH6130 is not set CONFIG_SENSORS_IBMAEM=m CONFIG_SENSORS_IBMPEX=m # CONFIG_SENSORS_IIO_HWMON is not set @@ -4651,33 +4291,29 @@ CONFIG_SENSORS_CORETEMP=m CONFIG_SENSORS_IT87=m CONFIG_SENSORS_JC42=m CONFIG_SENSORS_POWR1220=m -CONFIG_SENSORS_LINEAGE=m +# CONFIG_SENSORS_LINEAGE is not set CONFIG_SENSORS_LTC2945=m CONFIG_SENSORS_LTC2990=m -CONFIG_SENSORS_LTC4151=m -CONFIG_SENSORS_LTC4215=m +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set CONFIG_SENSORS_LTC4222=m -CONFIG_SENSORS_LTC4245=m +# CONFIG_SENSORS_LTC4245 is not set CONFIG_SENSORS_LTC4260=m -CONFIG_SENSORS_LTC4261=m -# CONFIG_SENSORS_MAX1111 is not set -CONFIG_SENSORS_MAX16065=m +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX16065 is not set CONFIG_SENSORS_MAX1619=m CONFIG_SENSORS_MAX1668=m # CONFIG_SENSORS_MAX197 is not set -CONFIG_SENSORS_MAX31722=m CONFIG_SENSORS_MAX6621=m CONFIG_SENSORS_MAX6639=m CONFIG_SENSORS_MAX6642=m CONFIG_SENSORS_MAX6650=m CONFIG_SENSORS_MAX6697=m CONFIG_SENSORS_MAX31790=m -CONFIG_SENSORS_MCP3021=m +# CONFIG_SENSORS_MCP3021 is not set CONFIG_SENSORS_MLXREG_FAN=m CONFIG_SENSORS_TC654=m -# CONFIG_SENSORS_ADCXX is not set CONFIG_SENSORS_LM63=m -# CONFIG_SENSORS_LM70 is not set CONFIG_SENSORS_LM73=m CONFIG_SENSORS_LM75=m CONFIG_SENSORS_LM77=m @@ -4700,7 +4336,7 @@ CONFIG_SENSORS_NCT6775=m CONFIG_SENSORS_NCT7802=m CONFIG_SENSORS_NCT7904=m CONFIG_SENSORS_NPCM7XX=m -CONFIG_SENSORS_PCF8591=m +# CONFIG_SENSORS_PCF8591 is not set CONFIG_PMBUS=m CONFIG_SENSORS_PMBUS=m CONFIG_SENSORS_ADM1275=m @@ -4724,8 +4360,8 @@ CONFIG_SENSORS_TPS53679=m CONFIG_SENSORS_UCD9000=m CONFIG_SENSORS_UCD9200=m CONFIG_SENSORS_ZL6100=m -CONFIG_SENSORS_SHT15=m -CONFIG_SENSORS_SHT21=m +# CONFIG_SENSORS_SHT15 is not set +# CONFIG_SENSORS_SHT21 is not set CONFIG_SENSORS_SHT3x=m CONFIG_SENSORS_SHTC1=m CONFIG_SENSORS_SIS5595=m @@ -4740,14 +4376,13 @@ CONFIG_SENSORS_SCH56XX_COMMON=m CONFIG_SENSORS_SCH5627=m CONFIG_SENSORS_SCH5636=m CONFIG_SENSORS_STTS751=m -CONFIG_SENSORS_SMM665=m +# CONFIG_SENSORS_SMM665 is not set CONFIG_SENSORS_ADC128D818=m CONFIG_SENSORS_ADS1015=m CONFIG_SENSORS_ADS7828=m -# CONFIG_SENSORS_ADS7871 is not set CONFIG_SENSORS_AMC6821=m -CONFIG_SENSORS_INA209=m -CONFIG_SENSORS_INA2XX=m +# CONFIG_SENSORS_INA209 is not set +# CONFIG_SENSORS_INA2XX is not set CONFIG_SENSORS_INA3221=m CONFIG_SENSORS_TC74=m CONFIG_SENSORS_THMC50=m @@ -4817,7 +4452,7 @@ CONFIG_INTEL_BXT_PMIC_THERMAL=m CONFIG_INTEL_PCH_THERMAL=m # end of Intel thermal drivers -CONFIG_GENERIC_ADC_THERMAL=m +# CONFIG_GENERIC_ADC_THERMAL is not set CONFIG_WATCHDOG=y CONFIG_WATCHDOG_CORE=y # CONFIG_WATCHDOG_NOWAYOUT is not set @@ -4868,7 +4503,6 @@ CONFIG_IT8712F_WDT=m CONFIG_IT87_WDT=m CONFIG_HP_WATCHDOG=m CONFIG_HPWDT_NMI_DECODING=y -CONFIG_KEMPLD_WDT=m CONFIG_SC1200_WDT=m CONFIG_PC87413_WDT=m CONFIG_NV_TCO=m @@ -4877,7 +4511,7 @@ CONFIG_CPU5_WDT=m CONFIG_SMSC_SCH311X_WDT=m CONFIG_SMSC37B787_WDT=m CONFIG_TQMX86_WDT=m -CONFIG_VIA_WDT=m +# CONFIG_VIA_WDT is not set CONFIG_W83627HF_WDT=m CONFIG_W83877F_WDT=m CONFIG_W83977F_WDT=m @@ -4906,8 +4540,6 @@ CONFIG_SSB_BLOCKIO=y CONFIG_SSB_PCIHOST_POSSIBLE=y CONFIG_SSB_PCIHOST=y CONFIG_SSB_B43_PCI_BRIDGE=y -CONFIG_SSB_PCMCIAHOST_POSSIBLE=y -CONFIG_SSB_PCMCIAHOST=y CONFIG_SSB_SDIOHOST_POSSIBLE=y CONFIG_SSB_SDIOHOST=y CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y @@ -4927,7 +4559,7 @@ CONFIG_BCMA_DRIVER_GPIO=y # # Multifunction device drivers # -CONFIG_MFD_CORE=y +CONFIG_MFD_CORE=m # CONFIG_MFD_AS3711 is not set # CONFIG_PMIC_ADP5520 is not set # CONFIG_MFD_AAT2870_CORE is not set @@ -4939,49 +4571,43 @@ CONFIG_MFD_CROS_EC=m # CONFIG_MFD_CROS_EC_CHARDEV is not set CONFIG_MFD_MADERA=m CONFIG_MFD_MADERA_I2C=m -CONFIG_MFD_MADERA_SPI=m CONFIG_MFD_CS47L15=y CONFIG_MFD_CS47L35=y CONFIG_MFD_CS47L85=y CONFIG_MFD_CS47L90=y CONFIG_MFD_CS47L92=y # CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_DA9052_SPI is not set # CONFIG_MFD_DA9052_I2C is not set # CONFIG_MFD_DA9055 is not set CONFIG_MFD_DA9062=m # CONFIG_MFD_DA9063 is not set # CONFIG_MFD_DA9150 is not set CONFIG_MFD_DLN2=m -# CONFIG_MFD_MC13XXX_SPI is not set # CONFIG_MFD_MC13XXX_I2C is not set CONFIG_HTC_PASIC3=m # CONFIG_HTC_I2CPLD is not set CONFIG_MFD_INTEL_QUARK_I2C_GPIO=m CONFIG_LPC_ICH=m CONFIG_LPC_SCH=m -CONFIG_INTEL_SOC_PMIC=y CONFIG_INTEL_SOC_PMIC_BXTWC=m -CONFIG_INTEL_SOC_PMIC_CHTWC=y CONFIG_INTEL_SOC_PMIC_CHTDC_TI=m CONFIG_MFD_INTEL_LPSS=m CONFIG_MFD_INTEL_LPSS_ACPI=m CONFIG_MFD_INTEL_LPSS_PCI=m # CONFIG_MFD_JANZ_CMODIO is not set -CONFIG_MFD_KEMPLD=m +# CONFIG_MFD_KEMPLD is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set # CONFIG_MFD_MAX14577 is not set # CONFIG_MFD_MAX77693 is not set # CONFIG_MFD_MAX77843 is not set -CONFIG_MFD_MAX8907=m +# CONFIG_MFD_MAX8907 is not set # CONFIG_MFD_MAX8925 is not set # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set # CONFIG_MFD_MT6397 is not set # CONFIG_MFD_MENF21BMC is not set -# CONFIG_EZX_PCAP is not set CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set @@ -4996,7 +4622,7 @@ CONFIG_MFD_VIPERBOARD=m # CONFIG_MFD_SMSC is not set # CONFIG_ABX500_CORE is not set # CONFIG_MFD_SYSCON is not set -# CONFIG_MFD_TI_AM335X_TSCADC is not set +CONFIG_MFD_TI_AM335X_TSCADC=m CONFIG_MFD_LP3943=m # CONFIG_MFD_LP8788 is not set CONFIG_MFD_TI_LMU=m @@ -5006,25 +4632,21 @@ CONFIG_TPS65010=m CONFIG_TPS6507X=m # CONFIG_MFD_TPS65086 is not set # CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS68470 is not set # CONFIG_MFD_TI_LP873X is not set # CONFIG_MFD_TPS6586X is not set # CONFIG_MFD_TPS65910 is not set # CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS65912_SPI is not set # CONFIG_MFD_TPS80031 is not set # CONFIG_TWL4030_CORE is not set # CONFIG_TWL6040_CORE is not set CONFIG_MFD_WL1273_CORE=m -CONFIG_MFD_LM3533=m +# CONFIG_MFD_LM3533 is not set # CONFIG_MFD_TMIO is not set CONFIG_MFD_TQMX86=m CONFIG_MFD_VX855=m # CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM831X_SPI is not set # CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8994 is not set # CONFIG_RAVE_SP_CORE is not set @@ -5058,7 +4680,6 @@ CONFIG_REGULATOR_LTC3676=m CONFIG_REGULATOR_MAX1586=m CONFIG_REGULATOR_MAX8649=m CONFIG_REGULATOR_MAX8660=m -CONFIG_REGULATOR_MAX8907=m CONFIG_REGULATOR_MAX8952=m CONFIG_REGULATOR_MT6311=m CONFIG_REGULATOR_PFUZE100=m @@ -5073,7 +4694,6 @@ CONFIG_REGULATOR_TPS62360=m CONFIG_REGULATOR_TPS65023=m CONFIG_REGULATOR_TPS6507X=m CONFIG_REGULATOR_TPS65132=m -CONFIG_REGULATOR_TPS6524X=m CONFIG_CEC_CORE=y CONFIG_CEC_NOTIFIER=y CONFIG_RC_CORE=m @@ -5119,20 +4739,15 @@ CONFIG_MEDIA_SUPPORT=m CONFIG_MEDIA_CAMERA_SUPPORT=y CONFIG_MEDIA_ANALOG_TV_SUPPORT=y CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -CONFIG_MEDIA_RADIO_SUPPORT=y +# CONFIG_MEDIA_RADIO_SUPPORT is not set CONFIG_MEDIA_SDR_SUPPORT=y CONFIG_MEDIA_CEC_SUPPORT=y -CONFIG_MEDIA_CONTROLLER=y -CONFIG_MEDIA_CONTROLLER_DVB=y -CONFIG_MEDIA_CONTROLLER_REQUEST_API=y +# CONFIG_MEDIA_CONTROLLER is not set CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_SUBDEV_API=y CONFIG_VIDEO_V4L2=m # CONFIG_VIDEO_ADV_DEBUG is not set # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_VIDEO_TUNER=m CONFIG_V4L2_MEM2MEM_DEV=m -CONFIG_V4L2_FLASH_LED_CLASS=m CONFIG_V4L2_FWNODE=m CONFIG_VIDEOBUF_GEN=m CONFIG_VIDEOBUF_DMA_SG=m @@ -5218,32 +4833,18 @@ CONFIG_VIDEO_USBTV=m # # Analog TV USB devices # -CONFIG_VIDEO_PVRUSB2=m -CONFIG_VIDEO_PVRUSB2_SYSFS=y -CONFIG_VIDEO_PVRUSB2_DVB=y -# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set -CONFIG_VIDEO_HDPVR=m -CONFIG_VIDEO_USBVISION=m -CONFIG_VIDEO_STK1160_COMMON=m -CONFIG_VIDEO_STK1160=m -CONFIG_VIDEO_GO7007=m -CONFIG_VIDEO_GO7007_USB=m -CONFIG_VIDEO_GO7007_LOADER=m -CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m +# CONFIG_VIDEO_PVRUSB2 is not set +# CONFIG_VIDEO_HDPVR is not set +# CONFIG_VIDEO_USBVISION is not set +# CONFIG_VIDEO_STK1160_COMMON is not set +# CONFIG_VIDEO_GO7007 is not set # # Analog/digital TV USB devices # -CONFIG_VIDEO_AU0828=m -CONFIG_VIDEO_AU0828_V4L2=y -CONFIG_VIDEO_AU0828_RC=y -CONFIG_VIDEO_CX231XX=m -CONFIG_VIDEO_CX231XX_RC=y -CONFIG_VIDEO_CX231XX_ALSA=m -CONFIG_VIDEO_CX231XX_DVB=m -CONFIG_VIDEO_TM6000=m -CONFIG_VIDEO_TM6000_ALSA=m -CONFIG_VIDEO_TM6000_DVB=m +# CONFIG_VIDEO_AU0828 is not set +# CONFIG_VIDEO_CX231XX is not set +# CONFIG_VIDEO_TM6000 is not set # # Digital TV USB devices @@ -5300,18 +4901,13 @@ CONFIG_DVB_AS102=m # # Webcam, TV (analog/digital) USB devices # -CONFIG_VIDEO_EM28XX=m -CONFIG_VIDEO_EM28XX_V4L2=m -CONFIG_VIDEO_EM28XX_ALSA=m -CONFIG_VIDEO_EM28XX_DVB=m -CONFIG_VIDEO_EM28XX_RC=m +# CONFIG_VIDEO_EM28XX is not set # # Software defined radio USB devices # CONFIG_USB_AIRSPY=m CONFIG_USB_HACKRF=m -CONFIG_USB_MSI2500=m # # USB HDMI CEC adapters @@ -5332,41 +4928,21 @@ CONFIG_VIDEO_TW686X=m # # Media capture/analog TV support # -CONFIG_VIDEO_IVTV=m -# CONFIG_VIDEO_IVTV_DEPRECATED_IOCTLS is not set -CONFIG_VIDEO_IVTV_ALSA=m -CONFIG_VIDEO_FB_IVTV=m -# CONFIG_VIDEO_FB_IVTV_FORCE_PAT is not set -CONFIG_VIDEO_HEXIUM_GEMINI=m -CONFIG_VIDEO_HEXIUM_ORION=m -CONFIG_VIDEO_MXB=m -CONFIG_VIDEO_DT3155=m +# CONFIG_VIDEO_IVTV is not set +# CONFIG_VIDEO_HEXIUM_GEMINI is not set +# CONFIG_VIDEO_HEXIUM_ORION is not set +# CONFIG_VIDEO_MXB is not set +# CONFIG_VIDEO_DT3155 is not set # # Media capture/analog/hybrid TV support # -CONFIG_VIDEO_CX18=m -CONFIG_VIDEO_CX18_ALSA=m -CONFIG_VIDEO_CX23885=m -CONFIG_MEDIA_ALTERA_CI=m -CONFIG_VIDEO_CX25821=m -CONFIG_VIDEO_CX25821_ALSA=m -CONFIG_VIDEO_CX88=m -CONFIG_VIDEO_CX88_ALSA=m -CONFIG_VIDEO_CX88_BLACKBIRD=m -CONFIG_VIDEO_CX88_DVB=m -CONFIG_VIDEO_CX88_ENABLE_VP3054=y -CONFIG_VIDEO_CX88_VP3054=m -CONFIG_VIDEO_CX88_MPEG=m -CONFIG_VIDEO_BT848=m -CONFIG_DVB_BT8XX=m -CONFIG_VIDEO_SAA7134=m -CONFIG_VIDEO_SAA7134_ALSA=m -CONFIG_VIDEO_SAA7134_RC=y -CONFIG_VIDEO_SAA7134_DVB=m -CONFIG_VIDEO_SAA7134_GO7007=m -CONFIG_VIDEO_SAA7164=m -# CONFIG_VIDEO_COBALT is not set +# CONFIG_VIDEO_CX18 is not set +# CONFIG_VIDEO_CX23885 is not set +# CONFIG_VIDEO_CX25821 is not set +# CONFIG_VIDEO_CX88 is not set +# CONFIG_VIDEO_SAA7134 is not set +# CONFIG_VIDEO_SAA7164 is not set # # Media digital TV PCI Adapters @@ -5392,19 +4968,11 @@ CONFIG_DVB_NGENE=m CONFIG_DVB_DDBRIDGE=m # CONFIG_DVB_DDBRIDGE_MSIENABLE is not set CONFIG_DVB_SMIPCIE=m -CONFIG_DVB_NETUP_UNIDVB=m -CONFIG_VIDEO_IPU3_CIO2=m -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_VIDEO_CAFE_CCIC=m -CONFIG_VIDEO_CADENCE=y -CONFIG_VIDEO_CADENCE_CSI2RX=m -CONFIG_VIDEO_CADENCE_CSI2TX=m -CONFIG_VIDEO_ASPEED=m +# CONFIG_V4L_PLATFORM_DRIVERS is not set CONFIG_V4L_MEM2MEM_DRIVERS=y CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m # CONFIG_VIDEO_SH_VEU is not set CONFIG_V4L_TEST_DRIVERS=y -CONFIG_VIDEO_VIMC=m CONFIG_VIDEO_VIVID=m CONFIG_VIDEO_VIVID_CEC=y CONFIG_VIDEO_VIVID_MAX_DEVS=64 @@ -5421,32 +4989,6 @@ CONFIG_SDR_PLATFORM_DRIVERS=y # Supported MMC/SDIO adapters # CONFIG_SMS_SDIO_DRV=m -CONFIG_RADIO_ADAPTERS=y -CONFIG_RADIO_TEA575X=m -CONFIG_RADIO_SI470X=m -CONFIG_USB_SI470X=m -# CONFIG_I2C_SI470X is not set -CONFIG_RADIO_SI4713=m -CONFIG_USB_SI4713=m -CONFIG_PLATFORM_SI4713=m -CONFIG_I2C_SI4713=m -CONFIG_USB_MR800=m -CONFIG_USB_DSBR=m -CONFIG_RADIO_MAXIRADIO=m -CONFIG_RADIO_SHARK=m -CONFIG_RADIO_SHARK2=m -CONFIG_USB_KEENE=m -CONFIG_USB_RAREMONO=m -CONFIG_USB_MA901=m -CONFIG_RADIO_TEA5764=m -CONFIG_RADIO_SAA7706H=m -CONFIG_RADIO_TEF6862=m -CONFIG_RADIO_WL1273=m - -# -# Texas Instruments WL128x FM driver (ST based) -# -# end of Texas Instruments WL128x FM driver (ST based) # # Supported FireWire (IEEE 1394) Adapters @@ -5458,7 +5000,6 @@ CONFIG_MEDIA_COMMON_OPTIONS=y # # common driver options # -CONFIG_VIDEO_CX2341X=m CONFIG_VIDEO_TVEEPROM=m CONFIG_CYPRESS_FIRMWARE=m CONFIG_VIDEOBUF2_CORE=m @@ -5467,7 +5008,6 @@ CONFIG_VIDEOBUF2_MEMOPS=m CONFIG_VIDEOBUF2_DMA_CONTIG=m CONFIG_VIDEOBUF2_VMALLOC=m CONFIG_VIDEOBUF2_DMA_SG=m -CONFIG_VIDEOBUF2_DVB=m CONFIG_DVB_B2C2_FLEXCOP=m CONFIG_VIDEO_SAA7146=m CONFIG_VIDEO_SAA7146_VV=m @@ -5493,7 +5033,6 @@ CONFIG_VIDEO_IR_I2C=m CONFIG_VIDEO_TVAUDIO=m CONFIG_VIDEO_TDA7432=m CONFIG_VIDEO_TDA9840=m -CONFIG_VIDEO_TDA1997X=m CONFIG_VIDEO_TEA6415C=m CONFIG_VIDEO_TEA6420=m CONFIG_VIDEO_MSP3400=m @@ -5515,12 +5054,7 @@ CONFIG_VIDEO_SAA6588=m # # Video decoders # -CONFIG_VIDEO_ADV7180=m CONFIG_VIDEO_ADV7183=m -CONFIG_VIDEO_ADV7604=m -CONFIG_VIDEO_ADV7604_CEC=y -CONFIG_VIDEO_ADV7842=m -CONFIG_VIDEO_ADV7842_CEC=y CONFIG_VIDEO_BT819=m CONFIG_VIDEO_BT856=m CONFIG_VIDEO_BT866=m @@ -5528,8 +5062,6 @@ CONFIG_VIDEO_KS0127=m CONFIG_VIDEO_ML86V7667=m CONFIG_VIDEO_SAA7110=m CONFIG_VIDEO_SAA711X=m -CONFIG_VIDEO_TC358743=m -CONFIG_VIDEO_TC358743_CEC=y CONFIG_VIDEO_TVP514X=m CONFIG_VIDEO_TVP5150=m CONFIG_VIDEO_TVP7002=m @@ -5554,75 +5086,36 @@ CONFIG_VIDEO_ADV7170=m CONFIG_VIDEO_ADV7175=m CONFIG_VIDEO_ADV7343=m CONFIG_VIDEO_ADV7393=m -CONFIG_VIDEO_ADV7511=m -CONFIG_VIDEO_ADV7511_CEC=y -CONFIG_VIDEO_AD9389B=m CONFIG_VIDEO_AK881X=m CONFIG_VIDEO_THS8200=m # # Camera sensor devices # -CONFIG_VIDEO_APTINA_PLL=m -CONFIG_VIDEO_SMIAPP_PLL=m -CONFIG_VIDEO_IMX214=m -CONFIG_VIDEO_IMX258=m -CONFIG_VIDEO_IMX274=m -CONFIG_VIDEO_IMX319=m -CONFIG_VIDEO_IMX355=m CONFIG_VIDEO_OV2640=m CONFIG_VIDEO_OV2659=m -CONFIG_VIDEO_OV2680=m -CONFIG_VIDEO_OV2685=m -CONFIG_VIDEO_OV5647=m CONFIG_VIDEO_OV6650=m -CONFIG_VIDEO_OV5670=m CONFIG_VIDEO_OV5695=m -CONFIG_VIDEO_OV7251=m CONFIG_VIDEO_OV772X=m CONFIG_VIDEO_OV7640=m CONFIG_VIDEO_OV7670=m CONFIG_VIDEO_OV7740=m -CONFIG_VIDEO_OV8856=m CONFIG_VIDEO_OV9640=m -CONFIG_VIDEO_OV9650=m -CONFIG_VIDEO_OV13858=m CONFIG_VIDEO_VS6624=m -CONFIG_VIDEO_MT9M001=m -CONFIG_VIDEO_MT9M032=m CONFIG_VIDEO_MT9M111=m -CONFIG_VIDEO_MT9P031=m -CONFIG_VIDEO_MT9T001=m CONFIG_VIDEO_MT9T112=m CONFIG_VIDEO_MT9V011=m -CONFIG_VIDEO_MT9V032=m CONFIG_VIDEO_MT9V111=m CONFIG_VIDEO_SR030PC30=m -CONFIG_VIDEO_NOON010PC30=m -CONFIG_VIDEO_M5MOLS=m CONFIG_VIDEO_RJ54N1=m -CONFIG_VIDEO_S5K6AA=m -CONFIG_VIDEO_S5K6A3=m -CONFIG_VIDEO_S5K4ECGX=m -CONFIG_VIDEO_S5K5BAF=m -CONFIG_VIDEO_SMIAPP=m -CONFIG_VIDEO_ET8EK8=m -CONFIG_VIDEO_S5C73M3=m # # Lens drivers # -CONFIG_VIDEO_AD5820=m -CONFIG_VIDEO_AK7375=m -CONFIG_VIDEO_DW9714=m -CONFIG_VIDEO_DW9807_VCM=m # # Flash devices # -CONFIG_VIDEO_ADP1653=m -CONFIG_VIDEO_LM3560=m -CONFIG_VIDEO_LM3646=m # # Video improvement chips @@ -5646,21 +5139,13 @@ CONFIG_SDR_MAX2175=m CONFIG_VIDEO_THS7303=m CONFIG_VIDEO_M52790=m CONFIG_VIDEO_I2C=m -# CONFIG_VIDEO_ST_MIPID02 is not set # end of I2C Encoders, decoders, sensors and other helper chips # # SPI helper chips # -CONFIG_VIDEO_GS1662=m # end of SPI helper chips -# -# Media SPI Adapters -# -CONFIG_CXD2880_SPI_DRV=m -# end of Media SPI Adapters - CONFIG_MEDIA_TUNER=m # @@ -5674,7 +5159,6 @@ CONFIG_MEDIA_TUNER_TDA18271=m CONFIG_MEDIA_TUNER_TDA9887=m CONFIG_MEDIA_TUNER_TEA5761=m CONFIG_MEDIA_TUNER_TEA5767=m -CONFIG_MEDIA_TUNER_MSI001=m CONFIG_MEDIA_TUNER_MT20XX=m CONFIG_MEDIA_TUNER_MT2060=m CONFIG_MEDIA_TUNER_MT2063=m @@ -5793,7 +5277,6 @@ CONFIG_DVB_SI2168=m CONFIG_DVB_AS102_FE=m CONFIG_DVB_ZD1301_DEMOD=m CONFIG_DVB_GP8PSK_FE=m -CONFIG_DVB_CXD2880=m # # DVB-C (cable) frontends @@ -5886,7 +5369,7 @@ CONFIG_AGP_VIA=y CONFIG_INTEL_GTT=y CONFIG_VGA_ARB=y CONFIG_VGA_ARB_MAX_GPUS=16 -CONFIG_VGA_SWITCHEROO=y +# CONFIG_VGA_SWITCHEROO is not set CONFIG_DRM=m CONFIG_DRM_MIPI_DSI=y CONFIG_DRM_DP_AUX_CHARDEV=y @@ -5911,7 +5394,7 @@ CONFIG_DRM_SCHED=m CONFIG_DRM_I2C_CH7006=m CONFIG_DRM_I2C_SIL164=m # CONFIG_DRM_I2C_NXP_TDA998X is not set -CONFIG_DRM_I2C_NXP_TDA9950=m +# CONFIG_DRM_I2C_NXP_TDA9950 is not set # end of I2C encoder or helper chips # @@ -5920,10 +5403,11 @@ CONFIG_DRM_I2C_NXP_TDA9950=m # end of ARM devices CONFIG_DRM_RADEON=m -# CONFIG_DRM_RADEON_USERPTR is not set +CONFIG_DRM_RADEON_USERPTR=y CONFIG_DRM_AMDGPU=m CONFIG_DRM_AMDGPU_SI=y CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_AMDGPU_USERPTR=y # CONFIG_DRM_AMDGPU_GART_DEBUGFS is not set # @@ -5949,6 +5433,7 @@ CONFIG_NOUVEAU_DEBUG=5 CONFIG_NOUVEAU_DEBUG_DEFAULT=3 # CONFIG_NOUVEAU_DEBUG_MMU is not set CONFIG_DRM_NOUVEAU_BACKLIGHT=y +CONFIG_DRM_NOUVEAU_SVM=y CONFIG_DRM_I915=m # CONFIG_DRM_I915_ALPHA_SUPPORT is not set CONFIG_DRM_I915_FORCE_PROBE="" @@ -5981,12 +5466,12 @@ CONFIG_DRM_I915_SPIN_REQUEST=5 # end of drm/i915 Profile Guided Optimisation CONFIG_DRM_VGEM=m -CONFIG_DRM_VKMS=m +# CONFIG_DRM_VKMS is not set CONFIG_DRM_VMWGFX=m CONFIG_DRM_VMWGFX_FBCON=y CONFIG_DRM_GMA500=m # CONFIG_DRM_GMA600 is not set -CONFIG_DRM_GMA3600=y +# CONFIG_DRM_GMA3600 is not set CONFIG_DRM_UDL=m CONFIG_DRM_AST=m CONFIG_DRM_MGAG200=m @@ -5999,7 +5484,7 @@ CONFIG_DRM_PANEL=y # # Display Panels # -# CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN is not set +CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m # end of Display Panels CONFIG_DRM_BRIDGE=y @@ -6014,15 +5499,7 @@ CONFIG_DRM_PANEL_BRIDGE=y # CONFIG_DRM_ETNAVIV is not set # CONFIG_DRM_HISI_HIBMC is not set CONFIG_DRM_TINYDRM=m -# CONFIG_TINYDRM_HX8357D is not set -# CONFIG_TINYDRM_ILI9225 is not set -# CONFIG_TINYDRM_ILI9341 is not set -# CONFIG_TINYDRM_MI0283QT is not set -# CONFIG_TINYDRM_REPAPER is not set -# CONFIG_TINYDRM_ST7586 is not set -# CONFIG_TINYDRM_ST7735R is not set -CONFIG_DRM_XEN=y -CONFIG_DRM_XEN_FRONTEND=m +# CONFIG_DRM_XEN is not set CONFIG_DRM_VBOXVIDEO=m # CONFIG_DRM_LEGACY is not set CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y @@ -6035,7 +5512,6 @@ CONFIG_FB_CMDLINE=y CONFIG_FB_NOTIFY=y CONFIG_FB=y CONFIG_FIRMWARE_EDID=y -CONFIG_FB_DDC=m CONFIG_FB_BOOT_VESA_SUPPORT=y CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y @@ -6068,7 +5544,7 @@ CONFIG_FB_EFI=y # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set -CONFIG_FB_I740=m +# CONFIG_FB_I740 is not set # CONFIG_FB_LE80578 is not set # CONFIG_FB_INTEL is not set # CONFIG_FB_MATROX is not set @@ -6088,15 +5564,13 @@ CONFIG_FB_I740=m # CONFIG_FB_ARK is not set # CONFIG_FB_PM3 is not set # CONFIG_FB_CARMINE is not set -CONFIG_FB_SMSCUFX=m +# CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set CONFIG_FB_IBM_GXT4500=m CONFIG_FB_VIRTUAL=m CONFIG_XEN_FBDEV_FRONTEND=m -CONFIG_FB_METRONOME=m -CONFIG_FB_MB862XX=m -CONFIG_FB_MB862XX_PCI_GDC=y -CONFIG_FB_MB862XX_I2C=y +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set CONFIG_FB_HYPERV=m # CONFIG_FB_SIMPLE is not set # CONFIG_FB_SM712 is not set @@ -6106,38 +5580,25 @@ CONFIG_FB_HYPERV=m # Backlight & LCD device support # CONFIG_LCD_CLASS_DEVICE=m -# CONFIG_LCD_L4F00242T03 is not set -# CONFIG_LCD_LMS283GF05 is not set -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI922X is not set -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_TDO24M is not set -# CONFIG_LCD_VGG2432A4 is not set CONFIG_LCD_PLATFORM=m -# CONFIG_LCD_AMS369FG06 is not set -# CONFIG_LCD_LMS501KF03 is not set -# CONFIG_LCD_HX8357 is not set -# CONFIG_LCD_OTM3225A is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_GENERIC=m -CONFIG_BACKLIGHT_LM3533=m -CONFIG_BACKLIGHT_PWM=m +# CONFIG_BACKLIGHT_PWM is not set CONFIG_BACKLIGHT_APPLE=m CONFIG_BACKLIGHT_PM8941_WLED=m CONFIG_BACKLIGHT_SAHARA=m CONFIG_BACKLIGHT_ADP8860=m CONFIG_BACKLIGHT_ADP8870=m CONFIG_BACKLIGHT_LM3630A=m -CONFIG_BACKLIGHT_LM3639=m -CONFIG_BACKLIGHT_LP855X=m -CONFIG_BACKLIGHT_GPIO=m -CONFIG_BACKLIGHT_LV5207LP=m -CONFIG_BACKLIGHT_BD6107=m +# CONFIG_BACKLIGHT_LM3639 is not set +# CONFIG_BACKLIGHT_LP855X is not set +# CONFIG_BACKLIGHT_GPIO is not set +# CONFIG_BACKLIGHT_LV5207LP is not set +# CONFIG_BACKLIGHT_BD6107 is not set CONFIG_BACKLIGHT_ARCXCNN=m # end of Backlight & LCD device support -CONFIG_VGASTATE=m -CONFIG_VIDEOMODE_HELPERS=y +# CONFIG_VGASTATE is not set CONFIG_HDMI=y # @@ -6145,7 +5606,7 @@ CONFIG_HDMI=y # CONFIG_VGA_CONSOLE=y CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=128 +CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT=y CONFIG_DUMMY_CONSOLE=y CONFIG_DUMMY_CONSOLE_COLUMNS=80 @@ -6262,9 +5723,7 @@ CONFIG_SND_ENS1371=m CONFIG_SND_ES1938=m CONFIG_SND_ES1968=m CONFIG_SND_ES1968_INPUT=y -CONFIG_SND_ES1968_RADIO=y CONFIG_SND_FM801=m -CONFIG_SND_FM801_TEA575X_BOOL=y CONFIG_SND_HDSP=m CONFIG_SND_HDSPM=m CONFIG_SND_ICE1712=m @@ -6314,7 +5773,7 @@ CONFIG_SND_HDA_CODEC_CA0132_DSP=y CONFIG_SND_HDA_CODEC_CMEDIA=m CONFIG_SND_HDA_CODEC_SI3054=m CONFIG_SND_HDA_GENERIC=m -CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 # end of HD-Audio CONFIG_SND_HDA_CORE=m @@ -6323,17 +5782,15 @@ CONFIG_SND_HDA_COMPONENT=y CONFIG_SND_HDA_I915=y CONFIG_SND_HDA_EXT_CORE=m CONFIG_SND_HDA_PREALLOC_SIZE=1024 -# CONFIG_SND_SPI is not set CONFIG_SND_USB=y CONFIG_SND_USB_AUDIO=m -CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y CONFIG_SND_USB_UA101=m CONFIG_SND_USB_USX2Y=m CONFIG_SND_USB_CAIAQ=m CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_US122L=m CONFIG_SND_USB_6FIRE=m -CONFIG_SND_USB_HIFACE=m +# CONFIG_SND_USB_HIFACE is not set CONFIG_SND_BCD2000=m CONFIG_SND_USB_LINE6=m CONFIG_SND_USB_POD=m @@ -6351,16 +5808,15 @@ CONFIG_SND_FIREWIRE_DIGI00X=m CONFIG_SND_FIREWIRE_TASCAM=m CONFIG_SND_FIREWIRE_MOTU=m CONFIG_SND_FIREFACE=m -CONFIG_SND_PCMCIA=y -CONFIG_SND_VXPOCKET=m -CONFIG_SND_PDAUDIOCF=m CONFIG_SND_SOC=m CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y CONFIG_SND_SOC_COMPRESS=y CONFIG_SND_SOC_TOPOLOGY=y CONFIG_SND_SOC_ACPI=m -# CONFIG_SND_SOC_AMD_ACP is not set -# CONFIG_SND_SOC_AMD_ACP3x is not set +CONFIG_SND_SOC_AMD_ACP=m +CONFIG_SND_SOC_AMD_CZ_DA7219MX98357_MACH=m +CONFIG_SND_SOC_AMD_CZ_RT5645_MACH=m +CONFIG_SND_SOC_AMD_ACP3x=m # CONFIG_SND_ATMEL_SOC is not set # CONFIG_SND_DESIGNWARE_I2S is not set @@ -6409,7 +5865,7 @@ CONFIG_SND_SOC_INTEL_SKYLAKE_HDAUDIO_CODEC=y CONFIG_SND_SOC_INTEL_SKYLAKE_COMMON=m CONFIG_SND_SOC_ACPI_INTEL_MATCH=m CONFIG_SND_SOC_INTEL_MACH=y -CONFIG_SND_SOC_INTEL_HASWELL_MACH=m +# CONFIG_SND_SOC_INTEL_HASWELL_MACH is not set CONFIG_SND_SOC_INTEL_BDW_RT5677_MACH=m CONFIG_SND_SOC_INTEL_BROADWELL_MACH=m CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH=m @@ -6428,14 +5884,13 @@ CONFIG_SND_SOC_INTEL_BYT_CHT_NOCODEC_MACH=m # CONFIG_SND_SOC_INTEL_BXT_DA7219_MAX98357A_MACH is not set # CONFIG_SND_SOC_INTEL_BXT_RT298_MACH is not set CONFIG_SND_SOC_INTEL_KBL_RT5663_MAX98927_MACH=m -CONFIG_SND_SOC_INTEL_KBL_RT5663_RT5514_MAX98927_MACH=m CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_KBL_DA7219_MAX98927_MACH=m CONFIG_SND_SOC_INTEL_KBL_RT5660_MACH=m CONFIG_SND_SOC_INTEL_GLK_RT5682_MAX98357A_MACH=m CONFIG_SND_SOC_INTEL_SKL_HDA_DSP_GENERIC_MACH=m CONFIG_SND_SOC_INTEL_SOF_RT5682_MACH=m -CONFIG_SND_SOC_MTK_BTCVSD=m +# CONFIG_SND_SOC_MTK_BTCVSD is not set CONFIG_SND_SOC_SOF_TOPLEVEL=y CONFIG_SND_SOC_SOF_PCI=m CONFIG_SND_SOC_SOF_ACPI=m @@ -6496,9 +5951,7 @@ CONFIG_SND_SOC_I2C_AND_SPI=m # CONFIG_SND_SOC_AC97_CODEC is not set # CONFIG_SND_SOC_ADAU1701 is not set # CONFIG_SND_SOC_ADAU1761_I2C is not set -# CONFIG_SND_SOC_ADAU1761_SPI is not set CONFIG_SND_SOC_ADAU7002=m -# CONFIG_SND_SOC_AK4104 is not set # CONFIG_SND_SOC_AK4118 is not set # CONFIG_SND_SOC_AK4458 is not set # CONFIG_SND_SOC_AK4554 is not set @@ -6509,12 +5962,12 @@ CONFIG_SND_SOC_ADAU7002=m # CONFIG_SND_SOC_ALC5623 is not set # CONFIG_SND_SOC_BD28623 is not set CONFIG_SND_SOC_BT_SCO=m -CONFIG_SND_SOC_CROS_EC_CODEC=m +# CONFIG_SND_SOC_CROS_EC_CODEC is not set # CONFIG_SND_SOC_CS35L32 is not set # CONFIG_SND_SOC_CS35L33 is not set CONFIG_SND_SOC_CS35L34=m CONFIG_SND_SOC_CS35L35=m -CONFIG_SND_SOC_CS35L36=m +# CONFIG_SND_SOC_CS35L36 is not set CONFIG_SND_SOC_CS42L42=m # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS42L52 is not set @@ -6523,10 +5976,9 @@ CONFIG_SND_SOC_CS42L42=m # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set # CONFIG_SND_SOC_CS4271_I2C is not set -# CONFIG_SND_SOC_CS4271_SPI is not set # CONFIG_SND_SOC_CS42XX8_I2C is not set # CONFIG_SND_SOC_CS43130 is not set -CONFIG_SND_SOC_CS4341=m +# CONFIG_SND_SOC_CS4341 is not set # CONFIG_SND_SOC_CS4349 is not set # CONFIG_SND_SOC_CS53L30 is not set CONFIG_SND_SOC_CX2072X=m @@ -6537,7 +5989,6 @@ CONFIG_SND_SOC_DMIC=m # CONFIG_SND_SOC_ES7241 is not set CONFIG_SND_SOC_ES8316=m # CONFIG_SND_SOC_ES8328_I2C is not set -# CONFIG_SND_SOC_ES8328_SPI is not set # CONFIG_SND_SOC_GTM601 is not set CONFIG_SND_SOC_HDAC_HDMI=m CONFIG_SND_SOC_HDAC_HDA=m @@ -6555,21 +6006,14 @@ CONFIG_SND_SOC_MAX98373=m # CONFIG_SND_SOC_PCM1681 is not set # CONFIG_SND_SOC_PCM1789_I2C is not set # CONFIG_SND_SOC_PCM179X_I2C is not set -# CONFIG_SND_SOC_PCM179X_SPI is not set # CONFIG_SND_SOC_PCM186X_I2C is not set -# CONFIG_SND_SOC_PCM186X_SPI is not set # CONFIG_SND_SOC_PCM3060_I2C is not set -# CONFIG_SND_SOC_PCM3060_SPI is not set # CONFIG_SND_SOC_PCM3168A_I2C is not set -# CONFIG_SND_SOC_PCM3168A_SPI is not set # CONFIG_SND_SOC_PCM512x_I2C is not set -# CONFIG_SND_SOC_PCM512x_SPI is not set # CONFIG_SND_SOC_RK3328 is not set CONFIG_SND_SOC_RL6231=m CONFIG_SND_SOC_RL6347A=m CONFIG_SND_SOC_RT286=m -CONFIG_SND_SOC_RT5514=m -CONFIG_SND_SOC_RT5514_SPI=m # CONFIG_SND_SOC_RT5514_SPI_BUILTIN is not set # CONFIG_SND_SOC_RT5616 is not set # CONFIG_SND_SOC_RT5631 is not set @@ -6580,14 +6024,13 @@ CONFIG_SND_SOC_RT5660=m CONFIG_SND_SOC_RT5663=m CONFIG_SND_SOC_RT5670=m CONFIG_SND_SOC_RT5677=m -CONFIG_SND_SOC_RT5677_SPI=m +# CONFIG_SND_SOC_RT5677_SPI is not set CONFIG_SND_SOC_RT5682=m # CONFIG_SND_SOC_SGTL5000 is not set # CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set # CONFIG_SND_SOC_SIRF_AUDIO_CODEC is not set # CONFIG_SND_SOC_SPDIF is not set # CONFIG_SND_SOC_SSM2305 is not set -# CONFIG_SND_SOC_SSM2602_SPI is not set # CONFIG_SND_SOC_SSM2602_I2C is not set # CONFIG_SND_SOC_SSM4567 is not set # CONFIG_SND_SOC_STA32X is not set @@ -6598,13 +6041,11 @@ CONFIG_SND_SOC_RT5682=m # CONFIG_SND_SOC_TAS571X is not set CONFIG_SND_SOC_TAS5720=m # CONFIG_SND_SOC_TAS6424 is not set -CONFIG_SND_SOC_TDA7419=m +# CONFIG_SND_SOC_TDA7419 is not set # CONFIG_SND_SOC_TFA9879 is not set # CONFIG_SND_SOC_TLV320AIC23_I2C is not set -# CONFIG_SND_SOC_TLV320AIC23_SPI is not set # CONFIG_SND_SOC_TLV320AIC31XX is not set # CONFIG_SND_SOC_TLV320AIC32X4_I2C is not set -# CONFIG_SND_SOC_TLV320AIC32X4_SPI is not set # CONFIG_SND_SOC_TLV320AIC3X is not set CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_TSCS42XX is not set @@ -6620,11 +6061,9 @@ CONFIG_SND_SOC_TS3A227E=m # CONFIG_SND_SOC_WM8741 is not set # CONFIG_SND_SOC_WM8750 is not set # CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8770 is not set # CONFIG_SND_SOC_WM8776 is not set # CONFIG_SND_SOC_WM8782 is not set # CONFIG_SND_SOC_WM8804_I2C is not set -# CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set # CONFIG_SND_SOC_WM8904 is not set # CONFIG_SND_SOC_WM8960 is not set @@ -6647,7 +6086,7 @@ CONFIG_SND_SOC_NAU8824=m CONFIG_SND_X86=y CONFIG_HDMI_LPE_AUDIO=m CONFIG_SND_SYNTH_EMUX=m -CONFIG_SND_XEN_FRONTEND=m +# CONFIG_SND_XEN_FRONTEND is not set CONFIG_AC97_BUS=m # @@ -6702,8 +6141,8 @@ CONFIG_HID_WALTOP=m CONFIG_HID_VIEWSONIC=m CONFIG_HID_GYRATION=m CONFIG_HID_ICADE=m -# CONFIG_HID_ITE is not set -# CONFIG_HID_JABRA is not set +CONFIG_HID_ITE=m +CONFIG_HID_JABRA=m CONFIG_HID_TWINHAN=m CONFIG_HID_KENSINGTON=m CONFIG_HID_LCPOWER=m @@ -6768,7 +6207,7 @@ CONFIG_HID_ZEROPLUS=m CONFIG_ZEROPLUS_FF=y CONFIG_HID_ZYDACRON=m CONFIG_HID_SENSOR_HUB=m -# CONFIG_HID_SENSOR_CUSTOM_SENSOR is not set +CONFIG_HID_SENSOR_CUSTOM_SENSOR=m CONFIG_HID_ALPS=m # end of Special HID drivers @@ -6814,21 +6253,19 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # CONFIG_USB_DEFAULT_PERSIST=y # CONFIG_USB_DYNAMIC_MINORS is not set -CONFIG_USB_OTG=y +# CONFIG_USB_OTG is not set # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_OTG_FSM=m CONFIG_USB_LEDS_TRIGGER_USBPORT=m CONFIG_USB_AUTOSUSPEND_DELAY=2 CONFIG_USB_MON=m -CONFIG_USB_WUSB=m -CONFIG_USB_WUSB_CBAF=m -# CONFIG_USB_WUSB_CBAF_DEBUG is not set +# CONFIG_USB_WUSB is not set +# CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # -CONFIG_USB_C67X00_HCD=m +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=m # CONFIG_USB_XHCI_DBGCAP is not set CONFIG_USB_XHCI_PCI=m @@ -6839,25 +6276,23 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_PCI=m CONFIG_USB_EHCI_FSL=m CONFIG_USB_EHCI_HCD_PLATFORM=m -CONFIG_USB_OXU210HP_HCD=m -CONFIG_USB_ISP116X_HCD=m -CONFIG_USB_FOTG210_HCD=m -# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_OXU210HP_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_FOTG210_HCD is not set CONFIG_USB_OHCI_HCD=m CONFIG_USB_OHCI_HCD_PCI=m -CONFIG_USB_OHCI_HCD_SSB=y +# CONFIG_USB_OHCI_HCD_SSB is not set CONFIG_USB_OHCI_HCD_PLATFORM=m CONFIG_USB_UHCI_HCD=m -CONFIG_USB_U132_HCD=m -CONFIG_USB_SL811_HCD=m -# CONFIG_USB_SL811_HCD_ISO is not set -CONFIG_USB_SL811_CS=m -CONFIG_USB_R8A66597_HCD=m -CONFIG_USB_WHCI_HCD=m -CONFIG_USB_HWA_HCD=m -CONFIG_USB_HCD_BCMA=m -CONFIG_USB_HCD_SSB=m +# CONFIG_USB_U132_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set +# CONFIG_USB_WHCI_HCD is not set +# CONFIG_USB_HWA_HCD is not set +# CONFIG_USB_HCD_BCMA is not set +# CONFIG_USB_HCD_SSB is not set # CONFIG_USB_HCD_TEST_MODE is not set +CONFIG_USB_XEN_HCD=m # # USB Device Class drivers @@ -6895,7 +6330,7 @@ CONFIG_USB_UAS=m # # USB Imaging devices # -CONFIG_USB_MDC800=m +# CONFIG_USB_MDC800 is not set CONFIG_USB_MICROTEK=m CONFIG_USBIP_CORE=m CONFIG_USBIP_VHCI_HCD=m @@ -6924,7 +6359,7 @@ CONFIG_USB_ISP1760_HOST_ROLE=y # # USB port drivers # -CONFIG_USB_USS720=m +# CONFIG_USB_USS720 is not set CONFIG_USB_SERIAL=m CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_SIMPLE=m @@ -6985,27 +6420,27 @@ CONFIG_USB_SERIAL_DEBUG=m # # USB Miscellaneous drivers # -CONFIG_USB_EMI62=m -CONFIG_USB_EMI26=m -CONFIG_USB_ADUTUX=m +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set CONFIG_USB_SEVSEG=m -CONFIG_USB_RIO500=m +# CONFIG_USB_RIO500 is not set CONFIG_USB_LEGOTOWER=m CONFIG_USB_LCD=m -CONFIG_USB_CYPRESS_CY7C63=m -CONFIG_USB_CYTHERM=m -CONFIG_USB_IDMOUSE=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_IDMOUSE is not set CONFIG_USB_FTDI_ELAN=m -CONFIG_USB_APPLEDISPLAY=m +# CONFIG_USB_APPLEDISPLAY is not set CONFIG_USB_SISUSBVGA=m CONFIG_USB_SISUSBVGA_CON=y CONFIG_USB_LD=m -CONFIG_USB_TRANCEVIBRATOR=m -CONFIG_USB_IOWARRIOR=m +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set CONFIG_USB_EHSET_TEST_FIXTURE=m CONFIG_USB_ISIGHTFW=m -CONFIG_USB_YUREX=m +# CONFIG_USB_YUREX is not set CONFIG_USB_EZUSB_FX2=m CONFIG_USB_HUB_USB251XB=m CONFIG_USB_HSIC_USB3503=m @@ -7032,8 +6467,7 @@ CONFIG_TYPEC=m CONFIG_TYPEC_TCPM=m CONFIG_TYPEC_TCPCI=m CONFIG_TYPEC_RT1711H=m -CONFIG_TYPEC_FUSB302=m -CONFIG_TYPEC_WCOVE=m +# CONFIG_TYPEC_FUSB302 is not set CONFIG_TYPEC_UCSI=m CONFIG_UCSI_CCG=m CONFIG_UCSI_ACPI=m @@ -7042,7 +6476,7 @@ CONFIG_TYPEC_TPS6598X=m # # USB Type-C Multiplexer/DeMultiplexer Switch support # -CONFIG_TYPEC_MUX_PI3USB30532=m +# CONFIG_TYPEC_MUX_PI3USB30532 is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support # @@ -7079,8 +6513,6 @@ CONFIG_MMC_SDHCI_PLTFM=m CONFIG_MMC_WBSD=m CONFIG_MMC_ALCOR=m CONFIG_MMC_TIFM_SD=m -CONFIG_MMC_SPI=m -CONFIG_MMC_SDRICOH_CS=m CONFIG_MMC_CB710=m CONFIG_MMC_VIA_SDMMC=m CONFIG_MMC_VUB300=m @@ -7091,7 +6523,7 @@ CONFIG_MMC_REALTEK_USB=m CONFIG_MMC_CQHCI=m CONFIG_MMC_TOSHIBA_PCI=m CONFIG_MMC_MTK=m -CONFIG_MMC_SDHCI_XENON=m +# CONFIG_MMC_SDHCI_XENON is not set CONFIG_MEMSTICK=m # CONFIG_MEMSTICK_DEBUG is not set @@ -7122,7 +6554,6 @@ CONFIG_LEDS_APU=m # CONFIG_LEDS_AS3645A is not set CONFIG_LEDS_LM3530=m CONFIG_LEDS_LM3532=m -CONFIG_LEDS_LM3533=m CONFIG_LEDS_LM3642=m CONFIG_LEDS_LM3601X=m CONFIG_LEDS_PCA9532=m @@ -7139,7 +6570,6 @@ CONFIG_LEDS_CLEVO_MAIL=m CONFIG_LEDS_PCA955X=m CONFIG_LEDS_PCA955X_GPIO=y CONFIG_LEDS_PCA963X=m -# CONFIG_LEDS_DAC124S085 is not set CONFIG_LEDS_PWM=m CONFIG_LEDS_REGULATOR=m CONFIG_LEDS_BD2802=m @@ -7228,7 +6658,7 @@ CONFIG_EDAC=y CONFIG_EDAC_LEGACY_SYSFS=y # CONFIG_EDAC_DEBUG is not set CONFIG_EDAC_DECODE_MCE=m -# CONFIG_EDAC_GHES is not set +CONFIG_EDAC_GHES=y CONFIG_EDAC_AMD64=m CONFIG_EDAC_AMD64_ERROR_INJECTION=y CONFIG_EDAC_E752X=m @@ -7249,12 +6679,11 @@ CONFIG_EDAC_PND2=m CONFIG_RTC_LIB=y CONFIG_RTC_MC146818_LIB=y CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_HCTOSYS is not set CONFIG_RTC_SYSTOHC=y CONFIG_RTC_SYSTOHC_DEVICE="rtc0" # CONFIG_RTC_DEBUG is not set -CONFIG_RTC_NVMEM=y +# CONFIG_RTC_NVMEM is not set # # RTC interfaces @@ -7277,7 +6706,6 @@ CONFIG_RTC_DRV_DS1374=m CONFIG_RTC_DRV_DS1374_WDT=y CONFIG_RTC_DRV_DS1672=m CONFIG_RTC_DRV_MAX6900=m -CONFIG_RTC_DRV_MAX8907=m CONFIG_RTC_DRV_RS5C372=m CONFIG_RTC_DRV_ISL1208=m # CONFIG_RTC_DRV_ISL12022 is not set @@ -7304,21 +6732,6 @@ CONFIG_RTC_DRV_SD3078=m # # SPI RTC drivers # -# CONFIG_RTC_DRV_M41T93 is not set -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1302 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1343 is not set -# CONFIG_RTC_DRV_DS1347 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6916 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RX4581 is not set -# CONFIG_RTC_DRV_RX6110 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_PCF2123 is not set -# CONFIG_RTC_DRV_MCP795 is not set CONFIG_RTC_I2C_AND_SPI=y # @@ -7372,11 +6785,10 @@ CONFIG_DMA_ACPI=y CONFIG_ALTERA_MSGDMA=m CONFIG_INTEL_IDMA64=m CONFIG_INTEL_IOATDMA=m -CONFIG_INTEL_MIC_X100_DMA=m # CONFIG_QCOM_HIDMA_MGMT is not set # CONFIG_QCOM_HIDMA is not set CONFIG_DW_DMAC_CORE=y -CONFIG_DW_DMAC=m +# CONFIG_DW_DMAC is not set CONFIG_DW_DMAC_PCI=y CONFIG_DW_EDMA=m CONFIG_DW_EDMA_PCIE=m @@ -7393,7 +6805,7 @@ CONFIG_DMA_ENGINE_RAID=y # DMABUF options # CONFIG_SYNC_FILE=y -# CONFIG_SW_SYNC is not set +CONFIG_SW_SYNC=y CONFIG_UDMABUF=y # end of DMABUF options @@ -7413,7 +6825,7 @@ CONFIG_PANEL_PROFILE=5 # CONFIG_CHARLCD_BL_OFF is not set # CONFIG_CHARLCD_BL_ON is not set CONFIG_CHARLCD_BL_FLASH=y -CONFIG_PANEL=m +# CONFIG_PANEL is not set CONFIG_CHARLCD=m CONFIG_UIO=m CONFIG_UIO_CIF=m @@ -7440,14 +6852,15 @@ CONFIG_VFIO_MDEV_DEVICE=m CONFIG_IRQ_BYPASS_MANAGER=m CONFIG_VIRT_DRIVERS=y CONFIG_VBOXGUEST=m -CONFIG_VIRTIO=y +CONFIG_VIRTIO=m CONFIG_VIRTIO_MENU=y -CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI=m CONFIG_VIRTIO_PCI_LEGACY=y CONFIG_VIRTIO_PMEM=m CONFIG_VIRTIO_BALLOON=m CONFIG_VIRTIO_INPUT=m -# CONFIG_VIRTIO_MMIO is not set +CONFIG_VIRTIO_MMIO=m +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set # # Microsoft Hyper-V guest support @@ -7490,25 +6903,20 @@ CONFIG_XEN_AUTO_XLATE=y CONFIG_XEN_ACPI=y CONFIG_XEN_SYMS=y CONFIG_XEN_HAVE_VPMU=y -CONFIG_XEN_FRONT_PGDIR_SHBUF=m # end of Xen driver support CONFIG_STAGING=y -CONFIG_PRISM2_USB=m +# CONFIG_PRISM2_USB is not set # CONFIG_COMEDI is not set -CONFIG_RTL8192U=m -CONFIG_RTLLIB=m -CONFIG_RTLLIB_CRYPTO_CCMP=m -CONFIG_RTLLIB_CRYPTO_TKIP=m -CONFIG_RTLLIB_CRYPTO_WEP=m -CONFIG_RTL8192E=m +# CONFIG_RTL8192U is not set +# CONFIG_RTLLIB is not set CONFIG_RTL8723BS=m -CONFIG_R8712U=m +# CONFIG_R8712U is not set CONFIG_R8188EU=m CONFIG_88EU_AP_MODE=y -CONFIG_RTS5208=m -CONFIG_VT6655=m -CONFIG_VT6656=m +# CONFIG_RTS5208 is not set +# CONFIG_VT6655 is not set +# CONFIG_VT6656 is not set # # IIO staging drivers @@ -7517,16 +6925,11 @@ CONFIG_VT6656=m # # Accelerometers # -# CONFIG_ADIS16203 is not set -# CONFIG_ADIS16240 is not set # end of Accelerometers # # Analog to digital converters # -# CONFIG_AD7816 is not set -# CONFIG_AD7192 is not set -# CONFIG_AD7280 is not set # end of Analog to digital converters # @@ -7545,8 +6948,6 @@ CONFIG_VT6656=m # # Direct Digital Synthesis # -# CONFIG_AD9832 is not set -# CONFIG_AD9834 is not set # end of Direct Digital Synthesis # @@ -7564,7 +6965,6 @@ CONFIG_VT6656=m # # Resolver to digital converters # -# CONFIG_AD2S1210 is not set # end of Resolver to digital converters # end of IIO staging drivers @@ -7573,46 +6973,24 @@ CONFIG_VT6656=m # # Speakup console speech # -CONFIG_SPEAKUP=m -CONFIG_SPEAKUP_SYNTH_ACNTSA=m -CONFIG_SPEAKUP_SYNTH_APOLLO=m -CONFIG_SPEAKUP_SYNTH_AUDPTR=m -CONFIG_SPEAKUP_SYNTH_BNS=m -CONFIG_SPEAKUP_SYNTH_DECTLK=m -CONFIG_SPEAKUP_SYNTH_DECEXT=m -CONFIG_SPEAKUP_SYNTH_LTLK=m -CONFIG_SPEAKUP_SYNTH_SOFT=m -CONFIG_SPEAKUP_SYNTH_SPKOUT=m -CONFIG_SPEAKUP_SYNTH_TXPRT=m -CONFIG_SPEAKUP_SYNTH_DUMMY=m +# CONFIG_SPEAKUP is not set # end of Speakup console speech -CONFIG_STAGING_MEDIA=y -CONFIG_I2C_BCM2048=m -CONFIG_VIDEO_IPU3_IMGU=m - -# -# soc_camera sensor drivers -# +# CONFIG_STAGING_MEDIA is not set # # Android # # end of Android -CONFIG_LTE_GDM724X=m -CONFIG_FIREWIRE_SERIAL=m -CONFIG_FWTTY_MAX_TOTAL_PORTS=64 -CONFIG_FWTTY_MAX_CARD_PORTS=32 +# CONFIG_LTE_GDM724X is not set +# CONFIG_FIREWIRE_SERIAL is not set # CONFIG_GS_FPGABOOT is not set # CONFIG_UNISYSSPAR is not set -# CONFIG_FB_TFT is not set # CONFIG_WILC1000_SDIO is not set -# CONFIG_WILC1000_SPI is not set # CONFIG_MOST is not set CONFIG_KS7010=m # CONFIG_GREYBUS is not set -# CONFIG_PI433 is not set # # Gasket devices @@ -7632,27 +7010,6 @@ CONFIG_EROFS_FS_IO_MAX_RETRIES=5 # CONFIG_EROFS_FS_ZIP is not set # CONFIG_FIELDBUS_DEV is not set # CONFIG_KPC2000 is not set - -# -# ISDN CAPI drivers -# -CONFIG_CAPI_AVM=y -CONFIG_ISDN_DRV_AVMB1_B1PCI=m -CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y -CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m -CONFIG_ISDN_DRV_AVMB1_AVM_CS=m -CONFIG_ISDN_DRV_AVMB1_T1PCI=m -CONFIG_ISDN_DRV_AVMB1_C4=m -CONFIG_ISDN_DRV_GIGASET=m -CONFIG_GIGASET_CAPI=y -CONFIG_GIGASET_BASE=m -CONFIG_GIGASET_M105=m -CONFIG_GIGASET_M101=m -# CONFIG_GIGASET_DEBUG is not set -CONFIG_HYSDN=m -CONFIG_HYSDN_CAPI=y -# end of ISDN CAPI drivers - CONFIG_X86_PLATFORM_DEVICES=y CONFIG_ACER_WMI=m CONFIG_ACER_WIRELESS=m @@ -7685,7 +7042,6 @@ CONFIG_COMPAL_LAPTOP=m CONFIG_SONY_LAPTOP=m CONFIG_SONYPI_COMPAT=y CONFIG_IDEAPAD_LAPTOP=m -CONFIG_SURFACE3_WMI=m CONFIG_THINKPAD_ACPI=m CONFIG_THINKPAD_ACPI_ALSA_SUPPORT=y # CONFIG_THINKPAD_ACPI_DEBUGFACILITIES is not set @@ -7707,17 +7063,16 @@ CONFIG_XIAOMI_WMI=m CONFIG_MSI_WMI=m CONFIG_PEAQ_WMI=m CONFIG_TOPSTAR_LAPTOP=m -CONFIG_ACPI_TOSHIBA=m +# CONFIG_ACPI_TOSHIBA is not set CONFIG_TOSHIBA_BT_RFKILL=m CONFIG_TOSHIBA_HAPS=m CONFIG_TOSHIBA_WMI=m CONFIG_ACPI_CMPC=m -CONFIG_INTEL_CHT_INT33FE=m CONFIG_INTEL_INT0002_VGPIO=m CONFIG_INTEL_HID_EVENT=m CONFIG_INTEL_VBTN=m CONFIG_INTEL_IPS=m -CONFIG_INTEL_PMC_CORE=y +CONFIG_INTEL_PMC_CORE=m CONFIG_IBM_RTL=m CONFIG_SAMSUNG_LAPTOP=m CONFIG_MXM_WMI=m @@ -7754,7 +7109,6 @@ CONFIG_CHROMEOS_PSTORE=m CONFIG_CHROMEOS_TBMC=m CONFIG_CROS_EC_I2C=m CONFIG_CROS_EC_ISHTP=m -CONFIG_CROS_EC_SPI=m CONFIG_CROS_EC_LPC=m CONFIG_CROS_EC_PROTO=y CONFIG_CROS_KBD_LED_BACKLIGHT=m @@ -7816,7 +7170,7 @@ CONFIG_IOMMU_SUPPORT=y # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set +CONFIG_IOMMU_DEFAULT_PASSTHROUGH=y CONFIG_AMD_IOMMU=y CONFIG_AMD_IOMMU_V2=m CONFIG_DMAR_TABLE=y @@ -7847,7 +7201,6 @@ CONFIG_SOUNDWIRE=y # # SoundWire Devices # -CONFIG_SOUNDWIRE_BUS=m CONFIG_SOUNDWIRE_CADENCE=m CONFIG_SOUNDWIRE_INTEL=m @@ -7881,13 +7234,6 @@ CONFIG_SOUNDWIRE_INTEL=m # end of i.MX SoC drivers # -# IXP4xx SoC drivers -# -# CONFIG_IXP4XX_QMGR is not set -CONFIG_IXP4XX_NPE=m -# end of IXP4xx SoC drivers - -# # Qualcomm SoC drivers # # end of Qualcomm SoC drivers @@ -7927,14 +7273,13 @@ CONFIG_EXTCON_AXP288=m CONFIG_EXTCON_FSA9480=m CONFIG_EXTCON_GPIO=m CONFIG_EXTCON_INTEL_INT3496=m -CONFIG_EXTCON_INTEL_CHT_WC=m CONFIG_EXTCON_MAX3355=m CONFIG_EXTCON_PTN5150=m # CONFIG_EXTCON_RT8973A is not set CONFIG_EXTCON_SM5502=m # CONFIG_EXTCON_USB_GPIO is not set CONFIG_EXTCON_USBC_CROS_EC=m -CONFIG_MEMORY=y +# CONFIG_MEMORY is not set CONFIG_IIO=m CONFIG_IIO_BUFFER=y CONFIG_IIO_BUFFER_CB=m @@ -7946,20 +7291,13 @@ CONFIG_IIO_TRIGGER=y CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 CONFIG_IIO_SW_DEVICE=m CONFIG_IIO_SW_TRIGGER=m -CONFIG_IIO_TRIGGERED_EVENT=m # # Accelerometers # -# CONFIG_ADIS16201 is not set -# CONFIG_ADIS16209 is not set -# CONFIG_ADXL372_SPI is not set # CONFIG_ADXL372_I2C is not set # CONFIG_BMA180 is not set -# CONFIG_BMA220 is not set -CONFIG_BMC150_ACCEL=m -CONFIG_BMC150_ACCEL_I2C=m -CONFIG_BMC150_ACCEL_SPI=m +# CONFIG_BMC150_ACCEL is not set # CONFIG_DA280 is not set # CONFIG_DA311 is not set # CONFIG_DMARD09 is not set @@ -7968,75 +7306,45 @@ CONFIG_HID_SENSOR_ACCEL_3D=m CONFIG_IIO_CROS_EC_ACCEL_LEGACY=m # CONFIG_IIO_ST_ACCEL_3AXIS is not set # CONFIG_KXSD9 is not set -CONFIG_KXCJK1013=m +# CONFIG_KXCJK1013 is not set # CONFIG_MC3230 is not set -CONFIG_MMA7455=m -CONFIG_MMA7455_I2C=m -CONFIG_MMA7455_SPI=m +# CONFIG_MMA7455_I2C is not set # CONFIG_MMA7660 is not set # CONFIG_MMA8452 is not set -CONFIG_MMA9551_CORE=m -CONFIG_MMA9551=m -CONFIG_MMA9553=m -CONFIG_MXC4005=m -CONFIG_MXC6255=m -# CONFIG_SCA3000 is not set -CONFIG_STK8312=m -CONFIG_STK8BA50=m +# CONFIG_MMA9551 is not set +# CONFIG_MMA9553 is not set +# CONFIG_MXC4005 is not set +# CONFIG_MXC6255 is not set +# CONFIG_STK8312 is not set +# CONFIG_STK8BA50 is not set # end of Accelerometers # # Analog to digital converters # -# CONFIG_AD7124 is not set -# CONFIG_AD7266 is not set # CONFIG_AD7291 is not set -# CONFIG_AD7298 is not set -# CONFIG_AD7476 is not set # CONFIG_AD7606_IFACE_PARALLEL is not set -# CONFIG_AD7606_IFACE_SPI is not set -# CONFIG_AD7766 is not set -# CONFIG_AD7768_1 is not set -# CONFIG_AD7780 is not set -# CONFIG_AD7791 is not set -# CONFIG_AD7793 is not set -# CONFIG_AD7887 is not set -# CONFIG_AD7923 is not set -# CONFIG_AD7949 is not set # CONFIG_AD799X is not set -CONFIG_AXP20X_ADC=m -CONFIG_AXP288_ADC=m +# CONFIG_AXP20X_ADC is not set +# CONFIG_AXP288_ADC is not set # CONFIG_CC10001_ADC is not set CONFIG_DLN2_ADC=m -CONFIG_HI8435=m # CONFIG_HX711 is not set # CONFIG_INA2XX_ADC is not set # CONFIG_LTC2471 is not set # CONFIG_LTC2485 is not set # CONFIG_LTC2497 is not set -# CONFIG_MAX1027 is not set -# CONFIG_MAX11100 is not set -# CONFIG_MAX1118 is not set # CONFIG_MAX1363 is not set # CONFIG_MAX9611 is not set -# CONFIG_MCP320X is not set # CONFIG_MCP3422 is not set -# CONFIG_MCP3911 is not set # CONFIG_NAU7802 is not set # CONFIG_QCOM_SPMI_IADC is not set # CONFIG_QCOM_SPMI_VADC is not set # CONFIG_QCOM_SPMI_ADC5 is not set # CONFIG_STX104 is not set # CONFIG_TI_ADC081C is not set -# CONFIG_TI_ADC0832 is not set -# CONFIG_TI_ADC084S021 is not set -# CONFIG_TI_ADC12138 is not set -# CONFIG_TI_ADC108S102 is not set -# CONFIG_TI_ADC128S052 is not set -# CONFIG_TI_ADC161S626 is not set # CONFIG_TI_ADS1015 is not set -# CONFIG_TI_ADS7950 is not set -# CONFIG_TI_TLC4541 is not set +# CONFIG_TI_AM335X_ADC is not set # CONFIG_VIPERBOARD_ADC is not set # CONFIG_XILINX_XADC is not set # end of Analog to digital converters @@ -8049,22 +7357,20 @@ CONFIG_HI8435=m # # Amplifiers # -# CONFIG_AD8366 is not set # end of Amplifiers # # Chemical Sensors # -CONFIG_ATLAS_PH_SENSOR=m +# CONFIG_ATLAS_PH_SENSOR is not set CONFIG_BME680=m CONFIG_BME680_I2C=m -CONFIG_BME680_SPI=m # CONFIG_CCS811 is not set -CONFIG_IAQCORE=m +# CONFIG_IAQCORE is not set # CONFIG_PMS7003 is not set # CONFIG_SENSIRION_SGP30 is not set # CONFIG_SPS30 is not set -CONFIG_VZ89X=m +# CONFIG_VZ89X is not set # end of Chemical Sensors # CONFIG_IIO_CROS_EC_SENSORS_CORE is not set @@ -8076,48 +7382,25 @@ CONFIG_HID_SENSOR_IIO_COMMON=m CONFIG_HID_SENSOR_IIO_TRIGGER=m # end of Hid Sensor IIO Common -CONFIG_IIO_MS_SENSORS_I2C=m - # # SSP Sensor Common # -# CONFIG_IIO_SSP_SENSORHUB is not set # end of SSP Sensor Common # # Digital to analog converters # # CONFIG_AD5064 is not set -# CONFIG_AD5360 is not set # CONFIG_AD5380 is not set -# CONFIG_AD5421 is not set # CONFIG_AD5446 is not set -# CONFIG_AD5449 is not set -# CONFIG_AD5592R is not set # CONFIG_AD5593R is not set -# CONFIG_AD5504 is not set -# CONFIG_AD5624R_SPI is not set -# CONFIG_LTC1660 is not set -# CONFIG_LTC2632 is not set -# CONFIG_AD5686_SPI is not set # CONFIG_AD5696_I2C is not set -# CONFIG_AD5755 is not set -# CONFIG_AD5758 is not set -CONFIG_AD5761=m -# CONFIG_AD5764 is not set -# CONFIG_AD5791 is not set -# CONFIG_AD7303 is not set # CONFIG_CIO_DAC is not set -# CONFIG_AD8801 is not set # CONFIG_DS4424 is not set # CONFIG_M62332 is not set # CONFIG_MAX517 is not set # CONFIG_MCP4725 is not set -# CONFIG_MCP4922 is not set -# CONFIG_TI_DAC082S085 is not set # CONFIG_TI_DAC5571 is not set -# CONFIG_TI_DAC7311 is not set -# CONFIG_TI_DAC7612 is not set # end of Digital to analog converters # @@ -8133,25 +7416,17 @@ CONFIG_AD5761=m # # Clock Generator/Distribution # -# CONFIG_AD9523 is not set # end of Clock Generator/Distribution # # Phase-Locked Loop (PLL) frequency synthesizers # -# CONFIG_ADF4350 is not set -# CONFIG_ADF4371 is not set # end of Phase-Locked Loop (PLL) frequency synthesizers # end of Frequency Synthesizers DDS/PLL # # Digital gyroscope sensors # -# CONFIG_ADIS16080 is not set -# CONFIG_ADIS16130 is not set -# CONFIG_ADIS16136 is not set -# CONFIG_ADIS16260 is not set -# CONFIG_ADXRS450 is not set # CONFIG_BMG160 is not set # CONFIG_FXAS21002C is not set CONFIG_HID_SENSOR_GYRO_3D=m @@ -8167,22 +7442,21 @@ CONFIG_HID_SENSOR_GYRO_3D=m # # Heart Rate Monitors # -# CONFIG_AFE4403 is not set # CONFIG_AFE4404 is not set -CONFIG_MAX30100=m -CONFIG_MAX30102=m +# CONFIG_MAX30100 is not set +# CONFIG_MAX30102 is not set # end of Heart Rate Monitors # end of Health Sensors # # Humidity sensors # -CONFIG_AM2315=m +# CONFIG_AM2315 is not set # CONFIG_DHT11 is not set -CONFIG_HDC100X=m +# CONFIG_HDC100X is not set CONFIG_HID_SENSOR_HUMIDITY=m # CONFIG_HTS221 is not set -CONFIG_HTU21=m +# CONFIG_HTU21 is not set # CONFIG_SI7005 is not set # CONFIG_SI7020 is not set # end of Humidity sensors @@ -8190,28 +7464,22 @@ CONFIG_HTU21=m # # Inertial measurement units # -# CONFIG_ADIS16400 is not set -# CONFIG_ADIS16480 is not set -CONFIG_BMI160=m -CONFIG_BMI160_I2C=m -CONFIG_BMI160_SPI=m -CONFIG_KMX61=m -CONFIG_INV_MPU6050_IIO=m -CONFIG_INV_MPU6050_I2C=m -# CONFIG_INV_MPU6050_SPI is not set +# CONFIG_BMI160_I2C is not set +# CONFIG_KMX61 is not set +# CONFIG_INV_MPU6050_I2C is not set # CONFIG_IIO_ST_LSM6DSX is not set # end of Inertial measurement units # # Light sensors # -CONFIG_ACPI_ALS=m +# CONFIG_ACPI_ALS is not set # CONFIG_ADJD_S311 is not set # CONFIG_AL3320A is not set # CONFIG_APDS9300 is not set -CONFIG_APDS9960=m +# CONFIG_APDS9960 is not set # CONFIG_BH1750 is not set -CONFIG_BH1780=m +# CONFIG_BH1780 is not set # CONFIG_CM32181 is not set # CONFIG_CM3232 is not set # CONFIG_CM3323 is not set @@ -8222,12 +7490,11 @@ CONFIG_BH1780=m # CONFIG_ISL29125 is not set CONFIG_HID_SENSOR_ALS=m CONFIG_HID_SENSOR_PROX=m -CONFIG_JSA1212=m -CONFIG_RPR0521=m -# CONFIG_SENSORS_LM3533 is not set +# CONFIG_JSA1212 is not set +# CONFIG_RPR0521 is not set # CONFIG_LTR501 is not set # CONFIG_LV0104CS is not set -CONFIG_MAX44000=m +# CONFIG_MAX44000 is not set CONFIG_MAX44009=m # CONFIG_OPT3001 is not set # CONFIG_PA12203001 is not set @@ -8241,11 +7508,11 @@ CONFIG_MAX44009=m # CONFIG_TSL2583 is not set # CONFIG_TSL2772 is not set # CONFIG_TSL4531 is not set -CONFIG_US5182D=m +# CONFIG_US5182D is not set # CONFIG_VCNL4000 is not set # CONFIG_VCNL4035 is not set -CONFIG_VEML6070=m -CONFIG_VL6180=m +# CONFIG_VEML6070 is not set +# CONFIG_VL6180 is not set # CONFIG_ZOPT2201 is not set # end of Light sensors @@ -8254,17 +7521,13 @@ CONFIG_VL6180=m # # CONFIG_AK8975 is not set # CONFIG_AK09911 is not set -CONFIG_BMC150_MAGN=m -CONFIG_BMC150_MAGN_I2C=m -CONFIG_BMC150_MAGN_SPI=m +# CONFIG_BMC150_MAGN_I2C is not set # CONFIG_MAG3110 is not set CONFIG_HID_SENSOR_MAGNETOMETER_3D=m # CONFIG_MMC35240 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set # CONFIG_SENSORS_HMC5843_I2C is not set -# CONFIG_SENSORS_HMC5843_SPI is not set # CONFIG_SENSORS_RM3100_I2C is not set -# CONFIG_SENSORS_RM3100_SPI is not set # end of Magnetometer sensors # @@ -8282,7 +7545,7 @@ CONFIG_HID_SENSOR_DEVICE_ROTATION=m # # Triggers - standalone # -CONFIG_IIO_HRTIMER_TRIGGER=m +# CONFIG_IIO_HRTIMER_TRIGGER is not set # CONFIG_IIO_INTERRUPT_TRIGGER is not set # CONFIG_IIO_TIGHTLOOP_TRIGGER is not set # CONFIG_IIO_SYSFS_TRIGGER is not set @@ -8292,14 +7555,10 @@ CONFIG_IIO_HRTIMER_TRIGGER=m # Digital potentiometers # CONFIG_AD5272=m -CONFIG_DS1803=m -# CONFIG_MAX5481 is not set -CONFIG_MAX5487=m +# CONFIG_DS1803 is not set CONFIG_MCP4018=m -CONFIG_MCP4131=m -CONFIG_MCP4531=m -CONFIG_MCP41010=m -CONFIG_TPL0102=m +# CONFIG_MCP4531 is not set +# CONFIG_TPL0102 is not set # end of Digital potentiometers # @@ -8315,33 +7574,31 @@ CONFIG_TPL0102=m # CONFIG_BMP280 is not set # CONFIG_DPS310 is not set CONFIG_HID_SENSOR_PRESS=m -CONFIG_HP03=m +# CONFIG_HP03 is not set # CONFIG_MPL115_I2C is not set -# CONFIG_MPL115_SPI is not set # CONFIG_MPL3115 is not set # CONFIG_MS5611 is not set -CONFIG_MS5637=m +# CONFIG_MS5637 is not set # CONFIG_IIO_ST_PRESS is not set # CONFIG_T5403 is not set -CONFIG_HP206C=m +# CONFIG_HP206C is not set # CONFIG_ZPA2326 is not set # end of Pressure sensors # # Lightning sensors # -# CONFIG_AS3935 is not set # end of Lightning sensors # # Proximity and distance sensors # CONFIG_ISL29501=m -CONFIG_LIDAR_LITE_V2=m +# CONFIG_LIDAR_LITE_V2 is not set # CONFIG_MB1232 is not set CONFIG_RFD77402=m -CONFIG_SRF04=m -CONFIG_SX9500=m +# CONFIG_SRF04 is not set +# CONFIG_SX9500 is not set # CONFIG_SRF08 is not set CONFIG_VL53L0X_I2C=m # end of Proximity and distance sensors @@ -8349,22 +7606,18 @@ CONFIG_VL53L0X_I2C=m # # Resolver to digital converters # -# CONFIG_AD2S90 is not set -# CONFIG_AD2S1200 is not set # end of Resolver to digital converters # # Temperature sensors # -# CONFIG_MAXIM_THERMOCOUPLE is not set CONFIG_HID_SENSOR_TEMP=m # CONFIG_MLX90614 is not set CONFIG_MLX90632=m # CONFIG_TMP006 is not set # CONFIG_TMP007 is not set -CONFIG_TSYS01=m -CONFIG_TSYS02D=m -CONFIG_MAX31856=m +# CONFIG_TSYS01 is not set +# CONFIG_TSYS02D is not set # end of Temperature sensors CONFIG_NTB=m @@ -8381,7 +7634,6 @@ CONFIG_NTB_TRANSPORT=m # CONFIG_VME_BUS is not set CONFIG_PWM=y CONFIG_PWM_SYSFS=y -CONFIG_PWM_CRC=y CONFIG_PWM_CROS_EC=m CONFIG_PWM_LP3943=m CONFIG_PWM_LPSS=m @@ -8492,10 +7744,7 @@ CONFIG_INTEL_TH_PTI=m CONFIG_FPGA=m CONFIG_ALTERA_PR_IP_CORE=m -CONFIG_FPGA_MGR_ALTERA_PS_SPI=m CONFIG_FPGA_MGR_ALTERA_CVP=m -CONFIG_FPGA_MGR_XILINX_SPI=m -CONFIG_FPGA_MGR_MACHXO2_SPI=m CONFIG_FPGA_BRIDGE=m CONFIG_ALTERA_FREEZE_BRIDGE=m CONFIG_XILINX_PR_DECOUPLER=m @@ -8523,25 +7772,21 @@ CONFIG_DCACHE_WORD_ACCESS=y CONFIG_FS_IOMAP=y # CONFIG_EXT2_FS is not set # CONFIG_EXT3_FS is not set -CONFIG_EXT4_FS=y +CONFIG_EXT4_FS=m CONFIG_EXT4_USE_FOR_EXT2=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y # CONFIG_EXT4_DEBUG is not set -CONFIG_JBD2=y +CONFIG_JBD2=m # CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y +CONFIG_FS_MBCACHE=m CONFIG_REISERFS_FS=m # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set CONFIG_REISERFS_FS_XATTR=y CONFIG_REISERFS_FS_POSIX_ACL=y CONFIG_REISERFS_FS_SECURITY=y -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -CONFIG_JFS_SECURITY=y -# CONFIG_JFS_DEBUG is not set -CONFIG_JFS_STATISTICS=y +# CONFIG_JFS_FS is not set CONFIG_XFS_FS=m CONFIG_XFS_QUOTA=y CONFIG_XFS_POSIX_ACL=y @@ -8555,7 +7800,7 @@ CONFIG_OCFS2_FS=m CONFIG_OCFS2_FS_O2CB=m CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m CONFIG_OCFS2_FS_STATS=y -# CONFIG_OCFS2_DEBUG_MASKLOG is not set +CONFIG_OCFS2_DEBUG_MASKLOG=y # CONFIG_OCFS2_DEBUG_FS is not set CONFIG_BTRFS_FS=m CONFIG_BTRFS_FS_POSIX_ACL=y @@ -8564,7 +7809,7 @@ CONFIG_BTRFS_FS_POSIX_ACL=y # CONFIG_BTRFS_DEBUG is not set CONFIG_BTRFS_ASSERT=y # CONFIG_BTRFS_FS_REF_VERIFY is not set -CONFIG_NILFS2_FS=m +# CONFIG_NILFS2_FS is not set # CONFIG_F2FS_FS is not set CONFIG_FS_DAX=y CONFIG_FS_DAX_PMD=y @@ -8588,7 +7833,7 @@ CONFIG_QFMT_V1=m CONFIG_QFMT_V2=m CONFIG_QUOTACTL=y CONFIG_QUOTACTL_COMPAT=y -CONFIG_AUTOFS4_FS=y +CONFIG_AUTOFS4_FS=m CONFIG_AUTOFS_FS=y CONFIG_FUSE_FS=m CONFIG_CUSE=m @@ -8659,43 +7904,17 @@ CONFIG_EFIVAR_FS=m CONFIG_MISC_FILESYSTEMS=y CONFIG_ORANGEFS_FS=m -CONFIG_ADFS_FS=m -CONFIG_ADFS_FS_RW=y -CONFIG_AFFS_FS=m +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set CONFIG_ECRYPT_FS=m CONFIG_ECRYPT_FS_MESSAGING=y # CONFIG_HFS_FS is not set CONFIG_HFSPLUS_FS=m -CONFIG_BEFS_FS=m -# CONFIG_BEFS_DEBUG is not set -CONFIG_BFS_FS=m -CONFIG_EFS_FS=m -CONFIG_JFFS2_FS=m -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -CONFIG_JFFS2_FS_XATTR=y -CONFIG_JFFS2_FS_POSIX_ACL=y -CONFIG_JFFS2_FS_SECURITY=y -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -CONFIG_UBIFS_FS=m -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UBIFS_FS_ZSTD=y -CONFIG_UBIFS_ATIME_SUPPORT=y -CONFIG_UBIFS_FS_XATTR=y -CONFIG_UBIFS_FS_SECURITY=y -CONFIG_UBIFS_FS_AUTHENTICATION=y +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_UBIFS_FS is not set CONFIG_CRAMFS=m CONFIG_CRAMFS_BLOCKDEV=y CONFIG_CRAMFS_MTD=y @@ -8714,19 +7933,13 @@ CONFIG_SQUASHFS_ZSTD=y # CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set # CONFIG_SQUASHFS_EMBEDDED is not set CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -CONFIG_VXFS_FS=m -CONFIG_MINIX_FS=m -CONFIG_OMFS_FS=m -CONFIG_HPFS_FS=m -CONFIG_QNX4FS_FS=m -CONFIG_QNX6FS_FS=m -# CONFIG_QNX6FS_DEBUG is not set -CONFIG_ROMFS_FS=m -# CONFIG_ROMFS_BACKED_BY_BLOCK is not set -# CONFIG_ROMFS_BACKED_BY_MTD is not set -CONFIG_ROMFS_BACKED_BY_BOTH=y -CONFIG_ROMFS_ON_BLOCK=y -CONFIG_ROMFS_ON_MTD=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_QNX6FS_FS is not set +# CONFIG_ROMFS_FS is not set CONFIG_PSTORE=y CONFIG_PSTORE_DEFLATE_COMPRESS=m CONFIG_PSTORE_LZO_COMPRESS=y @@ -8744,7 +7957,7 @@ CONFIG_PSTORE_COMPRESS_DEFAULT="deflate" # CONFIG_PSTORE_PMSG is not set # CONFIG_PSTORE_FTRACE is not set CONFIG_PSTORE_RAM=m -CONFIG_SYSV_FS=m +# CONFIG_SYSV_FS is not set CONFIG_UFS_FS=m CONFIG_UFS_FS_WRITE=y # CONFIG_UFS_DEBUG is not set @@ -8808,11 +8021,8 @@ CONFIG_CIFS_DEBUG=y CONFIG_CIFS_DFS_UPCALL=y # CONFIG_CIFS_SMB_DIRECT is not set CONFIG_CIFS_FSCACHE=y -CONFIG_CODA_FS=m -CONFIG_AFS_FS=m -# CONFIG_AFS_DEBUG is not set -CONFIG_AFS_FSCACHE=y -# CONFIG_AFS_DEBUG_CURSOR is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set CONFIG_9P_FS=m CONFIG_9P_FSCACHE=y CONFIG_9P_FS_POSIX_ACL=y @@ -8881,11 +8091,11 @@ CONFIG_KEYS=y CONFIG_KEYS_COMPAT=y CONFIG_KEYS_REQUEST_CACHE=y CONFIG_PERSISTENT_KEYRINGS=y -CONFIG_BIG_KEYS=y -CONFIG_TRUSTED_KEYS=m +# CONFIG_BIG_KEYS is not set +CONFIG_TRUSTED_KEYS=y CONFIG_ENCRYPTED_KEYS=y CONFIG_KEY_DH_OPERATIONS=y -# CONFIG_SECURITY_DMESG_RESTRICT is not set +CONFIG_SECURITY_DMESG_RESTRICT=y CONFIG_SECURITY=y CONFIG_SECURITY_WRITABLE_HOOKS=y CONFIG_SECURITYFS=y @@ -8897,9 +8107,7 @@ CONFIG_SECURITY_PATH=y CONFIG_INTEL_TXT=y CONFIG_LSM_MMAP_MIN_ADDR=0 CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y -CONFIG_HARDENED_USERCOPY=y -# CONFIG_HARDENED_USERCOPY_FALLBACK is not set -# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set +# CONFIG_HARDENED_USERCOPY is not set # CONFIG_FORTIFY_SOURCE is not set # CONFIG_STATIC_USERMODEHELPER is not set CONFIG_SECURITY_SELINUX=y @@ -8909,19 +8117,13 @@ CONFIG_SECURITY_SELINUX_DEVELOP=y CONFIG_SECURITY_SELINUX_AVC_STATS=y CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 # CONFIG_SECURITY_SMACK is not set -CONFIG_SECURITY_TOMOYO=y -CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048 -CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024 -# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set -CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init" -CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init" -# CONFIG_SECURITY_TOMOYO_INSECURE_BUILTIN_SETTING is not set +# CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y CONFIG_SECURITY_APPARMOR_HASH=y CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y # CONFIG_SECURITY_APPARMOR_DEBUG is not set # CONFIG_SECURITY_LOADPIN is not set -CONFIG_SECURITY_YAMA=y +# CONFIG_SECURITY_YAMA is not set # CONFIG_SECURITY_SAFESETID is not set CONFIG_INTEGRITY=y CONFIG_INTEGRITY_SIGNATURE=y @@ -8939,21 +8141,23 @@ CONFIG_IMA_NG_TEMPLATE=y CONFIG_IMA_DEFAULT_TEMPLATE="ima-ng" # CONFIG_IMA_DEFAULT_HASH_SHA1 is not set CONFIG_IMA_DEFAULT_HASH_SHA256=y +# CONFIG_IMA_DEFAULT_HASH_SHA512 is not set CONFIG_IMA_DEFAULT_HASH="sha256" # CONFIG_IMA_WRITE_POLICY is not set -CONFIG_IMA_READ_POLICY=y +# CONFIG_IMA_READ_POLICY is not set CONFIG_IMA_APPRAISE=y # CONFIG_IMA_ARCH_POLICY is not set # CONFIG_IMA_APPRAISE_BUILD_POLICY is not set CONFIG_IMA_APPRAISE_BOOTPARAM=y -# CONFIG_IMA_TRUSTED_KEYRING is not set -# CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY is not set +CONFIG_IMA_TRUSTED_KEYRING=y +CONFIG_IMA_KEYRINGS_PERMIT_SIGNED_BY_BUILTIN_OR_SECONDARY=y +# CONFIG_IMA_BLACKLIST_KEYRING is not set +# CONFIG_IMA_LOAD_X509 is not set CONFIG_EVM=y CONFIG_EVM_ATTR_FSUUID=y CONFIG_EVM_ADD_XATTRS=y # CONFIG_EVM_LOAD_X509 is not set # CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_TOMOYO is not set CONFIG_DEFAULT_SECURITY_APPARMOR=y # CONFIG_DEFAULT_SECURITY_DAC is not set CONFIG_LSM="integrity,apparmor" @@ -8984,6 +8188,7 @@ CONFIG_CRYPTO=y # # Crypto core or helper # +CONFIG_CRYPTO_FIPS=y CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_ALGAPI2=y CONFIG_CRYPTO_AEAD=y @@ -9003,8 +8208,9 @@ CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_USER=m -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -CONFIG_CRYPTO_GF128MUL=y +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set +# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set +CONFIG_CRYPTO_GF128MUL=m CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_PCRYPT=m @@ -9028,8 +8234,8 @@ CONFIG_CRYPTO_ECRDSA=m # Authenticated Encryption with Associated Data # CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_GCM=m +# CONFIG_CRYPTO_CHACHA20POLY1305 is not set CONFIG_CRYPTO_AEGIS128=m CONFIG_CRYPTO_AEGIS128L=m CONFIG_CRYPTO_AEGIS256=m @@ -9081,8 +8287,8 @@ CONFIG_CRYPTO_CRC32=m CONFIG_CRYPTO_CRC32_PCLMUL=m # CONFIG_CRYPTO_XXHASH is not set CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRCT10DIF_PCLMUL=m -CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_CRCT10DIF_PCLMUL=y +CONFIG_CRYPTO_GHASH=m CONFIG_CRYPTO_POLY1305=m CONFIG_CRYPTO_POLY1305_X86_64=m CONFIG_CRYPTO_MD4=m @@ -9097,7 +8303,7 @@ CONFIG_CRYPTO_SHA1_SSSE3=m CONFIG_CRYPTO_SHA256_SSSE3=m CONFIG_CRYPTO_SHA512_SSSE3=m CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_SHA3=m CONFIG_CRYPTO_SM3=m CONFIG_CRYPTO_STREEBOG=m @@ -9152,8 +8358,8 @@ CONFIG_CRYPTO_TWOFISH_AVX_X86_64=m # CONFIG_CRYPTO_DEFLATE=m CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_842=m -CONFIG_CRYPTO_LZ4=m +# CONFIG_CRYPTO_842 is not set +# CONFIG_CRYPTO_LZ4 is not set CONFIG_CRYPTO_LZ4HC=m CONFIG_CRYPTO_ZSTD=y @@ -9193,9 +8399,10 @@ CONFIG_CRYPTO_DEV_QAT_C62X=m CONFIG_CRYPTO_DEV_QAT_DH895xCCVF=m CONFIG_CRYPTO_DEV_QAT_C3XXXVF=m CONFIG_CRYPTO_DEV_QAT_C62XVF=m -# CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set +CONFIG_CRYPTO_DEV_NITROX=m +CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m CONFIG_CRYPTO_DEV_CHELSIO=m -# CONFIG_CHELSIO_IPSEC_INLINE is not set +CONFIG_CHELSIO_IPSEC_INLINE=y CONFIG_CRYPTO_DEV_CHELSIO_TLS=m CONFIG_CRYPTO_DEV_VIRTIO=m CONFIG_ASYMMETRIC_KEY_TYPE=y @@ -9227,7 +8434,7 @@ CONFIG_BINARY_PRINTF=y # CONFIG_RAID6_PQ=m CONFIG_RAID6_PQ_BENCHMARK=y -# CONFIG_PACKING is not set +CONFIG_PACKING=y CONFIG_BITREVERSE=y # CONFIG_HAVE_ARCH_BITREVERSE is not set CONFIG_GENERIC_STRNCPY_FROM_USER=y @@ -9241,7 +8448,7 @@ CONFIG_GENERIC_IOMAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_HAS_FAST_MULTIPLIER=y CONFIG_CRC_CCITT=y -CONFIG_CRC16=y +CONFIG_CRC16=m CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=m CONFIG_CRC32=y @@ -9258,15 +8465,12 @@ CONFIG_CRC8=m CONFIG_XXHASH=y # CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set # CONFIG_RANDOM32_SELFTEST is not set -CONFIG_842_COMPRESS=m -CONFIG_842_DECOMPRESS=m CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_LZ4_COMPRESS=m CONFIG_LZ4HC_COMPRESS=m -CONFIG_LZ4_DECOMPRESS=y +CONFIG_LZ4_DECOMPRESS=m CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y @@ -9283,7 +8487,6 @@ CONFIG_DECOMPRESS_BZIP2=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DECOMPRESS_XZ=y CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_LZ4=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_REED_SOLOMON=m CONFIG_REED_SOLOMON_ENC8=y @@ -9311,12 +8514,12 @@ CONFIG_SWIOTLB=y CONFIG_SGL_ALLOC=y CONFIG_IOMMU_HELPER=y CONFIG_CHECK_SIGNATURE=y +CONFIG_CPUMASK_OFFSTACK=y CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y # CONFIG_GLOB_SELFTEST is not set CONFIG_NLATTR=y -CONFIG_LRU_CACHE=m CONFIG_CLZ_TAB=y CONFIG_IRQ_POLL=y CONFIG_MPILIB=y @@ -9419,7 +8622,6 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y # CONFIG_DEBUG_VIRTUAL is not set CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m # CONFIG_DEBUG_PER_CPU_MAPS is not set CONFIG_HAVE_ARCH_KASAN=y CONFIG_CC_HAS_KASAN_GENERIC=y @@ -9454,7 +8656,7 @@ CONFIG_WQ_WATCHDOG=y # CONFIG_PANIC_ON_OOPS is not set CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=90 +CONFIG_PANIC_TIMEOUT=0 CONFIG_SCHED_DEBUG=y CONFIG_SCHED_INFO=y CONFIG_SCHEDSTATS=y @@ -9505,9 +8707,7 @@ CONFIG_RCU_TRACE=y # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -CONFIG_NOTIFIER_ERROR_INJECTION=m -CONFIG_PM_NOTIFIER_ERROR_INJECT=m -CONFIG_NETDEV_NOTIFIER_ERROR_INJECT=m +# CONFIG_NOTIFIER_ERROR_INJECTION is not set CONFIG_FUNCTION_ERROR_INJECTION=y CONFIG_FAULT_INJECTION=y # CONFIG_FAILSLAB is not set @@ -9570,7 +8770,7 @@ CONFIG_FTRACE_MCOUNT_RECORD=y CONFIG_TRACING_MAP=y CONFIG_HIST_TRIGGERS=y # CONFIG_TRACEPOINT_BENCHMARK is not set -CONFIG_RING_BUFFER_BENCHMARK=m +# CONFIG_RING_BUFFER_BENCHMARK is not set # CONFIG_RING_BUFFER_STARTUP_TEST is not set CONFIG_PREEMPTIRQ_DELAY_TEST=m # CONFIG_TRACE_EVAL_MAP_FILE is not set @@ -9581,12 +8781,12 @@ CONFIG_LKDTM=m # CONFIG_TEST_SORT is not set # CONFIG_KPROBES_SANITY_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set -CONFIG_RBTREE_TEST=m +# CONFIG_RBTREE_TEST is not set # CONFIG_REED_SOLOMON_TEST is not set -CONFIG_INTERVAL_TREE_TEST=m +# CONFIG_INTERVAL_TREE_TEST is not set # CONFIG_PERCPU_TEST is not set # CONFIG_ATOMIC64_SELFTEST is not set -CONFIG_ASYNC_RAID6_TEST=m +# CONFIG_ASYNC_RAID6_TEST is not set # CONFIG_TEST_HEXDUMP is not set # CONFIG_TEST_STRING_HELPERS is not set # CONFIG_TEST_STRSCPY is not set diff --git a/config/x86_64/rt_debug b/config/x86_64/rt_debug index 4cfdb8e..0683e8f 100644 --- a/config/x86_64/rt_debug +++ b/config/x86_64/rt_debug @@ -1,33 +1,30 @@ -CONFIG_AFS_DEBUG=y -CONFIG_AMD_IOMMU_DEBUGFS=y CONFIG_ATH5K_DEBUG=y CONFIG_B43LEGACY_DEBUG=y CONFIG_B43_DEBUG=y -CONFIG_BEFS_DEBUG=y -CONFIG_BFQ_CGROUP_DEBUG=y -CONFIG_BPF_KPROBE_OVERRIDE=y CONFIG_CACHEFILES_DEBUG=y CONFIG_CAN_DEBUG_DEVICES=y +CONFIG_CEPH_LIB_PRETTYDEBUG=y CONFIG_CIFS_DEBUG2=y -CONFIG_CRYPTO_STATS=y +CONFIG_DEBUG_ATOMIC_SLEEP=y CONFIG_DEBUG_GPIO=y CONFIG_DEBUG_MUTEXES=y CONFIG_DEBUG_RODATA_TEST=y -CONFIG_DEBUG_RSEQ=y CONFIG_DEBUG_RT_MUTEXES=y CONFIG_DEBUG_SHIRQ=y CONFIG_DEBUG_SPINLOCK=y CONFIG_DMATEST=m CONFIG_EDAC_DEBUG=y +CONFIG_FAILSLAB=y +CONFIG_FAIL_FUTEX=y +CONFIG_FAIL_IO_TIMEOUT=y +CONFIG_FAIL_MMC_REQUEST=y +CONFIG_FAIL_PAGE_ALLOC=y CONFIG_FSCACHE_DEBUG=y CONFIG_I2C_DEBUG_ALGO=y CONFIG_I2C_DEBUG_BUS=y CONFIG_I2C_DEBUG_CORE=y CONFIG_INFINIBAND_IPOIB_DEBUG_DATA=y -CONFIG_INTEL_IOMMU_DEBUGFS=y -CONFIG_IOMMU_DEBUGFS=y CONFIG_JBD2_DEBUG=y -CONFIG_JFS_DEBUG=y CONFIG_LOCALVERSION="-rt_debug" CONFIG_MAC80211_DEBUG_COUNTERS=y CONFIG_MAC80211_DEBUG_MENU=y @@ -49,13 +46,12 @@ CONFIG_MAC80211_VERBOSE_DEBUG=y CONFIG_MEMSTICK_DEBUG=y CONFIG_MMC_DEBUG=y # CONFIG_MODULE_SIG is not set -CONFIG_NVM_PBLK_DEBUG=y CONFIG_OCFS2_DEBUG_FS=y -CONFIG_OCFS2_DEBUG_MASKLOG=y # CONFIG_PARAVIRT_SPINLOCKS is not set CONFIG_PCIEASPM_DEBUG=y CONFIG_PCI_DEBUG=y -CONFIG_PRINTK_CALLER=y +CONFIG_PREEMPT_COUNT=y +CONFIG_REFCOUNT_FULL=y CONFIG_REISERFS_CHECK=y CONFIG_REISERFS_PROC_INFO=y CONFIG_RT2X00_DEBUG=y @@ -63,6 +59,7 @@ CONFIG_RT2X00_LIB_DEBUGFS=y CONFIG_RTC_DRV_TEST=m CONFIG_SND_DEBUG_VERBOSE=y # CONFIG_SUSE_KERNEL_SUPPORTED is not set +CONFIG_TCM_QLA2XXX_DEBUG=y CONFIG_THINKPAD_ACPI_DEBUG=y CONFIG_THINKPAD_ACPI_DEBUGFACILITIES=y CONFIG_TTY_PRINTK=y @@ -70,11 +67,7 @@ CONFIG_TTY_PRINTK_LEVEL=6 CONFIG_UFS_DEBUG=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_USB_STORAGE_DEBUG=y -CONFIG_USB_WUSB_CBAF_DEBUG=y -CONFIG_VIDEO_PVRUSB2_DEBUGIFC=y -CONFIG_X86_CPA_STATISTICS=y CONFIG_XFS_ASSERT_FATAL=y CONFIG_XFS_DEBUG=y -CONFIG_ZRAM_MEMORY_TRACKING=y CONFIG_MODULES=y CONFIG_EFI_STUB=y diff --git a/patches.rpmify/Workaround-gcc-regression-on-ppc64.patch b/patches.rpmify/Workaround-gcc-regression-on-ppc64.patch deleted file mode 100644 index b377376..0000000 --- a/patches.rpmify/Workaround-gcc-regression-on-ppc64.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 4dd8d3e0cc8c64d4f87e20c091bd98e9f168a7e8 Mon Sep 17 00:00:00 2001 -From: Michal Suchanek -Date: Tue, 23 Jul 2019 15:13:57 +0200 -Subject: [PATCH] Workaround gcc regression on ppc64. - -References: bko#204125 -Patch-mainline: no, other fix expected. - -__linux__ is no longer defined on ppc64 with ABI v1. - -Signed-off-by: Michal Suchanek ---- - arch/powerpc/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile -index f859a37199dc..ce4829a3904b 100644 ---- a/arch/powerpc/Makefile -+++ b/arch/powerpc/Makefile -@@ -211,7 +211,7 @@ endif - - asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1) - --KBUILD_CPPFLAGS += -I $(srctree)/arch/$(ARCH) $(asinstr) -+KBUILD_CPPFLAGS += -I $(srctree)/arch/$(ARCH) $(asinstr) -D__linux__ - KBUILD_AFLAGS += $(AFLAGS-y) - KBUILD_CFLAGS += $(call cc-option,-msoft-float) - KBUILD_CFLAGS += -pipe $(CFLAGS-y) --- -2.22.0 - diff --git a/patches.suse/0001-Add-a-void-suse_kabi_padding-placeholder-to-some-USB.patch b/patches.suse/0001-Add-a-void-suse_kabi_padding-placeholder-to-some-USB.patch new file mode 100644 index 0000000..5135d4f --- /dev/null +++ b/patches.suse/0001-Add-a-void-suse_kabi_padding-placeholder-to-some-USB.patch @@ -0,0 +1,24 @@ +From c5578bea3e0ffae60f02b540f79efc7af4527bea Mon Sep 17 00:00:00 2001 +From: Oliver Neukum +Date: Thu, 3 Jul 2014 14:29:25 +0200 +Subject: [PATCH 1/2] Add a void* suse_kabi_padding placeholder to some USB + structures +Patch-mainline: Never, kabi +References: fate#312013 + +Signed-off-by: Oliver Neukum +--- + include/linux/usb/hcd.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/include/linux/usb/hcd.h ++++ b/include/linux/usb/hcd.h +@@ -544,6 +544,8 @@ struct usb_tt { + spinlock_t lock; + struct list_head clear_list; /* of usb_tt_clear */ + struct work_struct clear_work; ++ ++ void *suse_kabi_padding; + }; + + struct usb_tt_clear { diff --git a/patches.suse/0001-KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch b/patches.suse/0001-KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch new file mode 100644 index 0000000..613cebb --- /dev/null +++ b/patches.suse/0001-KEYS-Allow-unrestricted-boot-time-addition-of-keys-t.patch @@ -0,0 +1,93 @@ +From 2d13b4094bb5a6d588ba1b155abc96ee094b7af8 Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Thu, 3 Aug 2017 16:17:45 +0100 +Subject: [PATCH 1/6] KEYS: Allow unrestricted boot-time addition of keys to + secondary keyring + +Patch-mainline: Queued in subsystem maintainer repository +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git +Git-commit: 2d13b4094bb5a6d588ba1b155abc96ee094b7af8 +References: fate#314508 + +Allow keys to be added to the system secondary certificates keyring during +kernel initialisation in an unrestricted fashion. Such keys are implicitly +trusted and don't have their trust chains checked on link. + +This allows keys in the UEFI database to be added in secure boot mode for +the purposes of module signing. + +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + certs/internal.h | 18 ++++++++++++++++++ + certs/system_keyring.c | 33 +++++++++++++++++++++++++++++++++ + 2 files changed, 51 insertions(+) + create mode 100644 certs/internal.h + +--- /dev/null ++++ b/certs/internal.h +@@ -0,0 +1,18 @@ ++/* Internal definitions ++ * ++ * Copyright (C) 2016 Red Hat, Inc. All Rights Reserved. ++ * Written by David Howells (dhowells@redhat.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++/* ++ * system_keyring.c ++ */ ++#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING ++extern void __init add_trusted_secondary_key(const char *source, ++ const void *data, size_t len); ++#endif +--- a/certs/system_keyring.c ++++ b/certs/system_keyring.c +@@ -18,6 +18,7 @@ + #include + #include + #include ++#include "internal.h" + + static struct key *builtin_trusted_keys; + #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING +@@ -265,3 +266,35 @@ error: + EXPORT_SYMBOL_GPL(verify_pkcs7_signature); + + #endif /* CONFIG_SYSTEM_DATA_VERIFICATION */ ++ ++#ifdef CONFIG_SECONDARY_TRUSTED_KEYRING ++/** ++ * add_trusted_secondary_key - Add to secondary keyring with no validation ++ * @source: Source of key ++ * @data: The blob holding the key ++ * @len: The length of the data blob ++ * ++ * Add a key to the secondary keyring without checking its trust chain. This ++ * is available only during kernel initialisation. ++ */ ++void __init add_trusted_secondary_key(const char *source, ++ const void *data, size_t len) ++{ ++ key_ref_t key; ++ ++ key = key_create_or_update(make_key_ref(secondary_trusted_keys, 1), ++ "asymmetric", ++ NULL, data, len, ++ (KEY_POS_ALL & ~KEY_POS_SETATTR) | ++ KEY_USR_VIEW, ++ KEY_ALLOC_NOT_IN_QUOTA | ++ KEY_ALLOC_BYPASS_RESTRICTION); ++ ++ if (IS_ERR(key)) ++ pr_err("Problem loading %s X.509 certificate (%ld)\n", ++ source, PTR_ERR(key)); ++ else ++ pr_notice("Loaded %s cert '%s' linked to secondary sys keyring\n", ++ source, key_ref_to_ptr(key)->description); ++} ++#endif /* CONFIG_SECONDARY_TRUSTED_KEYRING */ diff --git a/patches.suse/0001-MODSIGN-do-not-load-mok-when-secure-boot-disabled.patch b/patches.suse/0001-MODSIGN-do-not-load-mok-when-secure-boot-disabled.patch new file mode 100644 index 0000000..d809b14 --- /dev/null +++ b/patches.suse/0001-MODSIGN-do-not-load-mok-when-secure-boot-disabled.patch @@ -0,0 +1,65 @@ +From c502f172bc8153891213e492382fb5844e9cb0aa Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Wed, 29 Nov 2017 15:45:25 +0800 +Subject: [PATCH 1/4] MODSIGN: do not load mok when secure boot disabled +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/10082305/ +References: fate#316531, bnc#854875 + +The mok can not be trusted when the secure boot is disabled. Which +means that the kernel embedded certificate is the only trusted key. + +Due to db/dbx are authenticated variables, they needs manufacturer's +KEK for update. So db/dbx are secure when secureboot disabled. + +Signed-off-by: Lee, Chun-Yi +--- + certs/load_uefi.c | 26 +++++++++++++++----------- + 1 file changed, 15 insertions(+), 11 deletions(-) + +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index 3d88459..d6de4d0 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -164,17 +164,6 @@ static int __init load_uefi_certs(void) + } + } + +- mok = get_cert_list(L"MokListRT", &mok_var, &moksize); +- if (!mok) { +- pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); +- } else { +- rc = parse_efi_signature_list("UEFI:MokListRT", +- mok, moksize, get_handler_for_db); +- if (rc) +- pr_err("Couldn't parse MokListRT signatures: %d\n", rc); +- kfree(mok); +- } +- + dbx = get_cert_list(L"dbx", &secure_var, &dbxsize); + if (!dbx) { + pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); +@@ -187,6 +176,21 @@ static int __init load_uefi_certs(void) + kfree(dbx); + } + ++ /* the MOK can not be trusted when secure boot is disabled */ ++ if (!efi_enabled(EFI_SECURE_BOOT)) ++ return 0; ++ ++ mok = get_cert_list(L"MokListRT", &mok_var, &moksize); ++ if (!mok) { ++ pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); ++ } else { ++ rc = parse_efi_signature_list("UEFI:MokListRT", ++ mok, moksize, get_handler_for_db); ++ if (rc) ++ pr_err("Couldn't parse MokListRT signatures: %d\n", rc); ++ kfree(mok); ++ } ++ + return rc; + } + late_initcall(load_uefi_certs); +-- +2.10.2 + diff --git a/patches.suse/0001-NFS-flush-out-dirty-data-on-file-fput.patch b/patches.suse/0001-NFS-flush-out-dirty-data-on-file-fput.patch new file mode 100644 index 0000000..3d1d26a --- /dev/null +++ b/patches.suse/0001-NFS-flush-out-dirty-data-on-file-fput.patch @@ -0,0 +1,57 @@ +From: NeilBrown +Date: Fri, 10 Mar 2017 08:19:32 +1100 +Subject: [PATCH] NFS: flush out dirty data on file fput(). +Patch-mainline: Not yet, maintainer doesn't believe it is a problem +URL: https://www.spinics.net/lists/linux-nfs/msg62622.html +References: bsc#1021762 + +Any dirty NFS page holds an s_active reference on the superblock, +because page_private() references an nfs_page, which references an +open context, which references the superblock. + +So if there are any dirty pages when the filesystem is unmounted, the +unmount will act like a "lazy" unmount and not call ->kill_sb(). +Background write-back can then write out the pages *after* the filesystem +unmount has apparently completed. + +This contrasts with other filesystems which do not hold extra s_active +references, so ->kill_sb() is reliably called on unmount, and +generic_shutdown_super() will call sync_filesystem() to flush +everything out before the unmount completes. + +When open/write/close is used to modify files, the final close causes +f_op->flush to be called, which flushes all dirty pages. However if +open/mmap/close/modify-memory/unmap is used, dirty pages can remain in +memory after the application has dropped all references to the file. + +Fix this by calling vfs_fsync() in nfs_file_release (aka +f_op->release()). This means that on the final unmap of a file, all +changes are flushed, and ensures that when unmount is requested there +will be no dirty pages to delay the final unmount. + +Without this patch, it is not safe to stop or disconnect the NFS +server after all clients have unmounted. They need to unmount and +call "sync". + +Signed-off-by: NeilBrown +Acked-by: NeilBrown + +--- + fs/nfs/file.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/fs/nfs/file.c ++++ b/fs/nfs/file.c +@@ -82,6 +82,12 @@ nfs_file_release(struct inode *inode, st + { + dprintk("NFS: release(%pD2)\n", filp); + ++ if (filp->f_mode & FMODE_WRITE) ++ /* Ensure dirty mmapped pages are flushed ++ * so there will be no dirty pages to ++ * prevent an unmount from completing. ++ */ ++ vfs_fsync(filp, 0); + nfs_inc_stats(inode, NFSIOS_VFSRELEASE); + nfs_file_clear_open_context(filp); + return 0; diff --git a/patches.suse/0001-NFSv4-don-t-let-hanging-mounts-block-other-mounts.patch b/patches.suse/0001-NFSv4-don-t-let-hanging-mounts-block-other-mounts.patch new file mode 100644 index 0000000..fd7f1e4 --- /dev/null +++ b/patches.suse/0001-NFSv4-don-t-let-hanging-mounts-block-other-mounts.patch @@ -0,0 +1,48 @@ +From: NeilBrown +Date: Wed, 24 May 2017 09:04:39 +1000 +Subject: [PATCH] NFSv4: don't let hanging mounts block other mounts +Patch-mainline: submitted, linux-nfs Wed, 24 May 2017 09:27:55 +1000 +References: bsc#1040364 + +If you try an NFSv4 mount from an inaccessible server, it will hang as +you would expect. +If you then try an NFSv4 mount from a different accessible server, +it will also hang. This is not expected. + +The second mount is blocked in + nfs4_init_client() + -> nfs4_discover_server_trunking() + -> nfs40_discover_server_trunking() + -> nfs40_walk_client_list() + -> nfs4_match_client() + -> nfs_wait_client_init_complete() +It is waiting for the first mount to complete so that it can then +see if the two servers are really one and the same. + +It is not necessary to wait here when an nfs_client cl_cons_state is +NFS_CS_INITING. Such a client will, after changing cl_cons_state, call +nfs4_discover_server_trunking() itself. So if the current client just +skips those clients, trunking will still be discovered if necessary. + +I am unsure of situation with NFS_CS_SESSION_INITING, but I suspect +that the comment "Wait for CREATE_SESSION to finish" implies that +it is only clients in NFS_CS_SESSION_INITING that need to be waited for. + +Signed-off-by: NeilBrown +Acked-by: NeilBrown + +--- + fs/nfs/nfs4client.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/nfs/nfs4client.c ++++ b/fs/nfs/nfs4client.c +@@ -505,7 +505,7 @@ static int nfs4_match_client(struct nfs_ + * remaining fields in "pos", especially the client + * ID and serverowner fields. Wait for CREATE_SESSION + * to finish. */ +- if (pos->cl_cons_state > NFS_CS_READY) { ++ if (pos->cl_cons_state == NFS_CS_SESSION_INITING) { + refcount_inc(&pos->cl_count); + spin_unlock(&nn->nfs_client_lock); + diff --git a/patches.suse/0001-PCI-Vulcan-AHCI-PCI-bar-fix-for-Broadcom-Vulcan-earl.patch b/patches.suse/0001-PCI-Vulcan-AHCI-PCI-bar-fix-for-Broadcom-Vulcan-earl.patch new file mode 100644 index 0000000..dff8cdc --- /dev/null +++ b/patches.suse/0001-PCI-Vulcan-AHCI-PCI-bar-fix-for-Broadcom-Vulcan-earl.patch @@ -0,0 +1,63 @@ +From 6c9051d7f656da62a4ba838e0d3b326aa3e44f3f Mon Sep 17 00:00:00 2001 +From: Ashok Kumar Sekar +Date: Fri, 23 Sep 2016 04:16:19 -0700 +Subject: [PATCH] PCI: Vulcan: AHCI PCI bar fix for Broadcom Vulcan early + silicon + +Patch-Mainline: Never, For early silicon (evaluation systems) only. + Has no effect on B0 silicon. +References: fate#322326 + +PCI BAR 5 is not setup correctly for the on-board AHCI +controller on Broadcom's Vulcan processor. Added a quirk to fix BAR 5 +by using BAR 4's resources which are populated correctly but NOT used +by the AHCI controller actually. + +Signed-off-by: Ashok Kumar Sekar +Signed-off-by: Jayachandran C +Signed-off-by: Robert Richter +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/quirks.c | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c +index cf782a814fb9..0d46fdf5d2d3 100644 +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -3962,6 +3962,32 @@ static void quirk_mic_x200_dma_alias(struct pci_dev *pdev) + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2260, quirk_mic_x200_dma_alias); + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2264, quirk_mic_x200_dma_alias); + ++#if IS_ENABLED(CONFIG_ARM64) ++/* ++ * PCI BAR 5 is not setup correctly for the on-board AHCI controller ++ * on Broadcom's Vulcan processor. Added a quirk to fix BAR 5 by ++ * using BAR 4's resources which are populated correctly and NOT ++ * actually used by the AHCI controller. ++ */ ++static void quirk_fix_vulcan_ahci_bars(struct pci_dev *dev) ++{ ++ struct resource *r = &dev->resource[4]; ++ ++ if (!(r->flags & IORESOURCE_MEM) || (r->start == 0)) ++ return; ++ ++ /* Set BAR5 resource to BAR4 */ ++ dev->resource[5] = *r; ++ ++ /* Update BAR5 in pci config space */ ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_5, r->start); ++ ++ /* Clear BAR4's resource */ ++ memset(r, 0, sizeof(*r)); ++} ++DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9027, quirk_fix_vulcan_ahci_bars); ++#endif ++ + /* + * The IOMMU and interrupt controller on Broadcom Vulcan/Cavium ThunderX2 are + * associated not at the root bus, but at a bridge below. This quirk avoids +-- +2.11.0 + diff --git a/patches.suse/0001-Reserve-64MiB-of-CMA-for-RPi3-s-VC4.patch b/patches.suse/0001-Reserve-64MiB-of-CMA-for-RPi3-s-VC4.patch new file mode 100644 index 0000000..e590a39 --- /dev/null +++ b/patches.suse/0001-Reserve-64MiB-of-CMA-for-RPi3-s-VC4.patch @@ -0,0 +1,39 @@ +From 3091ffb7c5d3d3cc7b68b82ce78078f3937603d8 Mon Sep 17 00:00:00 2001 +From: Thomas Zimmermann +Date: Fri, 15 Feb 2019 10:15:20 +0100 +Subject: Reserve 64MiB of CMA for RPi3's VC4 +Patch-mainline: Never, requried for SUSE installer on RPI3 +References: bsc#1123536 + +Signed-off-by: Thomas Zimmermann +Acked-by: Thomas Zimmermann +--- + kernel/dma/contiguous.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/kernel/dma/contiguous.c ++++ b/kernel/dma/contiguous.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + + #ifdef CONFIG_CMA_SIZE_MBYTES + #define CMA_SIZE_MBYTES CONFIG_CMA_SIZE_MBYTES +@@ -113,6 +114,15 @@ void __init dma_contiguous_reserve(phys_ + + pr_debug("%s(limit %08lx)\n", __func__, (unsigned long)limit); + ++#ifdef CONFIG_OF_EARLY_FLATTREE ++ if (size_cmdline == -1) { ++ /* bsc#1123536: Reserve 64 MiB of CMA for RPi3's VC4. */ ++ static const char model_name[] = "Raspberry Pi 3"; ++ const char* model = of_flat_dt_get_machine_name(); ++ if (model && !strncmp(model, model_name, strlen(model_name))) ++ size_cmdline = 64 << 20; ++ } ++#endif + if (size_cmdline != -1) { + selected_size = size_cmdline; + selected_base = base_cmdline; diff --git a/patches.suse/0001-Thunderbolt-kABI-paddings-added.patch b/patches.suse/0001-Thunderbolt-kABI-paddings-added.patch new file mode 100644 index 0000000..fa0dda2 --- /dev/null +++ b/patches.suse/0001-Thunderbolt-kABI-paddings-added.patch @@ -0,0 +1,56 @@ +From a0eb859d0ac42beb4120b306119d1f6955b528aa Mon Sep 17 00:00:00 2001 +From: Oliver Neukum +Date: Thu, 15 Mar 2018 20:49:17 +0100 +Subject: [PATCH] Thunderbolt: kABI paddings added +Patch-mainline: Never (SUSE kABI padding) +References: bsc#1070681 + +just in case + +Signed-off-by: Oliver Neukum +--- + include/linux/thunderbolt.h | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/include/linux/thunderbolt.h ++++ b/include/linux/thunderbolt.h +@@ -82,6 +82,7 @@ struct tb { + int index; + enum tb_security_level security_level; + size_t nboot_acl; ++ void *suse_kabi_padding; + unsigned long privdata[0]; + }; + +@@ -106,6 +107,7 @@ static inline unsigned int tb_phy_port_f + struct tb_property_dir { + const uuid_t *uuid; + struct list_head properties; ++ void *suse_kabi_padding; + }; + + enum tb_property_type { +@@ -139,6 +141,7 @@ struct tb_property { + char *text; + u32 immediate; + } value; ++ void *suse_kabi_padding; + }; + + struct tb_property_dir *tb_property_parse_dir(const u32 *block, +@@ -443,6 +446,7 @@ struct tb_nhi { + bool going_away; + struct work_struct interrupt_work; + u32 hop_count; ++ void *suse_kabi_padding; + }; + + /** +@@ -490,6 +494,7 @@ struct tb_ring { + u16 eof_mask; + void (*start_poll)(void *data); + void *poll_data; ++ void *suse_kabi_padding; + }; + + /* Leave ring interrupt enabled on suspend */ diff --git a/patches.suse/0001-ahci-thunderx2-stop-engine-fix-update.patch b/patches.suse/0001-ahci-thunderx2-stop-engine-fix-update.patch new file mode 100644 index 0000000..509c280 --- /dev/null +++ b/patches.suse/0001-ahci-thunderx2-stop-engine-fix-update.patch @@ -0,0 +1,40 @@ +From a5d5ea95614206f41687d4580e7ab68958d91093 Mon Sep 17 00:00:00 2001 +From: Jayachandran C +Date: Fri, 16 Jun 2017 13:22:50 +0000 +Subject: [PATCH] ahci: thunderx2: stop engine fix update + +Patch-mainline: Never, Early silicon errata +References: bsc#1045590 + +The stop engine errata fix currently checks only for the CN99XX Ax MIDR, so +the changes are applied even to external SATA controllers connected to the +CN99XX board. + +Fix the errata check to include PCI ID so that the fix is applied only +to the onboard SATA. + +Signed-off-by: Jayachandran C +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/ata/libahci.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c +index fe4aa8b87504..2d052078f7b7 100644 +--- a/drivers/ata/libahci.c ++++ b/drivers/ata/libahci.c +@@ -666,7 +666,10 @@ int ahci_stop_engine(struct ata_port *ap) + + #ifdef CONFIG_ARM64 + /* Rev Ax of Cavium CN99XX needs a hack for port stop */ +- if (MIDR_IS_CPU_MODEL_RANGE(read_cpuid_id(), ++ if (dev_is_pci(ap->host->dev) && ++ to_pci_dev(ap->host->dev)->vendor == 0x14e4 && ++ to_pci_dev(ap->host->dev)->device == 0x9027 && ++ MIDR_IS_CPU_MODEL_RANGE(read_cpuid_id(), + MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN), + MIDR_CPU_VAR_REV(0, 0), + MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) { +-- +2.11.0 + diff --git a/patches.suse/0001-ahci-thunderx2-update-stop-engine-errata-delay-value.patch b/patches.suse/0001-ahci-thunderx2-update-stop-engine-errata-delay-value.patch new file mode 100644 index 0000000..a38d79d --- /dev/null +++ b/patches.suse/0001-ahci-thunderx2-update-stop-engine-errata-delay-value.patch @@ -0,0 +1,35 @@ +From cb74ddb0fcc21052d9d8dd282f3e6f2b872e0ae7 Mon Sep 17 00:00:00 2001 +From: Mian Yousaf Kaukab +Date: Wed, 7 Mar 2018 16:09:01 +0100 +Subject: [PATCH 01/20] ahci: thunderx2: update stop engine errata delay values + +Patch-mainline: Never, Early silicon errata +References: bsc#1084308 + +Signed-off-by: Robert Richter +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/ata/libahci.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c +index fa9259f8e835..f054d0208030 100644 +--- a/drivers/ata/libahci.c ++++ b/drivers/ata/libahci.c +@@ -674,10 +674,11 @@ int ahci_stop_engine(struct ata_port *ap) + MIDR_CPU_VAR_REV(0, 0), + MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) { + tmp = readl(hpriv->mmio + 0x8000); ++ udelay(100); + writel(tmp | (1 << 26), hpriv->mmio + 0x8000); +- udelay(1); ++ udelay(100); + writel(tmp & ~(1 << 26), hpriv->mmio + 0x8000); +- dev_warn(ap->host->dev, "CN99XX stop engine fix applied!\n"); ++ dev_warn(ap->host->dev, "CN99XX SATA reset workaround applied\n"); + } + #endif + +-- +2.11.0 + diff --git a/patches.suse/0001-apparmor-patch-to-provide-compatibility-with-v2.x-ne.patch b/patches.suse/0001-apparmor-patch-to-provide-compatibility-with-v2.x-ne.patch new file mode 100644 index 0000000..a2b2146 --- /dev/null +++ b/patches.suse/0001-apparmor-patch-to-provide-compatibility-with-v2.x-ne.patch @@ -0,0 +1,234 @@ +From 02e2bc1b330f7e15dba671547a256a6f900f6e5d Mon Sep 17 00:00:00 2001 +From: John Johansen +Date: Sun, 17 Jun 2018 03:56:25 -0700 +Subject: [PATCH 1/3] apparmor: patch to provide compatibility with v2.x net rules +References: bsc#1112770 +Patch-mainline: never, compatibility with apparmor 2.x + +The networking rules upstreamed in 4.17 have a deliberate abi break +with the older 2.x network rules. + +This patch provides compatibility with the older rules for those +still using an apparmor 2.x userspace and still want network rules +to work on a newer kernel. + +Signed-off-by: John Johansen +Acked-by: Goldwyn Rodrigues +--- + security/apparmor/apparmorfs.c | 1 + security/apparmor/include/apparmor.h | 2 - + security/apparmor/include/net.h | 11 +++++++ + security/apparmor/include/policy.h | 2 + + security/apparmor/net.c | 31 +++++++++++++++----- + security/apparmor/policy.c | 1 + security/apparmor/policy_unpack.c | 54 +++++++++++++++++++++++++++++++++-- + 7 files changed, 92 insertions(+), 10 deletions(-) + +--- a/security/apparmor/apparmorfs.c ++++ b/security/apparmor/apparmorfs.c +@@ -2265,6 +2265,7 @@ static struct aa_sfs_entry aa_sfs_entry_ + AA_SFS_DIR("domain", aa_sfs_entry_domain), + AA_SFS_DIR("file", aa_sfs_entry_file), + AA_SFS_DIR("network_v8", aa_sfs_entry_network), ++ AA_SFS_DIR("network", aa_sfs_entry_network_compat), + AA_SFS_DIR("mount", aa_sfs_entry_mount), + AA_SFS_DIR("namespaces", aa_sfs_entry_ns), + AA_SFS_FILE_U64("capability", VFS_CAP_FLAGS_MASK), +--- a/security/apparmor/include/apparmor.h ++++ b/security/apparmor/include/apparmor.h +@@ -24,7 +24,7 @@ + #define AA_CLASS_UNKNOWN 1 + #define AA_CLASS_FILE 2 + #define AA_CLASS_CAP 3 +-#define AA_CLASS_DEPRECATED 4 ++#define AA_CLASS_NET_COMPAT 4 + #define AA_CLASS_RLIMITS 5 + #define AA_CLASS_DOMAIN 6 + #define AA_CLASS_MOUNT 7 +--- a/security/apparmor/include/net.h ++++ b/security/apparmor/include/net.h +@@ -72,6 +72,16 @@ struct aa_sk_ctx { + DEFINE_AUDIT_NET(NAME, OP, SK, (SK)->sk_family, (SK)->sk_type, \ + (SK)->sk_protocol) + ++/* struct aa_net - network confinement data ++ * @allow: basic network families permissions ++ * @audit: which network permissions to force audit ++ * @quiet: which network permissions to quiet rejects ++ */ ++struct aa_net_compat { ++ u16 allow[AF_MAX]; ++ u16 audit[AF_MAX]; ++ u16 quiet[AF_MAX]; ++}; + + #define af_select(FAMILY, FN, DEF_FN) \ + ({ \ +@@ -84,6 +94,7 @@ struct aa_sk_ctx { + }) + + extern struct aa_sfs_entry aa_sfs_entry_network[]; ++extern struct aa_sfs_entry aa_sfs_entry_network_compat[]; + + void audit_net_cb(struct audit_buffer *ab, void *va); + int aa_profile_af_perm(struct aa_profile *profile, struct common_audit_data *sa, +--- a/security/apparmor/include/policy.h ++++ b/security/apparmor/include/policy.h +@@ -112,6 +112,7 @@ struct aa_data { + * @policy: general match rules governing policy + * @file: The set of rules governing basic file access and domain transitions + * @caps: capabilities for the profile ++ * @net_compat: v2 compat network controls for the profile + * @rlimits: rlimits for the profile + * + * @dents: dentries for the profiles file entries in apparmorfs +@@ -149,6 +150,7 @@ struct aa_profile { + struct aa_policydb policy; + struct aa_file_rules file; + struct aa_caps caps; ++ struct aa_net_compat *net_compat; + struct aa_rlimit rlimits; + + struct aa_loaddata *rawdata; +--- a/security/apparmor/net.c ++++ b/security/apparmor/net.c +@@ -27,6 +27,11 @@ struct aa_sfs_entry aa_sfs_entry_network + { } + }; + ++struct aa_sfs_entry aa_sfs_entry_network_compat[] = { ++ AA_SFS_FILE_STRING("af_mask", AA_SFS_AF_MASK), ++ { } ++}; ++ + static const char * const net_mask_names[] = { + "unknown", + "send", +@@ -119,14 +124,26 @@ int aa_profile_af_perm(struct aa_profile + if (profile_unconfined(profile)) + return 0; + state = PROFILE_MEDIATES(profile, AA_CLASS_NET); +- if (!state) +- return 0; ++ if (state) { ++ if (!state) ++ return 0; ++ buffer[0] = cpu_to_be16(family); ++ buffer[1] = cpu_to_be16((u16) type); ++ state = aa_dfa_match_len(profile->policy.dfa, state, ++ (char *) &buffer, 4); ++ aa_compute_perms(profile->policy.dfa, state, &perms); ++ } else if (profile->net_compat) { ++ /* 2.x socket mediation compat */ ++ perms.allow = (profile->net_compat->allow[family] & (1 << type)) ? ++ ALL_PERMS_MASK : 0; ++ perms.audit = (profile->net_compat->audit[family] & (1 << type)) ? ++ ALL_PERMS_MASK : 0; ++ perms.quiet = (profile->net_compat->quiet[family] & (1 << type)) ? ++ ALL_PERMS_MASK : 0; + +- buffer[0] = cpu_to_be16(family); +- buffer[1] = cpu_to_be16((u16) type); +- state = aa_dfa_match_len(profile->policy.dfa, state, (char *) &buffer, +- 4); +- aa_compute_perms(profile->policy.dfa, state, &perms); ++ } else { ++ return 0; ++ } + aa_apply_modes_to_perms(profile, &perms); + + return aa_check_perms(profile, &perms, request, sa, audit_net_cb); +--- a/security/apparmor/policy.c ++++ b/security/apparmor/policy.c +@@ -226,6 +226,7 @@ void aa_free_profile(struct aa_profile * + aa_free_file_rules(&profile->file); + aa_free_cap_rules(&profile->caps); + aa_free_rlimit_rules(&profile->rlimits); ++ kzfree(profile->net_compat); + + kzfree(profile->dirname); + aa_put_dfa(profile->xmatch); +--- a/security/apparmor/policy_unpack.c ++++ b/security/apparmor/policy_unpack.c +@@ -37,7 +37,7 @@ + + #define v5 5 /* base version */ + #define v6 6 /* per entry policydb mediation check */ +-#define v7 7 ++#define v7 7 /* v2 compat networking */ + #define v8 8 /* full network masking */ + + /* +@@ -276,6 +276,19 @@ fail: + return 0; + } + ++static bool unpack_u16(struct aa_ext *e, u16 *data, const char *name) ++{ ++ if (unpack_nameX(e, AA_U16, name)) { ++ if (!inbounds(e, sizeof(u16))) ++ return 0; ++ if (data) ++ *data = le16_to_cpu(get_unaligned((__le16 *) e->pos)); ++ e->pos += sizeof(u16); ++ return 1; ++ } ++ return 0; ++} ++ + static bool unpack_u32(struct aa_ext *e, u32 *data, const char *name) + { + if (unpack_nameX(e, AA_U32, name)) { +@@ -553,7 +566,7 @@ static struct aa_profile *unpack_profile + struct aa_profile *profile = NULL; + const char *tmpname, *tmpns = NULL, *name = NULL; + const char *info = "failed to unpack profile"; +- size_t ns_len; ++ size_t size = 0, ns_len; + struct rhashtable_params params = { 0 }; + char *key = NULL; + struct aa_data *data; +@@ -686,6 +699,43 @@ static struct aa_profile *unpack_profile + goto fail; + } + ++ size = unpack_array(e, "net_allowed_af"); ++ if (size || VERSION_LT(e->version, v8)) { ++ profile->net_compat = kzalloc(sizeof(struct aa_net_compat), GFP_KERNEL); ++ if (!profile->net_compat) { ++ info = "out of memory"; ++ goto fail; ++ } ++ for (i = 0; i < size; i++) { ++ /* discard extraneous rules that this kernel will ++ * never request ++ */ ++ if (i >= AF_MAX) { ++ u16 tmp; ++ ++ if (!unpack_u16(e, &tmp, NULL) || ++ !unpack_u16(e, &tmp, NULL) || ++ !unpack_u16(e, &tmp, NULL)) ++ goto fail; ++ continue; ++ } ++ if (!unpack_u16(e, &profile->net_compat->allow[i], NULL)) ++ goto fail; ++ if (!unpack_u16(e, &profile->net_compat->audit[i], NULL)) ++ goto fail; ++ if (!unpack_u16(e, &profile->net_compat->quiet[i], NULL)) ++ goto fail; ++ } ++ if (size && !unpack_nameX(e, AA_ARRAYEND, NULL)) ++ goto fail; ++ if (VERSION_LT(e->version, v7)) { ++ /* pre v7 policy always allowed these */ ++ profile->net_compat->allow[AF_UNIX] = 0xffff; ++ profile->net_compat->allow[AF_NETLINK] = 0xffff; ++ } ++ } ++ ++ + if (unpack_nameX(e, AA_STRUCT, "policydb")) { + /* generic policy dfa - optional and may be NULL */ + info = "failed to unpack policydb"; diff --git a/patches.suse/0001-btrfs-Introduce-support-for-FSID-change-without-meta.patch b/patches.suse/0001-btrfs-Introduce-support-for-FSID-change-without-meta.patch new file mode 100644 index 0000000..b8ed4ee --- /dev/null +++ b/patches.suse/0001-btrfs-Introduce-support-for-FSID-change-without-meta.patch @@ -0,0 +1,435 @@ +From 3aa6117df90ac0d1eefab76485273637cf02f0e0 Mon Sep 17 00:00:00 2001 +From: Nikolay Borisov +Date: Wed, 22 Aug 2018 17:37:53 +0300 +Subject: [PATCH 1/6] btrfs: Introduce support for FSID change without metadata + rewrite +References: fate#325871 +Patch-mainline: Submitted, awaiting review + +This field is going to be used when the user wants to change the UUID +of the filesystem without having to rewrite all metadata blocks. This +field adds another level of indirection such that when the FSID is +changed what really happens is the current UUID (the one with which the +fs was created) is copied to the 'metadata_uuid' field in the superblock +as well as a new incompat flag is set METADATA_UUID. When the kernel +detects this flag is set it knows that the superblock in fact has 2 +UUIDs: + +1. Is the UUID which is user-visible, currently known as FSID. +2. Metadata UUID - this is the UUID which is stamped into all on-disk +datastructures belonging to this file system. + +When the new incompat flag is present device scaning checks whether +both fsid/metadata_uuid of the scanned device match to any of the +registed filesystems. When the flag is not set then both UUIDs are +equal and only the FSID is retained on disk, metadata_uuid is set only +in-memory during mount. + +Additionally a new metadata_uuid field is also added to the fs_info +struct. It's initialised either with the FSID in case METADATA_UUID +incompat flag is not set or with the metdata_uuid of the superblock +otherwise. + +This commit introduces the new fields as well as the new incompat flag +and switches all users of the fsid to the new logic. + +Signed-off-by: Nikolay Borisov +--- + fs/btrfs/ctree.c | 10 ++--- + fs/btrfs/ctree.h | 11 ++++-- + fs/btrfs/disk-io.c | 31 ++++++++++++--- + fs/btrfs/volumes.c | 70 ++++++++++++++++++++++++++------- + fs/btrfs/volumes.h | 1 + + include/uapi/linux/btrfs.h | 1 + + include/uapi/linux/btrfs_tree.h | 1 + + 7 files changed, 96 insertions(+), 29 deletions(-) + +diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c +index f70741084f2d..c4a39eef23a0 100644 +--- a/fs/btrfs/ctree.c ++++ b/fs/btrfs/ctree.c +@@ -275,7 +275,7 @@ int btrfs_copy_root(struct btrfs_trans_handle *trans, + else + btrfs_set_header_owner(cow, new_root_objectid); + +- write_extent_buffer_fsid(cow, fs_info->fsid); ++ write_extent_buffer_fsid(cow, fs_info->metadata_fsid); + + WARN_ON(btrfs_header_generation(buf) > trans->transid); + if (new_root_objectid == BTRFS_TREE_RELOC_OBJECTID) +@@ -1150,7 +1150,7 @@ static noinline int __btrfs_cow_block(struct btrfs_trans_handle *trans, + else + btrfs_set_header_owner(cow, root->root_key.objectid); + +- write_extent_buffer_fsid(cow, fs_info->fsid); ++ write_extent_buffer_fsid(cow, fs_info->metadata_fsid); + + ret = update_ref_for_cow(trans, root, buf, cow, &last_ref); + if (ret) { +@@ -3392,7 +3392,7 @@ static noinline int insert_new_root(struct btrfs_trans_handle *trans, + btrfs_set_header_backref_rev(c, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(c, root->root_key.objectid); + +- write_extent_buffer_fsid(c, fs_info->fsid); ++ write_extent_buffer_fsid(c, fs_info->metadata_fsid); + write_extent_buffer_chunk_tree_uuid(c, fs_info->chunk_tree_uuid); + + btrfs_set_node_key(c, &lower_key, 0); +@@ -3527,7 +3527,7 @@ static noinline int split_node(struct btrfs_trans_handle *trans, + btrfs_set_header_generation(split, trans->transid); + btrfs_set_header_backref_rev(split, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(split, root->root_key.objectid); +- write_extent_buffer_fsid(split, fs_info->fsid); ++ write_extent_buffer_fsid(split, fs_info->metadata_fsid); + write_extent_buffer_chunk_tree_uuid(split, fs_info->chunk_tree_uuid); + + ret = tree_mod_log_eb_copy(fs_info, split, c, 0, mid, c_nritems - mid); +@@ -4320,7 +4320,7 @@ static noinline int split_leaf(struct btrfs_trans_handle *trans, + btrfs_set_header_backref_rev(right, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(right, root->root_key.objectid); + btrfs_set_header_level(right, 0); +- write_extent_buffer_fsid(right, fs_info->fsid); ++ write_extent_buffer_fsid(right, fs_info->metadata_fsid); + write_extent_buffer_chunk_tree_uuid(right, fs_info->chunk_tree_uuid); + + if (split == 0) { +diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h +index da67736c382d..0076d2ecb2a0 100644 +--- a/fs/btrfs/ctree.h ++++ b/fs/btrfs/ctree.h +@@ -208,7 +208,7 @@ struct btrfs_root_backup { + struct btrfs_super_block { + u8 csum[BTRFS_CSUM_SIZE]; + /* the first 4 fields must match struct btrfs_header */ +- u8 fsid[BTRFS_FSID_SIZE]; /* FS specific uuid */ ++ u8 fsid[BTRFS_FSID_SIZE]; /* userfacing FS specific uuid */ + __le64 bytenr; /* this block number */ + __le64 flags; + +@@ -245,8 +245,11 @@ struct btrfs_super_block { + __le64 cache_generation; + __le64 uuid_tree_generation; + ++ /* The uuid written into btree blocks */ ++ u8 metadata_uuid[BTRFS_FSID_SIZE]; ++ + /* future expansion */ +- __le64 reserved[30]; ++ __le64 reserved[28]; + u8 sys_chunk_array[BTRFS_SYSTEM_CHUNK_ARRAY_SIZE]; + struct btrfs_root_backup super_roots[BTRFS_NUM_BACKUP_ROOTS]; + } __attribute__ ((__packed__)); +@@ -275,7 +278,8 @@ struct btrfs_super_block { + BTRFS_FEATURE_INCOMPAT_RAID56 | \ + BTRFS_FEATURE_INCOMPAT_EXTENDED_IREF | \ + BTRFS_FEATURE_INCOMPAT_SKINNY_METADATA | \ +- BTRFS_FEATURE_INCOMPAT_NO_HOLES) ++ BTRFS_FEATURE_INCOMPAT_NO_HOLES | \ ++ BTRFS_FEATURE_INCOMPAT_METADATA_UUID) + + #define BTRFS_FEATURE_INCOMPAT_SAFE_SET \ + (BTRFS_FEATURE_INCOMPAT_EXTENDED_IREF) +@@ -751,6 +755,7 @@ struct btrfs_delayed_root; + + struct btrfs_fs_info { + u8 fsid[BTRFS_FSID_SIZE]; ++ u8 metadata_fsid[BTRFS_FSID_SIZE]; /* UUID written to btree blocks */ + u8 chunk_tree_uuid[BTRFS_UUID_SIZE]; + unsigned long flags; + struct btrfs_root *extent_root; +diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c +index c33decceb3e6..05ee2399fb20 100644 +--- a/fs/btrfs/disk-io.c ++++ b/fs/btrfs/disk-io.c +@@ -579,7 +579,7 @@ static int csum_dirty_buffer(struct btrfs_fs_info *fs_info, struct page *page) + if (WARN_ON(!PageUptodate(page))) + return -EUCLEAN; + +- ASSERT(memcmp_extent_buffer(eb, fs_info->fsid, ++ ASSERT(memcmp_extent_buffer(eb, fs_info->metadata_fsid, + btrfs_header_fsid(), BTRFS_FSID_SIZE) == 0); + + return csum_tree_block(fs_info, eb, 0); +@@ -594,7 +594,19 @@ static int check_tree_block_fsid(struct btrfs_fs_info *fs_info, + + read_extent_buffer(eb, fsid, btrfs_header_fsid(), BTRFS_FSID_SIZE); + while (fs_devices) { +- if (!memcmp(fsid, fs_devices->fsid, BTRFS_FSID_SIZE)) { ++ u8 *metadata_uuid; ++ /* ++ * Checking the incompat flag is only valid for the current ++ * fs. For seed devices it's forbidden to have their uuid ++ * changed so reading ->fsid in this case is fine ++ */ ++ if (fs_devices == fs_info->fs_devices && ++ btrfs_fs_incompat(fs_info, METADATA_UUID)) ++ metadata_uuid = fs_devices->metadata_uuid; ++ else ++ metadata_uuid = fs_devices->fsid; ++ ++ if (!memcmp(fsid, metadata_uuid, BTRFS_FSID_SIZE)) { + ret = 0; + break; + } +@@ -1355,7 +1367,7 @@ struct btrfs_root *btrfs_create_tree(struct btrfs_trans_handle *trans, + btrfs_set_header_owner(leaf, objectid); + root->node = leaf; + +- write_extent_buffer_fsid(leaf, fs_info->fsid); ++ write_extent_buffer_fsid(leaf, fs_info->metadata_fsid); + write_extent_buffer_chunk_tree_uuid(leaf, fs_info->chunk_tree_uuid); + btrfs_mark_buffer_dirty(leaf); + +@@ -1436,7 +1448,7 @@ static struct btrfs_root *alloc_log_tree(struct btrfs_trans_handle *trans, + btrfs_set_header_owner(leaf, BTRFS_TREE_LOG_OBJECTID); + root->node = leaf; + +- write_extent_buffer_fsid(root->node, fs_info->fsid); ++ write_extent_buffer_fsid(root->node, fs_info->metadata_fsid); + btrfs_mark_buffer_dirty(root->node); + btrfs_tree_unlock(root->node); + return root; +@@ -2717,6 +2729,12 @@ int open_ctree(struct super_block *sb, + brelse(bh); + + memcpy(fs_info->fsid, fs_info->super_copy->fsid, BTRFS_FSID_SIZE); ++ if (btrfs_fs_incompat(fs_info, METADATA_UUID)) { ++ memcpy(fs_info->metadata_fsid, ++ fs_info->super_copy->metadata_uuid, BTRFS_FSID_SIZE); ++ } else { ++ memcpy(fs_info->metadata_fsid, fs_info->fsid, BTRFS_FSID_SIZE); ++ } + + ret = btrfs_check_super_valid(fs_info); + if (ret) { +@@ -3693,7 +3711,8 @@ int write_all_supers(struct btrfs_fs_info *fs_info, int max_mirrors) + btrfs_set_stack_device_io_width(dev_item, dev->io_width); + btrfs_set_stack_device_sector_size(dev_item, dev->sector_size); + memcpy(dev_item->uuid, dev->uuid, BTRFS_UUID_SIZE); +- memcpy(dev_item->fsid, dev->fs_devices->fsid, BTRFS_UUID_SIZE); ++ memcpy(dev_item->fsid, dev->fs_devices->metadata_uuid, ++ BTRFS_UUID_SIZE); + + flags = btrfs_super_flags(sb); + btrfs_set_super_flags(sb, flags | BTRFS_HEADER_FLAG_WRITTEN); +@@ -4141,7 +4160,7 @@ static int btrfs_check_super_valid(struct btrfs_fs_info *fs_info) + ret = -EINVAL; + } + +- if (memcmp(fs_info->fsid, sb->dev_item.fsid, BTRFS_UUID_SIZE) != 0) { ++ if (memcmp(fs_info->metadata_fsid, sb->dev_item.fsid, BTRFS_UUID_SIZE) != 0) { + btrfs_err(fs_info, + "dev_item UUID does not match fsid: %pU != %pU", + fs_info->fsid, sb->dev_item.fsid); +diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c +index 94326471bae6..52e4a63dc01a 100644 +--- a/fs/btrfs/volumes.c ++++ b/fs/btrfs/volumes.c +@@ -172,14 +172,15 @@ static struct btrfs_fs_devices *__alloc_fs_devices(void) + + /** + * alloc_fs_devices - allocate struct btrfs_fs_devices +- * @fsid: a pointer to UUID for this FS. If NULL a new UUID is +- * generated. ++ * @fsid: if not NULL, copy the uuid to fs_devices::fsid ++ * @metadata_fsid: if not NULL, copy the uuid to fs_devices::metadata_fsid + * + * Return: a pointer to a new &struct btrfs_fs_devices on success; + * ERR_PTR() on error. Returned struct is not linked onto any lists and + * can be destroyed with kfree() right away. + */ +-static struct btrfs_fs_devices *alloc_fs_devices(const u8 *fsid) ++static struct btrfs_fs_devices *alloc_fs_devices(const u8 *fsid, ++ const u8 *metadata_fsid) + { + struct btrfs_fs_devices *fs_devs; + +@@ -192,6 +193,11 @@ static struct btrfs_fs_devices *alloc_fs_devices(const u8 *fsid) + else + generate_random_uuid(fs_devs->fsid); + ++ if (metadata_fsid) ++ memcpy(fs_devs->metadata_uuid, metadata_fsid, BTRFS_FSID_SIZE); ++ else ++ memcpy(fs_devs->metadata_uuid, fs_devs->fsid, BTRFS_FSID_SIZE); ++ + return fs_devs; + } + +@@ -272,13 +278,24 @@ static noinline struct btrfs_device *__find_device(struct list_head *head, + return NULL; + } + +-static noinline struct btrfs_fs_devices *find_fsid(u8 *fsid) ++static noinline struct btrfs_fs_devices *find_fsid(u8 *fsid, ++ const u8 *metadata_fsid) + { + struct btrfs_fs_devices *fs_devices; + ++ ASSERT(fsid); ++ + list_for_each_entry(fs_devices, &fs_uuids, list) { +- if (memcmp(fsid, fs_devices->fsid, BTRFS_FSID_SIZE) == 0) +- return fs_devices; ++ if (metadata_fsid) { ++ if (memcmp(fsid, fs_devices->fsid, BTRFS_FSID_SIZE) == 0 ++ && memcmp(metadata_fsid, fs_devices->metadata_uuid, ++ BTRFS_FSID_SIZE) == 0) ++ return fs_devices; ++ } else { ++ if (memcmp(fsid, fs_devices->fsid, ++ BTRFS_FSID_SIZE) == 0) ++ return fs_devices; ++ } + } + return NULL; + } +@@ -615,10 +632,21 @@ static noinline int device_list_add(const char *path, + struct rcu_string *name; + int ret = 0; + u64 found_transid = btrfs_super_generation(disk_super); ++ bool has_metadata_uuid = (btrfs_super_incompat_flags(disk_super) & ++ BTRFS_FEATURE_INCOMPAT_METADATA_UUID); ++ ++ if (has_metadata_uuid) ++ fs_devices = find_fsid(disk_super->fsid, disk_super->metadata_uuid); ++ else ++ fs_devices = find_fsid(disk_super->fsid, NULL); + +- fs_devices = find_fsid(disk_super->fsid); + if (!fs_devices) { +- fs_devices = alloc_fs_devices(disk_super->fsid); ++ if (has_metadata_uuid) ++ fs_devices = alloc_fs_devices(disk_super->fsid, ++ disk_super->metadata_uuid); ++ else ++ fs_devices = alloc_fs_devices(disk_super->fsid, NULL); ++ + if (IS_ERR(fs_devices)) + return PTR_ERR(fs_devices); + +@@ -731,7 +759,7 @@ static struct btrfs_fs_devices *clone_fs_devices(struct btrfs_fs_devices *orig) + struct btrfs_device *device; + struct btrfs_device *orig_dev; + +- fs_devices = alloc_fs_devices(orig->fsid); ++ fs_devices = alloc_fs_devices(orig->fsid, NULL); + if (IS_ERR(fs_devices)) + return fs_devices; + +@@ -1006,6 +1034,11 @@ static int __btrfs_open_devices(struct btrfs_fs_devices *fs_devices, + + if (btrfs_super_flags(disk_super) & BTRFS_SUPER_FLAG_SEEDING) { + device->writeable = 0; ++ if (btrfs_super_incompat_flags(disk_super) & ++ BTRFS_FEATURE_INCOMPAT_METADATA_UUID) { ++ pr_err("BTRFS: Invalid seeding and uuid-changed device detected\n"); ++ goto error_brelse; ++ } + } else { + device->writeable = !bdev_read_only(bdev); + seeding = 0; +@@ -1717,7 +1750,7 @@ static int btrfs_add_device(struct btrfs_trans_handle *trans, + ptr = btrfs_device_uuid(dev_item); + write_extent_buffer(leaf, device->uuid, ptr, BTRFS_UUID_SIZE); + ptr = btrfs_device_fsid(dev_item); +- write_extent_buffer(leaf, fs_info->fsid, ptr, BTRFS_UUID_SIZE); ++ write_extent_buffer(leaf, fs_info->metadata_fsid, ptr, BTRFS_UUID_SIZE); + btrfs_mark_buffer_dirty(leaf); + + ret = 0; +@@ -2115,7 +2148,12 @@ static int btrfs_find_device_by_path(struct btrfs_fs_info *fs_info, + disk_super = (struct btrfs_super_block *)bh->b_data; + devid = btrfs_stack_device_id(&disk_super->dev_item); + dev_uuid = disk_super->dev_item.uuid; +- *device = btrfs_find_device(fs_info, devid, dev_uuid, disk_super->fsid); ++ if (btrfs_fs_incompat(fs_info, METADATA_UUID)) ++ *device = btrfs_find_device(fs_info, devid, dev_uuid, ++ disk_super->metadata_uuid); ++ else ++ *device = btrfs_find_device(fs_info, devid, dev_uuid, ++ disk_super->fsid); + brelse(bh); + if (!*device) + ret = -ENOENT; +@@ -2230,6 +2268,8 @@ static int btrfs_prepare_sprout(struct btrfs_fs_info *fs_info) + + generate_random_uuid(fs_devices->fsid); + memcpy(fs_info->fsid, fs_devices->fsid, BTRFS_FSID_SIZE); ++ memcpy(fs_devices->metadata_uuid, fs_devices->fsid, BTRFS_FSID_SIZE); ++ memcpy(fs_info->metadata_fsid, fs_devices->fsid, BTRFS_FSID_SIZE); + memcpy(disk_super->fsid, fs_devices->fsid, BTRFS_FSID_SIZE); + mutex_unlock(&fs_info->fs_devices->device_list_mutex); + +@@ -6356,7 +6396,7 @@ struct btrfs_device *btrfs_find_device(struct btrfs_fs_info *fs_info, u64 devid, + cur_devices = fs_info->fs_devices; + while (cur_devices) { + if (!fsid || +- !memcmp(cur_devices->fsid, fsid, BTRFS_UUID_SIZE)) { ++ !memcmp(cur_devices->metadata_uuid, fsid, BTRFS_UUID_SIZE)) { + device = __find_device(&cur_devices->devices, + devid, uuid); + if (device) +@@ -6640,12 +6680,12 @@ static struct btrfs_fs_devices *open_seed_devices(struct btrfs_fs_info *fs_info, + fs_devices = fs_devices->seed; + } + +- fs_devices = find_fsid(fsid); ++ fs_devices = find_fsid(fsid, NULL); + if (!fs_devices) { + if (!btrfs_test_opt(fs_info, DEGRADED)) + return ERR_PTR(-ENOENT); + +- fs_devices = alloc_fs_devices(fsid); ++ fs_devices = alloc_fs_devices(fsid, NULL); + if (IS_ERR(fs_devices)) + return fs_devices; + +@@ -6696,7 +6736,7 @@ static int read_one_dev(struct btrfs_fs_info *fs_info, + read_extent_buffer(leaf, fs_uuid, btrfs_device_fsid(dev_item), + BTRFS_UUID_SIZE); + +- if (memcmp(fs_uuid, fs_info->fsid, BTRFS_UUID_SIZE)) { ++ if (memcmp(fs_uuid, fs_info->metadata_fsid, BTRFS_UUID_SIZE)) { + fs_devices = open_seed_devices(fs_info, fs_uuid); + if (IS_ERR(fs_devices)) + return PTR_ERR(fs_devices); +diff --git a/fs/btrfs/volumes.h b/fs/btrfs/volumes.h +index 6d1b48929104..8777517317cf 100644 +--- a/fs/btrfs/volumes.h ++++ b/fs/btrfs/volumes.h +@@ -221,6 +221,7 @@ BTRFS_DEVICE_GETSET_FUNCS(bytes_used); + + struct btrfs_fs_devices { + u8 fsid[BTRFS_FSID_SIZE]; /* FS specific uuid */ ++ u8 metadata_uuid[BTRFS_FSID_SIZE]; + + u64 num_devices; + u64 open_devices; +diff --git a/include/uapi/linux/btrfs.h b/include/uapi/linux/btrfs.h +index a456e5309238..d53aa5a5d806 100644 +--- a/include/uapi/linux/btrfs.h ++++ b/include/uapi/linux/btrfs.h +@@ -273,6 +273,7 @@ struct btrfs_ioctl_fs_info_args { + #define BTRFS_FEATURE_INCOMPAT_RAID56 (1ULL << 7) + #define BTRFS_FEATURE_INCOMPAT_SKINNY_METADATA (1ULL << 8) + #define BTRFS_FEATURE_INCOMPAT_NO_HOLES (1ULL << 9) ++#define BTRFS_FEATURE_INCOMPAT_METADATA_UUID (1ULL << 10) + + struct btrfs_ioctl_feature_flags { + __u64 compat_flags; +diff --git a/include/uapi/linux/btrfs_tree.h b/include/uapi/linux/btrfs_tree.h +index 3142645a27f5..8afb27552130 100644 +--- a/include/uapi/linux/btrfs_tree.h ++++ b/include/uapi/linux/btrfs_tree.h +@@ -455,6 +455,7 @@ struct btrfs_free_space_header { + + #define BTRFS_SUPER_FLAG_SEEDING (1ULL << 32) + #define BTRFS_SUPER_FLAG_METADUMP (1ULL << 33) ++#define BTRFS_SUPER_FLAG_CHANGING_FSID_V2 (1ULL << 36) + + + /* +-- +2.17.1 + diff --git a/patches.suse/0001-btrfs-qgroup-Make-qgroup-async-transaction-commit-mo.patch b/patches.suse/0001-btrfs-qgroup-Make-qgroup-async-transaction-commit-mo.patch new file mode 100644 index 0000000..9ee0d0d --- /dev/null +++ b/patches.suse/0001-btrfs-qgroup-Make-qgroup-async-transaction-commit-mo.patch @@ -0,0 +1,119 @@ +From 7b6d148a1b7de1c9452467cd883ddcf8680a14d3 Mon Sep 17 00:00:00 2001 +From: Qu Wenruo +Date: Fri, 25 Jan 2019 07:55:27 +0800 +Patch-mainline: Submitted, for v5.1 +References: bsc#1113042 +Subject: [PATCH] btrfs: qgroup: Make qgroup async transaction commit more + aggressive + +[BUG] +Btrfs qgroup will still hit EDQUOT under the following case: + + #!/bin/bash + + dev=/dev/test/test + mnt=/mnt/btrfs + umount $mnt &> /dev/null + umount $dev &> /dev/null + + mkfs.btrfs -f $dev + mount $dev $mnt -o nospace_cache + + btrfs subv create $mnt/subv + btrfs quota enable $mnt + btrfs quota rescan -w $mnt + btrfs qgroup limit -e 1G $mnt/subv + + fallocate -l 900M $mnt/subv/padding + sync + + rm $mnt/subv/padding + + # Hit EDQUOT + xfs_io -f -c "pwrite 0 512M" $mnt/subv/real_file + +[CAUSE] +Since commit a514d63882c3 ("btrfs: qgroup: Commit transaction in advance +to reduce early EDQUOT"), btrfs is not forced to commit transaction to +reclaim more quota space. + +Instead, we just check pertrans metadata reservation against some +threshold and try to do asynchronously transaction commit. + +However in above case, the pertrans metadata reservation is pretty small +thus it will never trigger asynchronous transaction commit. + +[FIX] +Instead of only accounting pertrans metadata reservation, we calculate +how much free space we have, and if there isn't much free space left, +commit transaction asynchronously to try to free some space. + +This may slow down the fs when we have less than 32M free qgroup space, +but should reduce a lot of false EDQUOT, so the cost should be +acceptable. + +Signed-off-by: Qu Wenruo +--- + fs/btrfs/qgroup.c | 29 ++++++++++++++++------------- + 1 file changed, 16 insertions(+), 13 deletions(-) + +diff --git a/fs/btrfs/qgroup.c b/fs/btrfs/qgroup.c +index 4e473a998219..f0b7425bf289 100644 +--- a/fs/btrfs/qgroup.c ++++ b/fs/btrfs/qgroup.c +@@ -2843,15 +2843,15 @@ int btrfs_qgroup_inherit(struct btrfs_trans_handle *trans, u64 srcid, + * Two limits to commit transaction in advance. + * + * For RATIO, it will be 1/RATIO of the remaining limit +- * (excluding data and prealloc meta) as threshold. ++ * as threshold. + * For SIZE, it will be in byte unit as threshold. + */ +-#define QGROUP_PERTRANS_RATIO 32 +-#define QGROUP_PERTRANS_SIZE SZ_32M ++#define QGROUP_FREE_RATIO 32 ++#define QGROUP_FREE_SIZE SZ_32M + static bool qgroup_check_limits(struct btrfs_fs_info *fs_info, + const struct btrfs_qgroup *qg, u64 num_bytes) + { +- u64 limit; ++ u64 free; + u64 threshold; + + if ((qg->lim_flags & BTRFS_QGROUP_LIMIT_MAX_RFER) && +@@ -2870,20 +2870,23 @@ static bool qgroup_check_limits(struct btrfs_fs_info *fs_info, + */ + if ((qg->lim_flags & (BTRFS_QGROUP_LIMIT_MAX_RFER | + BTRFS_QGROUP_LIMIT_MAX_EXCL))) { +- if (qg->lim_flags & BTRFS_QGROUP_LIMIT_MAX_EXCL) +- limit = qg->max_excl; +- else +- limit = qg->max_rfer; +- threshold = (limit - qg->rsv.values[BTRFS_QGROUP_RSV_DATA] - +- qg->rsv.values[BTRFS_QGROUP_RSV_META_PREALLOC]) / +- QGROUP_PERTRANS_RATIO; +- threshold = min_t(u64, threshold, QGROUP_PERTRANS_SIZE); ++ if (qg->lim_flags & BTRFS_QGROUP_LIMIT_MAX_EXCL) { ++ free = (qg->max_excl - qgroup_rsv_total(qg) - ++ qg->excl); ++ threshold = min_t(u64, qg->max_excl / QGROUP_FREE_RATIO, ++ QGROUP_FREE_SIZE); ++ } else { ++ free = (qg->max_rfer - qgroup_rsv_total(qg) - ++ qg->rfer); ++ threshold = min_t(u64, qg->max_rfer / QGROUP_FREE_RATIO, ++ QGROUP_FREE_SIZE); ++ } + + /* + * Use transaction_kthread to commit transaction, so we no + * longer need to bother nested transaction nor lock context. + */ +- if (qg->rsv.values[BTRFS_QGROUP_RSV_META_PERTRANS] > threshold) ++ if (free < threshold) + btrfs_commit_transaction_locksafe(fs_info); + } + +-- +2.20.1 + diff --git a/patches.suse/0001-drm-ttm-Remove-warning-about-inconsistent-mapping-in.patch b/patches.suse/0001-drm-ttm-Remove-warning-about-inconsistent-mapping-in.patch new file mode 100644 index 0000000..70f8444 --- /dev/null +++ b/patches.suse/0001-drm-ttm-Remove-warning-about-inconsistent-mapping-in.patch @@ -0,0 +1,33 @@ +From d719a1ff8391101ba5cb0998943dfb3f77d47e7f Mon Sep 17 00:00:00 2001 +From: Thomas Zimmermann +Date: Tue, 14 May 2019 12:37:31 +0200 +Subject: drm/ttm: Remove warning about inconsistent mapping information +Patch-mainline: Never, local cleanup +References: bnc#1131488 + +Fixing the issue of bnc1131488 requires changing a significant amount +of the fbdev emulation. As the problem is rather cosmetical, we drop +the warning for now. + +Signed-off-by: Thomas Zimmermann +Acked-by: Thomas Zimmermann +--- + drivers/gpu/drm/ttm/ttm_bo_vm.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c +index 622dab6c4347..90a56c6724b5 100644 +--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c ++++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c +@@ -284,8 +284,6 @@ static void ttm_bo_vm_open(struct vm_area_struct *vma) + struct ttm_buffer_object *bo = + (struct ttm_buffer_object *)vma->vm_private_data; + +- WARN_ON(bo->bdev->dev_mapping != vma->vm_file->f_mapping); +- + ttm_bo_get(bo); + } + +-- +2.21.0 + diff --git a/patches.suse/0001-iommu-vt-d-Fix-race-condition-in-add_unmap.patch b/patches.suse/0001-iommu-vt-d-Fix-race-condition-in-add_unmap.patch new file mode 100644 index 0000000..655f5bb --- /dev/null +++ b/patches.suse/0001-iommu-vt-d-Fix-race-condition-in-add_unmap.patch @@ -0,0 +1,34 @@ +From: Joerg Roedel +Date: Fri, 15 Jun 2018 15:09:43 +0200 +Subject: iommu/vt-d: Fix race condition in add_unmap() +Patch-mainline: No, upstream switched to a different implementation +References: bsc#1096790, bsc#1097034 + +The high-water-mark needs to be checked again after the lock +is taken, otherwise flush_data->size might grow larger than +the high-water-mark and we write behind the array limits of +the deferred flush tables. + +Signed-off-by: Joerg Roedel +--- + drivers/iommu/intel-iommu.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c +index 880830d..919ede7 100644 +--- a/drivers/iommu/intel-iommu.c ++++ b/drivers/iommu/intel-iommu.c +@@ -3742,6 +3742,10 @@ static void add_unmap(struct dmar_domain *dom, unsigned long iova_pfn, + + spin_lock_irqsave(&flush_data->lock, flags); + ++ /* Need to check that again after we own the lock */ ++ if (unlikely(flush_data->size == HIGH_WATER_MARK)) ++ flush_unmaps(flush_data); ++ + iommu = domain_get_iommu(dom); + iommu_id = iommu->seq_id; + +-- +2.12.3 + diff --git a/patches.suse/0001-irqchip-gic-v3-its-fix-build-warnings.patch b/patches.suse/0001-irqchip-gic-v3-its-fix-build-warnings.patch new file mode 100644 index 0000000..d579132 --- /dev/null +++ b/patches.suse/0001-irqchip-gic-v3-its-fix-build-warnings.patch @@ -0,0 +1,61 @@ +From fdcd2a57f4dba25d1a0bb5c8b4f36c1f7f949137 Mon Sep 17 00:00:00 2001 +From: Mian Yousaf Kaukab +Date: Thu, 8 Aug 2019 15:04:08 +0200 +Subject: [PATCH] irqchip/gic-v3-its: fix build warnings +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Patch-mainline: Never, Build warnings due to missing patch +References: bsc#1144880 + +Following warnings are fixed: +drivers/irqchip/irq-gic-v3-its.c: In function ‘its_irq_domain_activate’: +drivers/irqchip/irq-gic-v3-its.c:2323:11: warning: ‘return’ with a value, in function returning void + return -EINVAL; + ^ +drivers/irqchip/irq-gic-v3-its.c:2307:13: note: declared here + static void its_irq_domain_activate(struct irq_domain *domain, + ^~~~~~~~~~~~~~~~~~~~~~~ + LD drivers/net/ethernet/allwinner/built-in.o +drivers/irqchip/irq-gic-v3-its.c: In function ‘its_vpe_irq_domain_activate’: +drivers/irqchip/irq-gic-v3-its.c:2838:10: warning: ‘return’ with a value, in function returning void + return 0; + ^ +drivers/irqchip/irq-gic-v3-its.c:2830:13: note: declared here + static void its_vpe_irq_domain_activate(struct irq_domain *domain, + +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/irqchip/irq-gic-v3-its.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c +index fbda05bbd9ee..03ace8f3ac65 100644 +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -2319,8 +2319,10 @@ static void its_irq_domain_activate(struct irq_domain *domain, + /* Bind the LPI to the first possible CPU */ + cpu = cpumask_first_and(cpu_mask, cpu_online_mask); + if (cpu >= nr_cpu_ids) { +- if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) +- return -EINVAL; ++ if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) { ++ pr_err("ITS: Can't bind LPI to non-local node CPU due to Cavium erratum 23144\n"); ++ return; ++ } + + cpu = cpumask_first(cpu_online_mask); + } +@@ -2835,7 +2837,7 @@ static void its_vpe_irq_domain_activate(struct irq_domain *domain, + + /* If we use the list map, we issue VMAPP on demand... */ + if (its_list_map) +- return 0; ++ return; + + /* Map the VPE to the first possible CPU */ + vpe->col_idx = cpumask_first(cpu_online_mask); +-- +2.11.0 + diff --git a/patches.suse/0001-kvm-Introduce-nopvspin-kernel-parameter.patch b/patches.suse/0001-kvm-Introduce-nopvspin-kernel-parameter.patch new file mode 100644 index 0000000..3baff30 --- /dev/null +++ b/patches.suse/0001-kvm-Introduce-nopvspin-kernel-parameter.patch @@ -0,0 +1,157 @@ +From 5ed57eeec83f8e851029df9ebbe679f9d15c30a8 Mon Sep 17 00:00:00 2001 +From: Davidlohr Bueso +Date: Thu, 17 May 2018 12:17:19 -0700 +Subject: [PATCH] kvm: Introduce nopvspin kernel parameter +Patch-mainline: never, SUSE specific +References: bsc#1056427 + +This adds a is a SLE specific feature to disable paravirtual +spinlocks in favor of the bare metal behavior under specific 1:1 +cpu to vcpu mappings. + +Signed-off-by: Davidlohr Bueso +--- + Documentation/admin-guide/kernel-parameters.txt | 4 +++ + arch/x86/include/asm/qspinlock.h | 11 ++++++++- + arch/x86/kernel/kvm.c | 29 ++++++++++++++++++++++++ + arch/x86/kernel/paravirt.c | 8 ++++++ + arch/x86/kernel/smpboot.c | 2 + + 5 files changed, 53 insertions(+), 1 deletion(-) + +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -1899,6 +1899,10 @@ + feature (tagged TLBs) on capable Intel chips. + Default is 1 (enabled) + ++ kvm_nopvspin [X86,KVM] ++ Disables the paravirtualized spinlock slowpath ++ optimizations for KVM. ++ + l1tf= [X86] Control mitigation of the L1TF vulnerability on + affected CPUs + +--- a/arch/x86/include/asm/qspinlock.h ++++ b/arch/x86/include/asm/qspinlock.h +@@ -1,6 +1,7 @@ + #ifndef _ASM_X86_QSPINLOCK_H + #define _ASM_X86_QSPINLOCK_H + ++#include + #include + #include + #include +@@ -46,10 +47,14 @@ static inline void queued_spin_unlock(st + #endif + + #ifdef CONFIG_PARAVIRT ++DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key); ++ ++void native_pv_lock_init(void) __init; ++ + #define virt_spin_lock virt_spin_lock + static inline bool virt_spin_lock(struct qspinlock *lock) + { +- if (!static_cpu_has(X86_FEATURE_HYPERVISOR)) ++ if (!static_branch_likely(&virt_spin_lock_key)) + return false; + + /* +@@ -65,6 +70,10 @@ static inline bool virt_spin_lock(struct + + return true; + } ++#else ++static inline void native_pv_lock_init(void) ++{ ++} + #endif /* CONFIG_PARAVIRT */ + + #include +--- a/arch/x86/kernel/kvm.c ++++ b/arch/x86/kernel/kvm.c +@@ -47,6 +47,22 @@ + #include + #include + ++/* ++ * SLE-specific. ++ * ++ * Allow disabling of PV spinlock in kernel command line (kernel param). ++ * Similar idea to what Xen does. Upstream, however, uses a different ++ * approach such that hypervisor admins can pass the VM_HINTS_DEDICATED ++ * via qemu. ++ */ ++static bool kvm_pvspin = true; ++static __init int kvm_parse_nopvspin(char *arg) ++{ ++ kvm_pvspin = false; ++ return 0; ++} ++early_param("kvm_nopvspin", kvm_parse_nopvspin); ++ + static int kvmapf = 1; + + static int parse_no_kvmapf(char *arg) +@@ -454,6 +470,13 @@ static void __init sev_map_percpu_data(v + } + + #ifdef CONFIG_SMP ++static void __init kvm_smp_prepare_cpus(unsigned int max_cpus) ++{ ++ native_smp_prepare_cpus(max_cpus); ++ if (!kvm_pvspin) ++ static_branch_disable(&virt_spin_lock_key); ++} ++ + static void __init kvm_smp_prepare_boot_cpu(void) + { + /* +@@ -524,6 +547,7 @@ void __init kvm_guest_init(void) + kvm_setup_vsyscall_timeinfo(); + + #ifdef CONFIG_SMP ++ smp_ops.smp_prepare_cpus = kvm_smp_prepare_cpus; + smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu; + if (cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/kvm:online", + kvm_cpu_online, kvm_cpu_down_prepare) < 0) +@@ -680,6 +704,11 @@ void __init kvm_spinlock_init(void) + if (!kvm_para_has_feature(KVM_FEATURE_PV_UNHALT)) + return; + ++ if (!kvm_pvspin) { ++ printk(KERN_INFO "KVM: disabled paravirtual spinlock\n"); ++ return; ++ } ++ + __pv_init_lock_hash(); + pv_lock_ops.queued_spin_lock_slowpath = __pv_queued_spin_lock_slowpath; + pv_lock_ops.queued_spin_unlock = PV_CALLEE_SAVE(__pv_queued_spin_unlock); +--- a/arch/x86/kernel/paravirt.c ++++ b/arch/x86/kernel/paravirt.c +@@ -121,6 +121,14 @@ unsigned paravirt_patch_jmp(void *insnbu + return 5; + } + ++DEFINE_STATIC_KEY_TRUE(virt_spin_lock_key); ++ ++void __init native_pv_lock_init(void) ++{ ++ if (!static_cpu_has(X86_FEATURE_HYPERVISOR)) ++ static_branch_disable(&virt_spin_lock_key); ++} ++ + /* Neat trick to map patch type back to the call within the + * corresponding structure. */ + static void *get_call_destination(u8 type) +--- a/arch/x86/kernel/smpboot.c ++++ b/arch/x86/kernel/smpboot.c +@@ -1334,6 +1334,8 @@ void __init native_smp_prepare_cpus(unsi + pr_info("CPU0: "); + print_cpu_info(&cpu_data(0)); + ++ native_pv_lock_init(); ++ + uv_system_init(); + + set_mtrr_aps_delayed_init(); diff --git a/patches.suse/0001-mmc-sdhci-add-delay-after-the-last-tuning-command.patch b/patches.suse/0001-mmc-sdhci-add-delay-after-the-last-tuning-command.patch new file mode 100644 index 0000000..594e3cd --- /dev/null +++ b/patches.suse/0001-mmc-sdhci-add-delay-after-the-last-tuning-command.patch @@ -0,0 +1,53 @@ +From: BOUGH CHEN +Date: Fri, 28 Dec 2018 08:35:49 +0000 +Subject: mmc: sdhci: add delay after the last tuning command + +Git-commit: 920ce03ed27541029f2322d05177457ea473973d +Patch-mainline: Queued +Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git +References: bsc#1123999 + +When host set the host->tuning_delay, even the last tuning +command need a delay, otherwise the first command after the +tuning will meet issue. + +Take i.MX7D as an example, there will be the following log: + mmc2: switch to high-speed from hs200 failed, err:-110 + mmc2: error -110 whilst initialising MMC card + +Signed-off-by: Haibo Chen +Acked-by: Adrian Hunter +Signed-off-by: Ulf Hansson +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/mmc/host/sdhci.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +index eba9bcc92ad3..283dab5fc8d4 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -2376,6 +2376,10 @@ static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode) + return -ETIMEDOUT; + } + ++ /* Spec does not require a delay between tuning cycles */ ++ if (host->tuning_delay > 0) ++ mdelay(host->tuning_delay); ++ + ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); + if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) { + if (ctrl & SDHCI_CTRL_TUNED_CLK) +@@ -2383,9 +2387,6 @@ static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode) + break; + } + +- /* Spec does not require a delay between tuning cycles */ +- if (host->tuning_delay > 0) +- mdelay(host->tuning_delay); + } + + pr_info("%s: Tuning failed, falling back to fixed sampling clock\n", +-- +2.11.0 + diff --git a/patches.suse/0001-rbd-drop-extra-rbd_img_request_get.patch b/patches.suse/0001-rbd-drop-extra-rbd_img_request_get.patch new file mode 100644 index 0000000..06d21fb --- /dev/null +++ b/patches.suse/0001-rbd-drop-extra-rbd_img_request_get.patch @@ -0,0 +1,32 @@ +From: Luis Henriques +Date: Fri, 23 Jun 2017 16:21:42 +0100 +Subject: rbd: drop extra rbd_img_request_get +Patch-mainline: Never, it fixes SUSE-specific code that has never been + merged upstream +References: bsc#1045596 + +Upstream commit 4a17dadcae55 ("rbd: move bumping img_request refcount into +rbd_obj_request_submit()") has modified rbd_obj_request_submit() to do a +get img_request. + +This however introduced a regression in function tcm_rbd_execute_cmp_and_write +as it is calling rbd_img_cmp_and_write_request_fill (which does an +rbd_img_request_get()) followed by rbd_img_request_submit, which will +eventually invoke rbd_obj_request_submit. + +Signed-off-by: Luis Henriques +Acked-by: David Disseldorp +--- + drivers/block/rbd.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/block/rbd.c ++++ b/drivers/block/rbd.c +@@ -2474,7 +2474,6 @@ int rbd_img_cmp_and_write_request_fill(s + if (ceph_osdc_alloc_messages(osd_req, GFP_NOIO)) + goto del_obj_req; + +- rbd_img_request_get(img_request); + return 0; + + del_obj_req: diff --git a/patches.suse/0001-security-create-hidden-area-to-keep-sensitive-data.patch b/patches.suse/0001-security-create-hidden-area-to-keep-sensitive-data.patch new file mode 100644 index 0000000..b8d3ea1 --- /dev/null +++ b/patches.suse/0001-security-create-hidden-area-to-keep-sensitive-data.patch @@ -0,0 +1,333 @@ +From 1f9c24273e5d5344dea413fe450452b50dbe8a1a Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Mon, 11 Dec 2017 18:28:43 +0800 +Subject: [PATCH 01/11] security: create hidden area to keep sensitive data +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +There have some sensitive data (symmetric key, password..) in kernel space. +When kernel locked down, those sensitive data should be filted out when +/dev/mem, /dev/kmem/, hibernation, kdump... interfaces be used. + +Signed-off-by: Lee, Chun-Yi +--- + include/linux/security.h | 28 ++++++ + init/main.c | 1 + + security/Kconfig | 6 ++ + security/Makefile | 2 + + security/hidden_area.c | 226 +++++++++++++++++++++++++++++++++++++++++++++++ + 5 files changed, 263 insertions(+) + create mode 100644 security/hidden_area.c + +diff --git a/include/linux/security.h b/include/linux/security.h +index 03c91f5..d0d8580 100644 +--- a/include/linux/security.h ++++ b/include/linux/security.h +@@ -1771,5 +1771,33 @@ static inline void lock_kernel_down(void) + } + #endif + ++#ifdef CONFIG_HIDDEN_AREA ++extern void __init hidden_area_init(void); ++extern void * memcpy_to_hidden_area(const void *source, unsigned long size); ++extern bool page_is_hidden(struct page *page); ++extern void clean_hidden_area(void); ++extern int encrypt_backup_hidden_area(void *key, unsigned long key_len); ++extern int decrypt_restore_hidden_area(void *key, unsigned long key_len); ++#else ++static inline void __init hidden_area_init(void) {} ++static inline void * memcpy_to_hidden_area(const void *source, unsigned long size) ++{ ++ return NULL; ++} ++static inline bool page_is_hidden(struct page *page) ++{ ++ return false; ++} ++static inline void clean_hidden_area(void) {} ++static inline int encrypt_backup_hidden_area(void *key, unsigned long key_len) ++{ ++ return 0; ++} ++static inline int decrypt_restore_hidden_area(void *key, unsigned long key_len) ++{ ++ return 0; ++} ++#endif ++ + #endif /* ! __LINUX_SECURITY_H */ + +diff --git a/init/main.c b/init/main.c +index fa0bcc7..87d52ec 100644 +--- a/init/main.c ++++ b/init/main.c +@@ -663,6 +663,7 @@ asmlinkage __visible void __init start_kernel(void) + fork_init(); + proc_caches_init(); + buffer_init(); ++ hidden_area_init(); + key_init(); + security_init(); + dbg_late_init(); +diff --git a/security/Kconfig b/security/Kconfig +index b99a550..2e891d1 100644 +--- a/security/Kconfig ++++ b/security/Kconfig +@@ -213,6 +213,12 @@ config ALLOW_LOCKDOWN_LIFT + ability of userspace to access the kernel image (eg. by SysRq+x under + x86). + ++config HIDDEN_AREA ++ def_bool n ++ help ++ The data in hidden area will be filtered out when user space uses ++ /dev/mem, /dev/kmem, hibernation, kdump... ++ + source security/selinux/Kconfig + source security/smack/Kconfig + source security/tomoyo/Kconfig +diff --git a/security/Makefile b/security/Makefile +index 8c4a43e..620ec2f 100644 +--- a/security/Makefile ++++ b/security/Makefile +@@ -32,3 +32,5 @@ obj-$(CONFIG_INTEGRITY) += integrity/ + + # Allow the kernel to be locked down + obj-$(CONFIG_LOCK_DOWN_KERNEL) += lock_down.o ++ ++obj-$(CONFIG_HIDDEN_AREA) += hidden_area.o +diff --git a/security/hidden_area.c b/security/hidden_area.c +new file mode 100644 +index 0000000..d8dc186 +--- /dev/null ++++ b/security/hidden_area.c +@@ -0,0 +1,226 @@ ++/* Hidden area ++ * ++ * Copyright (C) 2017 Lee, Chun-Yi ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++*/ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++void *hidden_area_va; ++unsigned long hidden_area_size; ++unsigned long hidden_area_pa; ++unsigned long hidden_area_pfn; ++ ++static void *cursor; ++static u8 iv[AES_BLOCK_SIZE]; ++static void *encrypted_area_va; ++ ++DEFINE_SPINLOCK(area_lock); ++ ++void * memcpy_to_hidden_area(const void *source, unsigned long size) ++{ ++ void * start_addr = NULL; ++ ++ if (!source || !hidden_area_va) ++ return NULL; ++ ++ if (page_to_pfn(virt_to_page(cursor + size)) != hidden_area_pfn) ++ return NULL; ++ ++ spin_lock(&area_lock); ++ start_addr = memcpy(cursor, source, size); ++ if (start_addr) ++ cursor += size; ++ spin_unlock(&area_lock); ++ ++ return start_addr; ++} ++EXPORT_SYMBOL(memcpy_to_hidden_area); ++ ++bool page_is_hidden(struct page *page) ++{ ++ if (!page || !hidden_area_va) ++ return false; ++ ++ return (page_to_pfn(page) == hidden_area_pfn); ++} ++EXPORT_SYMBOL(page_is_hidden); ++ ++void clean_hidden_area(void) ++{ ++ spin_lock(&area_lock); ++ memset(hidden_area_va, 0, hidden_area_size); ++ spin_unlock(&area_lock); ++} ++EXPORT_SYMBOL(clean_hidden_area); ++ ++/** ++ * encrypt and backup hidden area - Encrypt and backup hidden area. ++ * @key: The key is used to encrypt. ++ * @key_len: The size (bytes) of key. It must bigger than 32 (bytes). ++ * ++ * This routine will encrypt the plain text in hidden area. The cipher ++ * text will be put to a buffer as backup. The cipher text can be restored ++ * to the hidden area later. ++ */ ++int encrypt_backup_hidden_area(void *key, unsigned long key_len) ++{ ++ struct scatterlist src[1], dst[1]; ++ struct crypto_skcipher *tfm; ++ struct skcipher_request *req; ++ u8 iv_tmp[AES_BLOCK_SIZE]; ++ u8 *tmp; ++ int ret; ++ ++ if (!key || key_len < 32) ++ return -EINVAL; ++ ++ if (!encrypted_area_va) { ++ encrypted_area_va = (void *)get_zeroed_page(GFP_KERNEL); ++ if (!encrypted_area_va) ++ return -ENOMEM; ++ } ++ ++ tmp = kmemdup(hidden_area_va, hidden_area_size, GFP_KERNEL); ++ if (!tmp) ++ return -ENOMEM; ++ ++ tfm = crypto_alloc_skcipher("ctr(aes)", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ ret = PTR_ERR(tfm); ++ pr_err("failed to allocate skcipher (%d)\n", ret); ++ goto tfm_fail; ++ } ++ ++ ret = crypto_skcipher_setkey(tfm, key, 32); ++ if (ret) { ++ pr_err("failed to setkey (%d)\n", ret); ++ goto set_fail; ++ } ++ ++ req = skcipher_request_alloc(tfm, GFP_KERNEL); ++ if (!req) { ++ pr_err("failed to allocate request\n"); ++ ret = -ENOMEM; ++ goto set_fail; ++ } ++ ++ spin_lock(&area_lock); ++ /* get initial vector from random pool */ ++ get_random_bytes(iv, AES_BLOCK_SIZE); ++ memcpy(iv_tmp, iv, sizeof(iv)); ++ ++ memset(encrypted_area_va, 0, hidden_area_size); ++ sg_init_one(src, tmp, hidden_area_size); ++ sg_init_one(dst, encrypted_area_va, hidden_area_size); ++ skcipher_request_set_crypt(req, src, dst, hidden_area_size, iv_tmp); ++ ret = crypto_skcipher_encrypt(req); ++ spin_unlock(&area_lock); ++ ++ skcipher_request_free(req); ++set_fail: ++ crypto_free_skcipher(tfm); ++tfm_fail: ++ memset(tmp, 0, hidden_area_size); ++ kfree(tmp); ++ ++ return ret; ++} ++EXPORT_SYMBOL(encrypt_backup_hidden_area); ++ ++int decrypt_restore_hidden_area(void *key, unsigned long key_len) ++{ ++ struct scatterlist src[1], dst[1]; ++ struct crypto_skcipher *tfm; ++ struct skcipher_request *req; ++ u8 iv_tmp[AES_BLOCK_SIZE]; ++ void *tmp; ++ int ret; ++ ++ if (!key || key_len < 32) ++ return -EINVAL; ++ ++ if (!encrypted_area_va) { ++ pr_err("hidden area is not encrypted yet\n"); ++ return -EINVAL; ++ } ++ ++ /* allocate tmp buffer for decrypted data */ ++ tmp = (void *)get_zeroed_page(GFP_KERNEL); ++ if (!tmp) ++ return -ENOMEM; ++ ++ tfm = crypto_alloc_skcipher("ctr(aes)", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ ret = PTR_ERR(tfm); ++ pr_err("failed to allocate skcipher (%ld)\n", PTR_ERR(tfm)); ++ goto tfm_fail; ++ } ++ ++ ret = crypto_skcipher_setkey(tfm, key, 32); ++ if (ret) { ++ pr_err("failed to setkey (%d)\n", ret); ++ goto set_fail; ++ } ++ ++ req = skcipher_request_alloc(tfm, GFP_KERNEL); ++ if (!req) { ++ pr_err("failed to allocate request\n"); ++ ret = -ENOMEM; ++ goto set_fail; ++ } ++ ++ spin_lock(&area_lock); ++ /* decrypt data to tmp buffer */ ++ sg_init_one(src, encrypted_area_va, hidden_area_size); ++ sg_init_one(dst, tmp, hidden_area_size); ++ memcpy(iv_tmp, iv, sizeof(iv)); ++ skcipher_request_set_crypt(req, src, dst, hidden_area_size, iv_tmp); ++ ret = crypto_skcipher_decrypt(req); ++ ++ /* restore hidden area from tmp buffer */ ++ if (!ret) { ++ memset(hidden_area_va, 0, hidden_area_size); ++ memcpy(hidden_area_va, tmp, hidden_area_size); ++ memset(encrypted_area_va, 0, hidden_area_size); ++ free_pages((unsigned long)encrypted_area_va, 0); ++ encrypted_area_va = NULL; ++ } ++ spin_unlock(&area_lock); ++ ++ skcipher_request_free(req); ++set_fail: ++ crypto_free_skcipher(tfm); ++tfm_fail: ++ memset(tmp, 0, hidden_area_size); ++ free_pages((unsigned long)tmp, 0); ++ return ret; ++} ++EXPORT_SYMBOL(decrypt_restore_hidden_area); ++ ++void __init hidden_area_init(void) ++{ ++ cursor = NULL; ++ hidden_area_va = (void *) get_zeroed_page(GFP_KERNEL); ++ if (!hidden_area_va) { ++ pr_err("Hidden Area: allocate page failed\n"); ++ } else { ++ hidden_area_pa = virt_to_phys(hidden_area_va); ++ hidden_area_pfn = page_to_pfn(virt_to_page(hidden_area_va)); ++ hidden_area_size = PAGE_SIZE; ++ cursor = hidden_area_va; ++ } ++} +-- +2.10.2 + diff --git a/patches.suse/0001-target_core_rbd-use-RCU-in-free_device.patch b/patches.suse/0001-target_core_rbd-use-RCU-in-free_device.patch new file mode 100644 index 0000000..54e3bec --- /dev/null +++ b/patches.suse/0001-target_core_rbd-use-RCU-in-free_device.patch @@ -0,0 +1,47 @@ +From 68d0a33872dfafcd96b58f08b4df098a759fd7cd Mon Sep 17 00:00:00 2001 +From: David Disseldorp +Date: Fri, 31 Aug 2018 15:02:14 +0200 +Subject: [PATCH 1/2] target_core_rbd: use RCU in free_device +Patch-mainline: Not yet, SES clustered LIO/RBD +References: bsc#1105524 + +This matches behaviour introduced with 4cc987eaff91: +("target: Drop lun_sep_lock for se_lun->lun_se_dev RCU usage") + +Signed-off-by: David Disseldorp +Acked-by: Luis Henriques +--- + drivers/target/target_core_rbd.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/target/target_core_rbd.c b/drivers/target/target_core_rbd.c +index 00efe9762267..b986a94ff586 100644 +--- a/drivers/target/target_core_rbd.c ++++ b/drivers/target/target_core_rbd.c +@@ -127,6 +127,14 @@ static int tcm_rbd_configure_device(struct se_device *dev) + return 0; + } + ++static void tcm_rbd_dev_call_rcu(struct rcu_head *p) ++{ ++ struct se_device *dev = container_of(p, struct se_device, rcu_head); ++ struct tcm_rbd_dev *tcm_rbd_dev = TCM_RBD_DEV(dev); ++ ++ kfree(tcm_rbd_dev); ++} ++ + static void tcm_rbd_free_device(struct se_device *dev) + { + struct tcm_rbd_dev *tcm_rbd_dev = TCM_RBD_DEV(dev); +@@ -134,7 +142,7 @@ static void tcm_rbd_free_device(struct se_device *dev) + if (tcm_rbd_dev->bd != NULL) + blkdev_put(tcm_rbd_dev->bd, FMODE_WRITE|FMODE_READ|FMODE_EXCL); + +- kfree(tcm_rbd_dev); ++ call_rcu(&dev->rcu_head, tcm_rbd_dev_call_rcu); + } + + static sector_t tcm_rbd_get_blocks(struct se_device *dev) +-- +2.13.7 + diff --git a/patches.suse/0001-usb-Add-Xen-pvUSB-protocol-description.patch b/patches.suse/0001-usb-Add-Xen-pvUSB-protocol-description.patch new file mode 100644 index 0000000..2c90e44 --- /dev/null +++ b/patches.suse/0001-usb-Add-Xen-pvUSB-protocol-description.patch @@ -0,0 +1,297 @@ +From e8281e3cbb88ba322c5c920fb6e30c8f734e1bee Mon Sep 17 00:00:00 2001 +From: Juergen Gross +Date: Thu, 16 Aug 2018 11:01:38 +0200 +Subject: [PATCH v5 1/3] usb: Add Xen pvUSB protocol description +Patch-Mainline: Not yet, work in progress +References: fate#315712 + +Add the definition of pvUSB protocol used between the pvUSB frontend in +a Xen domU and the pvUSB backend in a Xen driver domain (usually Dom0). + +This header was originally provided by Fujitsu for Xen based on Linux +2.6.18. + +Changes are: +- adapt to Linux style guide + +Signed-off-by: Juergen Gross +--- + include/Kbuild | 1 + + include/xen/interface/io/usbif.h | 253 +++++++++++++++++++++++++++++++++++++++ + 2 files changed, 254 insertions(+) + create mode 100644 include/xen/interface/io/usbif.h + +diff --git a/include/Kbuild b/include/Kbuild +index c38f0d46b267..0be140cfa017 100644 +--- a/include/Kbuild ++++ b/include/Kbuild +@@ -1217,6 +1217,7 @@ header-test- += xen/interface/io/pvcalls.h + header-test- += xen/interface/io/ring.h + header-test- += xen/interface/io/sndif.h + header-test- += xen/interface/io/tpmif.h ++header-test- += xen/interface/io/usbif.h + header-test- += xen/interface/io/vscsiif.h + header-test- += xen/interface/io/xs_wire.h + header-test- += xen/interface/memory.h +diff --git a/include/xen/interface/io/usbif.h b/include/xen/interface/io/usbif.h +new file mode 100644 +index 000000000000..b6ac79ea2934 +--- /dev/null ++++ b/include/xen/interface/io/usbif.h +@@ -0,0 +1,253 @@ ++/* ++ * usbif.h ++ * ++ * USB I/O interface for Xen guest OSes. ++ * ++ * Copyright (C) 2009, FUJITSU LABORATORIES LTD. ++ * Author: Noboru Iwamatsu ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to ++ * deal in the Software without restriction, including without limitation the ++ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ */ ++ ++#ifndef __XEN_PUBLIC_IO_USBIF_H__ ++#define __XEN_PUBLIC_IO_USBIF_H__ ++ ++#include "ring.h" ++#include "../grant_table.h" ++ ++/* ++ * Feature and Parameter Negotiation ++ * ================================= ++ * The two halves of a Xen pvUSB driver utilize nodes within the XenStore to ++ * communicate capabilities and to negotiate operating parameters. This ++ * section enumerates these nodes which reside in the respective front and ++ * backend portions of the XenStore, following the XenBus convention. ++ * ++ * Any specified default value is in effect if the corresponding XenBus node ++ * is not present in the XenStore. ++ * ++ * XenStore nodes in sections marked "PRIVATE" are solely for use by the ++ * driver side whose XenBus tree contains them. ++ * ++ ***************************************************************************** ++ * Backend XenBus Nodes ++ ***************************************************************************** ++ * ++ *------------------ Backend Device Identification (PRIVATE) ------------------ ++ * ++ * num-ports ++ * Values: unsigned [1...31] ++ * ++ * Number of ports for this (virtual) USB host connector. ++ * ++ * usb-ver ++ * Values: unsigned [1...2] ++ * ++ * USB version of this host connector: 1 = USB 1.1, 2 = USB 2.0. ++ * ++ * port/[1...31] ++ * Values: string ++ * ++ * Physical USB device connected to the given port, e.g. "3-1.5". ++ * ++ ***************************************************************************** ++ * Frontend XenBus Nodes ++ ***************************************************************************** ++ * ++ *----------------------- Request Transport Parameters ----------------------- ++ * ++ * event-channel ++ * Values: unsigned ++ * ++ * The identifier of the Xen event channel used to signal activity ++ * in the ring buffer. ++ * ++ * urb-ring-ref ++ * Values: unsigned ++ * ++ * The Xen grant reference granting permission for the backend to map ++ * the sole page in a single page sized ring buffer. This is the ring ++ * buffer for urb requests. ++ * ++ * conn-ring-ref ++ * Values: unsigned ++ * ++ * The Xen grant reference granting permission for the backend to map ++ * the sole page in a single page sized ring buffer. This is the ring ++ * buffer for connection/disconnection requests. ++ * ++ * protocol ++ * Values: string (XEN_IO_PROTO_ABI_*) ++ * Default Value: XEN_IO_PROTO_ABI_NATIVE ++ * ++ * The machine ABI rules governing the format of all ring request and ++ * response structures. ++ * ++ */ ++ ++enum xenusb_spec_version { ++ XENUSB_VER_UNKNOWN = 0, ++ XENUSB_VER_USB11, ++ XENUSB_VER_USB20, ++ XENUSB_VER_USB30, /* not supported yet */ ++}; ++ ++/* ++ * USB pipe in xenusb_request ++ * ++ * - port number: bits 0-4 ++ * (USB_MAXCHILDREN is 31) ++ * ++ * - operation flag: bit 5 ++ * (0 = submit urb, ++ * 1 = unlink urb) ++ * ++ * - direction: bit 7 ++ * (0 = Host-to-Device [Out] ++ * 1 = Device-to-Host [In]) ++ * ++ * - device address: bits 8-14 ++ * ++ * - endpoint: bits 15-18 ++ * ++ * - pipe type: bits 30-31 ++ * (00 = isochronous, 01 = interrupt, ++ * 10 = control, 11 = bulk) ++ */ ++ ++#define XENUSB_PIPE_PORT_MASK 0x0000001f ++#define XENUSB_PIPE_UNLINK 0x00000020 ++#define XENUSB_PIPE_DIR 0x00000080 ++#define XENUSB_PIPE_DEV_MASK 0x0000007f ++#define XENUSB_PIPE_DEV_SHIFT 8 ++#define XENUSB_PIPE_EP_MASK 0x0000000f ++#define XENUSB_PIPE_EP_SHIFT 15 ++#define XENUSB_PIPE_TYPE_MASK 0x00000003 ++#define XENUSB_PIPE_TYPE_SHIFT 30 ++#define XENUSB_PIPE_TYPE_ISOC 0 ++#define XENUSB_PIPE_TYPE_INT 1 ++#define XENUSB_PIPE_TYPE_CTRL 2 ++#define XENUSB_PIPE_TYPE_BULK 3 ++ ++#define xenusb_pipeportnum(pipe) ((pipe) & XENUSB_PIPE_PORT_MASK) ++#define xenusb_setportnum_pipe(pipe, portnum) ((pipe) | (portnum)) ++ ++#define xenusb_pipeunlink(pipe) ((pipe) & XENUSB_PIPE_UNLINK) ++#define xenusb_pipesubmit(pipe) (!xenusb_pipeunlink(pipe)) ++#define xenusb_setunlink_pipe(pipe) ((pipe) | XENUSB_PIPE_UNLINK) ++ ++#define xenusb_pipein(pipe) ((pipe) & XENUSB_PIPE_DIR) ++#define xenusb_pipeout(pipe) (!xenusb_pipein(pipe)) ++ ++#define xenusb_pipedevice(pipe) \ ++ (((pipe) >> XENUSB_PIPE_DEV_SHIFT) & XENUSB_PIPE_DEV_MASK) ++ ++#define xenusb_pipeendpoint(pipe) \ ++ (((pipe) >> XENUSB_PIPE_EP_SHIFT) & XENUSB_PIPE_EP_MASK) ++ ++#define xenusb_pipetype(pipe) \ ++ (((pipe) >> XENUSB_PIPE_TYPE_SHIFT) & XENUSB_PIPE_TYPE_MASK) ++#define xenusb_pipeisoc(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_ISOC) ++#define xenusb_pipeint(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_INT) ++#define xenusb_pipectrl(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_CTRL) ++#define xenusb_pipebulk(pipe) (xenusb_pipetype(pipe) == XENUSB_PIPE_TYPE_BULK) ++ ++#define XENUSB_MAX_SEGMENTS_PER_REQUEST (16) ++#define XENUSB_MAX_PORTNR 31 ++ ++/* ++ * RING for transferring urbs. ++ */ ++struct xenusb_request_segment { ++ grant_ref_t gref; ++ __u16 offset; ++ __u16 length; ++}; ++ ++struct xenusb_urb_request { ++ __u16 id; /* request id */ ++ __u16 nr_buffer_segs; /* # of urb->transfer_buffer segments */ ++ ++ /* basic urb parameter */ ++ __u32 pipe; ++ __u16 transfer_flags; ++#define XENUSB_SHORT_NOT_OK 0x0001 ++ __u16 buffer_length; ++ union { ++ __u8 ctrl[8]; /* pipe type control */ ++ /* setup packet */ ++ ++ struct { ++ __u16 interval; /* max (1024*8) in usb core */ ++ __u16 start_frame; /* start frame */ ++ __u16 number_of_packets; /* # of ISO packets */ ++ __u16 nr_frame_desc_segs; ++ /* # of iso_frame_desc segments */ ++ } isoc; /* pipe type isochronous */ ++ ++ struct { ++ __u16 interval; /* max (1024*8) in usb core */ ++ __u16 pad[3]; ++ } intr; /* pipe type interrupt */ ++ ++ struct { ++ __u16 unlink_id; /* unlink request id */ ++ __u16 pad[3]; ++ } unlink; /* pipe unlink */ ++ ++ } u; ++ ++ /* urb data segments */ ++ struct xenusb_request_segment seg[XENUSB_MAX_SEGMENTS_PER_REQUEST]; ++}; ++ ++struct xenusb_urb_response { ++ __u16 id; /* request id */ ++ __u16 start_frame; /* start frame (ISO) */ ++ __s32 status; /* status (non-ISO) */ ++ __s32 actual_length; /* actual transfer length */ ++ __s32 error_count; /* number of ISO errors */ ++}; ++ ++DEFINE_RING_TYPES(xenusb_urb, struct xenusb_urb_request, ++ struct xenusb_urb_response); ++#define XENUSB_URB_RING_SIZE __CONST_RING_SIZE(xenusb_urb, PAGE_SIZE) ++ ++/* ++ * RING for notifying connect/disconnect events to frontend ++ */ ++struct xenusb_conn_request { ++ __u16 id; ++}; ++ ++struct xenusb_conn_response { ++ __u16 id; /* request id */ ++ __u8 portnum; /* port number */ ++ __u8 speed; /* usb device speed */ ++#define XENUSB_SPEED_NONE 0 ++#define XENUSB_SPEED_LOW 1 ++#define XENUSB_SPEED_FULL 2 ++#define XENUSB_SPEED_HIGH 3 ++}; ++ ++DEFINE_RING_TYPES(xenusb_conn, struct xenusb_conn_request, ++ struct xenusb_conn_response); ++#define XENUSB_CONN_RING_SIZE __CONST_RING_SIZE(xenusb_conn, PAGE_SIZE) ++ ++#endif /* __XEN_PUBLIC_IO_USBIF_H__ */ +-- +2.16.4 + diff --git a/patches.suse/0002-Add-a-void-suse_kabi_padding-placeholder-to-some-USB.patch b/patches.suse/0002-Add-a-void-suse_kabi_padding-placeholder-to-some-USB.patch new file mode 100644 index 0000000..590fed9 --- /dev/null +++ b/patches.suse/0002-Add-a-void-suse_kabi_padding-placeholder-to-some-USB.patch @@ -0,0 +1,102 @@ +From 7addb4724db6fb1cdf02f5a04cbd296d9b53c26e Mon Sep 17 00:00:00 2001 +From: Oliver Neukum +Date: Thu, 7 Feb 2013 17:29:03 +0100 +Subject: [PATCH 2/3] Add a void* suse_kabi_padding placeholder to some USB + structures +Patch-mainline: Never, kabi +References: fate#312013 + +--- + include/linux/usb.h | 7 +++++++ + include/linux/usb/hcd.h | 2 ++ + include/linux/usb/usbnet.h | 3 +++ + 3 files changed, 12 insertions(+) + +--- a/include/linux/usb.h ++++ b/include/linux/usb.h +@@ -257,6 +257,7 @@ struct usb_interface { + struct device dev; /* interface specific device info */ + struct device *usb_dev; + struct work_struct reset_ws; /* for resets in atomic context */ ++ void *suse_kabi_padding; + }; + #define to_usb_interface(d) container_of(d, struct usb_interface, dev) + +@@ -402,6 +403,7 @@ struct usb_host_bos { + struct usb_ssp_cap_descriptor *ssp_cap; + struct usb_ss_container_id_descriptor *ss_id; + struct usb_ptm_cap_descriptor *ptm_cap; ++ void *suse_kabi_padding; + }; + + int __usb_get_extra_descriptor(char *buffer, unsigned size, +@@ -466,6 +468,7 @@ struct usb_bus { + struct mon_bus *mon_bus; /* non-null when associated */ + int monitored; /* non-zero when monitored */ + #endif ++ void *suse_kabi_padding; + }; + + struct usb_dev_state; +@@ -709,6 +712,8 @@ struct usb_device { + unsigned lpm_disable_count; + + u16 hub_delay; ++ ++ void *suse_kabi_padding; + }; + #define to_usb_device(d) container_of(d, struct usb_device, dev) + +@@ -1201,6 +1206,7 @@ struct usb_driver { + + struct usb_dynids dynids; + struct usbdrv_wrap drvwrap; ++ void *suse_kabi_padding; + unsigned int no_dynamic_id:1; + unsigned int supports_autosuspend:1; + unsigned int disable_hub_initiated_lpm:1; +@@ -1579,6 +1585,7 @@ struct urb { + usb_complete_t complete; /* (in) completion routine */ + struct usb_iso_packet_descriptor iso_frame_desc[0]; + /* (in) ISO ONLY */ ++ void *suse_kabi_padding; + }; + + /* ----------------------------------------------------------------------- */ +--- a/include/linux/usb/hcd.h ++++ b/include/linux/usb/hcd.h +@@ -225,6 +225,7 @@ struct usb_hcd { + * (ohci 32, uhci 1024, ehci 256/512/1024). + */ + ++ void *suse_kabi_padding; + /* The HC driver's private data is stored at the end of + * this structure. + */ +@@ -409,6 +410,7 @@ struct hc_driver { + /* Call for power on/off the port if necessary */ + int (*port_power)(struct usb_hcd *hcd, int portnum, bool enable); + ++ void *suse_kabi_padding; + }; + + static inline int hcd_giveback_urb_in_bh(struct usb_hcd *hcd) +--- a/include/linux/usb/usbnet.h ++++ b/include/linux/usb/usbnet.h +@@ -83,6 +83,8 @@ struct usbnet { + # define EVENT_LINK_CHANGE 11 + # define EVENT_SET_RX_MODE 12 + # define EVENT_NO_IP_ALIGN 13 ++ ++ void *suse_kabi_padding; + }; + + static inline struct usb_driver *driver_of(struct usb_interface *intf) +@@ -172,6 +174,7 @@ struct driver_info { + int out; /* tx endpoint */ + + unsigned long data; /* Misc driver specific data */ ++ void *suse_kabi_padding; + }; + + /* Minidrivers are just drivers using the "usbnet" core as a powerful diff --git a/patches.suse/0002-Add-a-void-suse_kabi_padding-placeholder-to-some-gsp.patch b/patches.suse/0002-Add-a-void-suse_kabi_padding-placeholder-to-some-gsp.patch new file mode 100644 index 0000000..49b2ce0 --- /dev/null +++ b/patches.suse/0002-Add-a-void-suse_kabi_padding-placeholder-to-some-gsp.patch @@ -0,0 +1,33 @@ +From 3658c799acce7b1af2f4d565c7c0122b9aa13a05 Mon Sep 17 00:00:00 2001 +From: Oliver Neukum +Date: Thu, 3 Jul 2014 14:39:17 +0200 +Subject: [PATCH 2/2] Add a void* suse_kabi_padding placeholder to some gspca + structures +Patch-mainline: Never, kabi +References: fate#312013 + +Signed-off-by: Oliver Neukum +--- + drivers/media/usb/gspca/gspca.h | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/media/usb/gspca/gspca.h ++++ b/drivers/media/usb/gspca/gspca.h +@@ -126,6 +126,8 @@ struct sd_desc { + int_pkt_scan is NULL, for cams with non interrupt driven buttons */ + u8 other_input; + #endif ++ ++ void *suse_kabi_padding; + }; + + /* packet types when moving from iso buf to frame buf */ +@@ -211,6 +213,8 @@ struct gspca_dev { + /* (*) These variables are proteced by both usb_lock and queue_lock, + that is any code setting them is holding *both*, which means that + any code getting them needs to hold at least one of them */ ++ ++ void *suse_kabi_padding; + }; + + int gspca_dev_probe(struct usb_interface *intf, diff --git a/patches.suse/0002-MODSIGN-print-appropriate-status-message-when-gettin.patch b/patches.suse/0002-MODSIGN-print-appropriate-status-message-when-gettin.patch new file mode 100644 index 0000000..6810e07 --- /dev/null +++ b/patches.suse/0002-MODSIGN-print-appropriate-status-message-when-gettin.patch @@ -0,0 +1,158 @@ +From 493e881e51d767c98dd1d9583990aee656451510 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Wed, 29 Nov 2017 18:19:44 +0800 +Subject: [PATCH 2/4] MODSIGN: print appropriate status message when getting + UEFI certificates list +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/10082319/ +References: fate#316531, bnc#854875 + +When getting certificates list from UEFI variable, the original error +message shows the state number from UEFI firmware. It's hard to be read +by human. This patch changed the error message to show the appropriate +string. + +The message will be showed as: + +[ 0.788529] MODSIGN: Couldn't get UEFI MokListRT: EFI_NOT_FOUND +[ 0.788537] MODSIGN: Couldn't get UEFI MokListXRT: EFI_NOT_FOUND + +Signed-off-by: Lee, Chun-Yi +--- + certs/load_uefi.c | 43 ++++++++++++++++++++++++++++++------------- + include/linux/efi.h | 25 +++++++++++++++++++++++++ + 2 files changed, 55 insertions(+), 13 deletions(-) + +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -4,6 +4,7 @@ + #include + #include + #include ++#include + #include + #include + #include "internal.h" +@@ -32,6 +33,24 @@ static __init bool uefi_check_ignore_db( + return status == EFI_SUCCESS; + } + ++static __init void print_get_fail(efi_char16_t *char16_str, efi_status_t status) ++{ ++ char *utf8_str; ++ unsigned long utf8_size; ++ ++ if (!char16_str) ++ return; ++ utf8_size = ucs2_utf8size(char16_str) + 1; ++ utf8_str = kmalloc(utf8_size, GFP_KERNEL); ++ if (!utf8_str) ++ return; ++ ucs2_as_utf8(utf8_str, char16_str, utf8_size); ++ ++ pr_info("MODSIGN: Couldn't get UEFI %s: %s\n", ++ utf8_str, efi_status_to_str(status)); ++ kfree(utf8_str); ++} ++ + /* + * Get a certificate list blob from the named EFI variable. + */ +@@ -45,25 +64,29 @@ static __init void *get_cert_list(efi_ch + + status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb); + if (status != EFI_BUFFER_TOO_SMALL) { +- pr_err("Couldn't get size: 0x%lx\n", status); +- return NULL; ++ if (status != EFI_NOT_FOUND) ++ pr_err("Couldn't get size: 0x%lx\n", status); ++ goto err; + } + + db = kmalloc(lsize, GFP_KERNEL); + if (!db) { + pr_err("Couldn't allocate memory for uefi cert list\n"); +- return NULL; ++ goto err; + } + + status = efi.get_variable(name, guid, NULL, &lsize, db); + if (status != EFI_SUCCESS) { + kfree(db); + pr_err("Error reading db var: 0x%lx\n", status); +- return NULL; ++ goto err; + } + + *size = lsize; + return db; ++err: ++ print_get_fail(name, status); ++ return NULL; + } + + /* +@@ -153,9 +176,7 @@ static int __init load_uefi_certs(void) + */ + if (!uefi_check_ignore_db()) { + db = get_cert_list(L"db", &secure_var, &dbsize); +- if (!db) { +- pr_err("MODSIGN: Couldn't get UEFI db list\n"); +- } else { ++ if (db) { + rc = parse_efi_signature_list("UEFI:db", + db, dbsize, get_handler_for_db); + if (rc) +@@ -165,9 +186,7 @@ static int __init load_uefi_certs(void) + } + + dbx = get_cert_list(L"dbx", &secure_var, &dbxsize); +- if (!dbx) { +- pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); +- } else { ++ if (dbx) { + rc = parse_efi_signature_list("UEFI:dbx", + dbx, dbxsize, + get_handler_for_dbx); +@@ -181,9 +200,7 @@ static int __init load_uefi_certs(void) + return 0; + + mok = get_cert_list(L"MokListRT", &mok_var, &moksize); +- if (!mok) { +- pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); +- } else { ++ if (mok) { + rc = parse_efi_signature_list("UEFI:MokListRT", + mok, moksize, get_handler_for_db); + if (rc) +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -1640,4 +1640,29 @@ struct linux_efi_memreserve { + #define EFI_MEMRESERVE_COUNT(size) (((size) - sizeof(struct linux_efi_memreserve)) \ + / sizeof(((struct linux_efi_memreserve *)0)->entry[0])) + ++#define EFI_STATUS_STR(_status) \ ++ case EFI_##_status: \ ++ return "EFI_" __stringify(_status); \ ++ ++static inline char * ++efi_status_to_str(efi_status_t status) ++{ ++ switch (status) { ++ EFI_STATUS_STR(SUCCESS) ++ EFI_STATUS_STR(LOAD_ERROR) ++ EFI_STATUS_STR(INVALID_PARAMETER) ++ EFI_STATUS_STR(UNSUPPORTED) ++ EFI_STATUS_STR(BAD_BUFFER_SIZE) ++ EFI_STATUS_STR(BUFFER_TOO_SMALL) ++ EFI_STATUS_STR(NOT_READY) ++ EFI_STATUS_STR(DEVICE_ERROR) ++ EFI_STATUS_STR(WRITE_PROTECTED) ++ EFI_STATUS_STR(OUT_OF_RESOURCES) ++ EFI_STATUS_STR(NOT_FOUND) ++ EFI_STATUS_STR(ABORTED) ++ EFI_STATUS_STR(SECURITY_VIOLATION) ++ } ++ ++ return ""; ++} + #endif /* _LINUX_EFI_H */ diff --git a/patches.suse/0002-PCI-mobiveil-uniform-the-register-accessors.patch b/patches.suse/0002-PCI-mobiveil-uniform-the-register-accessors.patch new file mode 100644 index 0000000..936565b --- /dev/null +++ b/patches.suse/0002-PCI-mobiveil-uniform-the-register-accessors.patch @@ -0,0 +1,261 @@ +From d18d0dd5e43b0486cb5ba8e0f48d9307906a2389 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:08:34 +0000 +Subject: [PATCH 02/26] PCI: mobiveil: uniform the register accessors + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +It's confused that R/W some registers by csr_readl()/csr_writel(), +while others by read_paged_register()/write_paged_register(). +Actually the low 3KB of 4KB PCIe configure space can be accessed +directly and high 1KB is paging area. So this patch uniformed the +register accessors to csr_readl() and csr_writel() by comparing +the register offset with page access boundary 3KB in the accessor +internal. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 179 +++++++++++++++++++++++++++------------ + 1 file changed, 124 insertions(+), 55 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 19541ad27fb2..6194ef10e4eb 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -47,7 +47,6 @@ + #define PAGE_SEL_SHIFT 13 + #define PAGE_SEL_MASK 0x3f + #define PAGE_LO_MASK 0x3ff +-#define PAGE_SEL_EN 0xc00 + #define PAGE_SEL_OFFSET_SHIFT 10 + + #define PAB_AXI_PIO_CTRL 0x0840 +@@ -117,6 +116,12 @@ + #define LINK_WAIT_MIN 90000 + #define LINK_WAIT_MAX 100000 + ++#define PAGED_ADDR_BNDRY 0xc00 ++#define OFFSET_TO_PAGE_ADDR(off) \ ++ ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) ++#define OFFSET_TO_PAGE_IDX(off) \ ++ ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) ++ + struct mobiveil_msi { /* MSI information */ + struct mutex lock; /* protect bitmap variable */ + struct irq_domain *msi_domain; +@@ -145,15 +150,119 @@ struct mobiveil_pcie { + struct mobiveil_msi msi; + }; + +-static inline void csr_writel(struct mobiveil_pcie *pcie, const u32 value, +- const u32 reg) ++/* ++ * mobiveil_pcie_sel_page - routine to access paged register ++ * ++ * Registers whose address greater than PAGED_ADDR_BNDRY (0xc00) are paged, ++ * for this scheme to work extracted higher 6 bits of the offset will be ++ * written to pg_sel field of PAB_CTRL register and rest of the lower 10 ++ * bits enabled with PAGED_ADDR_BNDRY are used as offset of the register. ++ */ ++static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) + { +- writel_relaxed(value, pcie->csr_axi_slave_base + reg); ++ u32 val; ++ ++ val = readl(pcie->csr_axi_slave_base + PAB_CTRL); ++ val &= ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT); ++ val |= (pg_idx & PAGE_SEL_MASK) << PAGE_SEL_SHIFT; ++ ++ writel(val, pcie->csr_axi_slave_base + PAB_CTRL); + } + +-static inline u32 csr_readl(struct mobiveil_pcie *pcie, const u32 reg) ++static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off) + { +- return readl_relaxed(pcie->csr_axi_slave_base + reg); ++ if (off < PAGED_ADDR_BNDRY) { ++ /* For directly accessed registers, clear the pg_sel field */ ++ mobiveil_pcie_sel_page(pcie, 0); ++ return pcie->csr_axi_slave_base + off; ++ } ++ ++ mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); ++ return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); ++} ++ ++static int mobiveil_pcie_read(void __iomem *addr, int size, u32 *val) ++{ ++ if ((uintptr_t)addr & (size - 1)) { ++ *val = 0; ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ } ++ ++ switch (size) { ++ case 4: ++ *val = readl(addr); ++ break; ++ case 2: ++ *val = readw(addr); ++ break; ++ case 1: ++ *val = readb(addr); ++ break; ++ default: ++ *val = 0; ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ } ++ ++ return PCIBIOS_SUCCESSFUL; ++} ++ ++static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val) ++{ ++ if ((uintptr_t)addr & (size - 1)) ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ ++ switch (size) { ++ case 4: ++ writel(val, addr); ++ break; ++ case 2: ++ writew(val, addr); ++ break; ++ case 1: ++ writeb(val, addr); ++ break; ++ default: ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ } ++ ++ return PCIBIOS_SUCCESSFUL; ++} ++ ++static u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) ++{ ++ void *addr; ++ u32 val; ++ int ret; ++ ++ addr = mobiveil_pcie_comp_addr(pcie, off); ++ ++ ret = mobiveil_pcie_read(addr, size, &val); ++ if (ret) ++ dev_err(&pcie->pdev->dev, "read CSR address failed\n"); ++ ++ return val; ++} ++ ++static void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size) ++{ ++ void *addr; ++ int ret; ++ ++ addr = mobiveil_pcie_comp_addr(pcie, off); ++ ++ ret = mobiveil_pcie_write(addr, size, val); ++ if (ret) ++ dev_err(&pcie->pdev->dev, "write CSR address failed\n"); ++} ++ ++static u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) ++{ ++ return csr_read(pcie, off, 0x4); ++} ++ ++static void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) ++{ ++ csr_write(pcie, val, off, 0x4); + } + + static bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) +@@ -349,45 +458,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) + return 0; + } + +-/* +- * select_paged_register - routine to access paged register of root complex +- * +- * registers of RC are paged, for this scheme to work +- * extracted higher 6 bits of the offset will be written to pg_sel +- * field of PAB_CTRL register and rest of the lower 10 bits enabled with +- * PAGE_SEL_EN are used as offset of the register. +- */ +-static void select_paged_register(struct mobiveil_pcie *pcie, u32 offset) +-{ +- int pab_ctrl_dw, pg_sel; +- +- /* clear pg_sel field */ +- pab_ctrl_dw = csr_readl(pcie, PAB_CTRL); +- pab_ctrl_dw = (pab_ctrl_dw & ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT)); +- +- /* set pg_sel field */ +- pg_sel = (offset >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK; +- pab_ctrl_dw |= ((pg_sel << PAGE_SEL_SHIFT)); +- csr_writel(pcie, pab_ctrl_dw, PAB_CTRL); +-} +- +-static void write_paged_register(struct mobiveil_pcie *pcie, +- u32 val, u32 offset) +-{ +- u32 off = (offset & PAGE_LO_MASK) | PAGE_SEL_EN; +- +- select_paged_register(pcie, offset); +- csr_writel(pcie, val, off); +-} +- +-static u32 read_paged_register(struct mobiveil_pcie *pcie, u32 offset) +-{ +- u32 off = (offset & PAGE_LO_MASK) | PAGE_SEL_EN; +- +- select_paged_register(pcie, offset); +- return csr_readl(pcie, off); +-} +- + static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, + int pci_addr, u32 type, u64 size) + { +@@ -404,19 +474,19 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, + pio_ctrl_val = csr_readl(pcie, PAB_PEX_PIO_CTRL); + csr_writel(pcie, + pio_ctrl_val | (1 << PIO_ENABLE_SHIFT), PAB_PEX_PIO_CTRL); +- amap_ctrl_dw = read_paged_register(pcie, PAB_PEX_AMAP_CTRL(win_num)); ++ amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); + amap_ctrl_dw = (amap_ctrl_dw | (type << AMAP_CTRL_TYPE_SHIFT)); + amap_ctrl_dw = (amap_ctrl_dw | (1 << AMAP_CTRL_EN_SHIFT)); + +- write_paged_register(pcie, amap_ctrl_dw | lower_32_bits(size64), +- PAB_PEX_AMAP_CTRL(win_num)); ++ csr_writel(pcie, amap_ctrl_dw | lower_32_bits(size64), ++ PAB_PEX_AMAP_CTRL(win_num)); + +- write_paged_register(pcie, upper_32_bits(size64), +- PAB_EXT_PEX_AMAP_SIZEN(win_num)); ++ csr_writel(pcie, upper_32_bits(size64), ++ PAB_EXT_PEX_AMAP_SIZEN(win_num)); + +- write_paged_register(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); +- write_paged_register(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); +- write_paged_register(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); ++ csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); ++ csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); ++ csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); + } + + /* +@@ -444,8 +514,7 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, + csr_writel(pcie, 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | + lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); + +- write_paged_register(pcie, upper_32_bits(size64), +- PAB_EXT_AXI_AMAP_SIZE(win_num)); ++ csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); + + /* + * program AXI window base with appropriate value in +-- +2.11.0 + diff --git a/patches.suse/0002-btrfs-Remove-fsid-metadata_fsid-fields-from-btrfs_in.patch b/patches.suse/0002-btrfs-Remove-fsid-metadata_fsid-fields-from-btrfs_in.patch new file mode 100644 index 0000000..f820543 --- /dev/null +++ b/patches.suse/0002-btrfs-Remove-fsid-metadata_fsid-fields-from-btrfs_in.patch @@ -0,0 +1,331 @@ +From d0d29e8523e181fa7b766c3ace93bb501f983e02 Mon Sep 17 00:00:00 2001 +From: Nikolay Borisov +Date: Tue, 28 Aug 2018 14:55:30 +0300 +Subject: [PATCH 2/6] btrfs: Remove fsid/metadata_fsid fields from btrfs_info +References: fate#325871 +Patch-mainline: Submitted, awaiting review + +Currently btrfs_fs_info structure contains a copy of the +fsid/metadata_uuid fields. Same values are also contained in the +btrfs_fs_devices structure which fs_info has a reference to. Let's +reduce duplication by removing the fields from fs_info and always refer +to the ones in fs_devices. No functional changes. + +Signed-off-by: Nikolay Borisov +--- + fs/btrfs/check-integrity.c | 2 +- + fs/btrfs/ctree.c | 11 ++++++----- + fs/btrfs/ctree.h | 2 -- + fs/btrfs/disk-io.c | 23 ++++++++++++----------- + fs/btrfs/ioctl.c | 5 +++-- + fs/btrfs/super.c | 2 +- + fs/btrfs/volumes.c | 24 ++++++++++++------------ + include/trace/events/btrfs.h | 8 ++++---- + 8 files changed, 39 insertions(+), 38 deletions(-) + +--- a/fs/btrfs/check-integrity.c ++++ b/fs/btrfs/check-integrity.c +@@ -1739,7 +1739,7 @@ static int btrfsic_test_for_metadata(str + num_pages = state->metablock_size >> PAGE_SHIFT; + h = (struct btrfs_header *)datav[0]; + +- if (memcmp(h->fsid, fs_info->fsid, BTRFS_UUID_SIZE)) ++ if (memcmp(h->fsid, fs_info->fs_devices->fsid, BTRFS_UUID_SIZE)) + return 1; + + for (i = 0; i < num_pages; i++) { +--- a/fs/btrfs/ctree.c ++++ b/fs/btrfs/ctree.c +@@ -25,6 +25,7 @@ + #include "print-tree.h" + #include "locking.h" + #include "qgroup.h" ++#include "volumes.h" + + static int split_node(struct btrfs_trans_handle *trans, struct btrfs_root + *root, struct btrfs_path *path, int level); +@@ -275,7 +276,7 @@ int btrfs_copy_root(struct btrfs_trans_h + else + btrfs_set_header_owner(cow, new_root_objectid); + +- write_extent_buffer_fsid(cow, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(cow, fs_info->fs_devices->metadata_uuid); + + WARN_ON(btrfs_header_generation(buf) > trans->transid); + if (new_root_objectid == BTRFS_TREE_RELOC_OBJECTID) +@@ -1150,7 +1151,7 @@ static noinline int __btrfs_cow_block(st + else + btrfs_set_header_owner(cow, root->root_key.objectid); + +- write_extent_buffer_fsid(cow, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(cow, fs_info->fs_devices->metadata_uuid); + + ret = update_ref_for_cow(trans, root, buf, cow, &last_ref); + if (ret) { +@@ -3392,7 +3393,7 @@ static noinline int insert_new_root(stru + btrfs_set_header_backref_rev(c, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(c, root->root_key.objectid); + +- write_extent_buffer_fsid(c, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(c, fs_info->fs_devices->metadata_uuid); + write_extent_buffer_chunk_tree_uuid(c, fs_info->chunk_tree_uuid); + + btrfs_set_node_key(c, &lower_key, 0); +@@ -3527,7 +3528,7 @@ static noinline int split_node(struct bt + btrfs_set_header_generation(split, trans->transid); + btrfs_set_header_backref_rev(split, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(split, root->root_key.objectid); +- write_extent_buffer_fsid(split, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(split, fs_info->fs_devices->metadata_uuid); + write_extent_buffer_chunk_tree_uuid(split, fs_info->chunk_tree_uuid); + + ret = tree_mod_log_eb_copy(fs_info, split, c, 0, mid, c_nritems - mid); +@@ -4320,7 +4321,7 @@ again: + btrfs_set_header_backref_rev(right, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(right, root->root_key.objectid); + btrfs_set_header_level(right, 0); +- write_extent_buffer_fsid(right, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(right, fs_info->fs_devices->metadata_uuid); + write_extent_buffer_chunk_tree_uuid(right, fs_info->chunk_tree_uuid); + + if (split == 0) { +--- a/fs/btrfs/ctree.h ++++ b/fs/btrfs/ctree.h +@@ -728,8 +728,6 @@ struct btrfs_delayed_root; + #define BTRFS_FS_BALANCE_RUNNING 18 + + struct btrfs_fs_info { +- u8 fsid[BTRFS_FSID_SIZE]; +- u8 metadata_fsid[BTRFS_FSID_SIZE]; /* UUID written to btree blocks */ + u8 chunk_tree_uuid[BTRFS_UUID_SIZE]; + unsigned long flags; + struct btrfs_root *extent_root; +--- a/fs/btrfs/disk-io.c ++++ b/fs/btrfs/disk-io.c +@@ -578,7 +578,7 @@ static int csum_dirty_buffer(struct btrf + if (WARN_ON(!PageUptodate(page))) + return -EUCLEAN; + +- ASSERT(memcmp_extent_buffer(eb, fs_info->metadata_fsid, ++ ASSERT(memcmp_extent_buffer(eb, fs_info->fs_devices->metadata_uuid, + btrfs_header_fsid(), BTRFS_FSID_SIZE) == 0); + + return csum_tree_block(fs_info, eb, 0); +@@ -1506,7 +1506,7 @@ struct btrfs_root *btrfs_create_tree(str + btrfs_set_header_owner(leaf, objectid); + root->node = leaf; + +- write_extent_buffer_fsid(leaf, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(leaf, fs_info->fs_devices->metadata_uuid); + write_extent_buffer_chunk_tree_uuid(leaf, fs_info->chunk_tree_uuid); + btrfs_mark_buffer_dirty(leaf); + +@@ -1587,7 +1587,7 @@ static struct btrfs_root *alloc_log_tree + btrfs_set_header_owner(leaf, BTRFS_TREE_LOG_OBJECTID); + root->node = leaf; + +- write_extent_buffer_fsid(root->node, fs_info->metadata_fsid); ++ write_extent_buffer_fsid(root->node, fs_info->fs_devices->metadata_uuid); + btrfs_mark_buffer_dirty(root->node); + btrfs_tree_unlock(root->node); + return root; +@@ -2867,12 +2867,12 @@ int open_ctree(struct super_block *sb, + sizeof(*fs_info->super_for_commit)); + brelse(bh); + +- memcpy(fs_info->fsid, fs_info->super_copy->fsid, BTRFS_FSID_SIZE); ++ ASSERT(!memcmp(fs_info->fs_devices->fsid, fs_info->super_copy->fsid, ++ BTRFS_FSID_SIZE)); + if (btrfs_fs_incompat(fs_info, METADATA_UUID)) { +- memcpy(fs_info->metadata_fsid, +- fs_info->super_copy->metadata_uuid, BTRFS_FSID_SIZE); +- } else { +- memcpy(fs_info->metadata_fsid, fs_info->fsid, BTRFS_FSID_SIZE); ++ ASSERT(!memcmp(fs_info->fs_devices->metadata_uuid, ++ fs_info->super_copy->metadata_uuid, ++ BTRFS_FSID_SIZE)); + } + + ret = btrfs_check_super_valid(fs_info); +@@ -2994,7 +2994,7 @@ int open_ctree(struct super_block *sb, + + sb->s_blocksize = sectorsize; + sb->s_blocksize_bits = blksize_bits(sectorsize); +- memcpy(&sb->s_uuid, fs_info->fsid, BTRFS_FSID_SIZE); ++ memcpy(&sb->s_uuid, fs_info->fs_devices->fsid, BTRFS_FSID_SIZE); + + mutex_lock(&fs_info->chunk_mutex); + ret = btrfs_read_sys_array(fs_info); +@@ -4272,10 +4272,11 @@ static int btrfs_check_super_valid(struc + ret = -EINVAL; + } + +- if (memcmp(fs_info->metadata_fsid, sb->dev_item.fsid, BTRFS_UUID_SIZE) != 0) { ++ if (memcmp(fs_info->fs_devices->metadata_uuid, sb->dev_item.fsid, ++ BTRFS_UUID_SIZE) != 0) { + btrfs_err(fs_info, + "dev_item UUID does not match fsid: %pU != %pU", +- fs_info->fsid, sb->dev_item.fsid); ++ fs_info->fs_devices->fsid, sb->dev_item.fsid); + ret = -EINVAL; + } + +--- a/fs/btrfs/ioctl.c ++++ b/fs/btrfs/ioctl.c +@@ -510,7 +510,7 @@ static noinline int create_subvol(struct + btrfs_set_header_backref_rev(leaf, BTRFS_MIXED_BACKREF_REV); + btrfs_set_header_owner(leaf, objectid); + +- write_extent_buffer_fsid(leaf, fs_info->fsid); ++ write_extent_buffer_fsid(leaf, fs_info->fs_devices->metadata_uuid); + write_extent_buffer_chunk_tree_uuid(leaf, fs_info->chunk_tree_uuid); + btrfs_mark_buffer_dirty(leaf); + +@@ -2794,7 +2794,8 @@ static long btrfs_ioctl_fs_info(struct b + + mutex_lock(&fs_devices->device_list_mutex); + fi_args->num_devices = fs_devices->num_devices; +- memcpy(&fi_args->fsid, fs_info->fsid, sizeof(fi_args->fsid)); ++ memcpy(&fi_args->fsid, fs_info->fs_devices->fsid, ++ sizeof(fi_args->fsid)); + + list_for_each_entry(device, &fs_devices->devices, dev_list) { + if (device->devid > fi_args->max_id) +--- a/fs/btrfs/super.c ++++ b/fs/btrfs/super.c +@@ -2078,7 +2078,7 @@ static int btrfs_statfs(struct dentry *d + u64 total_free_data = 0; + u64 total_free_meta = 0; + int bits = dentry->d_sb->s_blocksize_bits; +- __be32 *fsid = (__be32 *)fs_info->fsid; ++ __be32 *fsid = (__be32 *)fs_info->fs_devices->fsid; + unsigned factor = 1; + struct btrfs_block_rsv *block_rsv = &fs_info->global_block_rsv; + int ret; +--- a/fs/btrfs/volumes.c ++++ b/fs/btrfs/volumes.c +@@ -173,14 +173,14 @@ static struct btrfs_fs_devices *__alloc_ + /** + * alloc_fs_devices - allocate struct btrfs_fs_devices + * @fsid: if not NULL, copy the uuid to fs_devices::fsid +- * @metadata_fsid: if not NULL, copy the uuid to fs_devices::metadata_fsid ++ * @metadata_uuid: if not NULL, copy the uuid to fs_devices::metadata_uuid + * + * Return: a pointer to a new &struct btrfs_fs_devices on success; + * ERR_PTR() on error. Returned struct is not linked onto any lists and + * can be destroyed with kfree() right away. + */ + static struct btrfs_fs_devices *alloc_fs_devices(const u8 *fsid, +- const u8 *metadata_fsid) ++ const u8 *metadata_uuid) + { + struct btrfs_fs_devices *fs_devs; + +@@ -193,8 +193,8 @@ static struct btrfs_fs_devices *alloc_fs + else + generate_random_uuid(fs_devs->fsid); + +- if (metadata_fsid) +- memcpy(fs_devs->metadata_uuid, metadata_fsid, BTRFS_FSID_SIZE); ++ if (metadata_uuid) ++ memcpy(fs_devs->metadata_uuid, metadata_uuid, BTRFS_FSID_SIZE); + else + memcpy(fs_devs->metadata_uuid, fs_devs->fsid, BTRFS_FSID_SIZE); + +@@ -279,16 +279,16 @@ static noinline struct btrfs_device *__f + } + + static noinline struct btrfs_fs_devices *find_fsid(u8 *fsid, +- const u8 *metadata_fsid) ++ const u8 *metadata_uuid) + { + struct btrfs_fs_devices *fs_devices; + + ASSERT(fsid); + + list_for_each_entry(fs_devices, &fs_uuids, list) { +- if (metadata_fsid) { ++ if (metadata_uuid) { + if (memcmp(fsid, fs_devices->fsid, BTRFS_FSID_SIZE) == 0 +- && memcmp(metadata_fsid, fs_devices->metadata_uuid, ++ && memcmp(metadata_uuid, fs_devices->metadata_uuid, + BTRFS_FSID_SIZE) == 0) + return fs_devices; + } else { +@@ -1750,7 +1750,8 @@ static int btrfs_add_device(struct btrfs + ptr = btrfs_device_uuid(dev_item); + write_extent_buffer(leaf, device->uuid, ptr, BTRFS_UUID_SIZE); + ptr = btrfs_device_fsid(dev_item); +- write_extent_buffer(leaf, fs_info->metadata_fsid, ptr, BTRFS_UUID_SIZE); ++ write_extent_buffer(leaf, fs_info->fs_devices->metadata_uuid, ptr, ++ BTRFS_UUID_SIZE); + btrfs_mark_buffer_dirty(leaf); + + ret = 0; +@@ -2267,9 +2268,7 @@ static int btrfs_prepare_sprout(struct b + fs_devices->seed = seed_devices; + + generate_random_uuid(fs_devices->fsid); +- memcpy(fs_info->fsid, fs_devices->fsid, BTRFS_FSID_SIZE); + memcpy(fs_devices->metadata_uuid, fs_devices->fsid, BTRFS_FSID_SIZE); +- memcpy(fs_info->metadata_fsid, fs_devices->fsid, BTRFS_FSID_SIZE); + memcpy(disk_super->fsid, fs_devices->fsid, BTRFS_FSID_SIZE); + mutex_unlock(&fs_info->fs_devices->device_list_mutex); + +@@ -2514,7 +2513,7 @@ int btrfs_init_new_device(struct btrfs_f + * so rename the fsid on the sysfs + */ + snprintf(fsid_buf, BTRFS_UUID_UNPARSED_SIZE, "%pU", +- fs_info->fsid); ++ fs_info->fs_devices->fsid); + if (kobject_rename(&fs_info->fs_devices->fsid_kobj, fsid_buf)) + btrfs_warn(fs_info, + "sysfs: failed to create fsid for sprout"); +@@ -6735,7 +6734,8 @@ static int read_one_dev(struct btrfs_fs_ + read_extent_buffer(leaf, fs_uuid, btrfs_device_fsid(dev_item), + BTRFS_UUID_SIZE); + +- if (memcmp(fs_uuid, fs_info->metadata_fsid, BTRFS_UUID_SIZE)) { ++ if (memcmp(fs_uuid, fs_info->fs_devices->metadata_uuid, ++ BTRFS_UUID_SIZE)) { + fs_devices = open_seed_devices(fs_info, fs_uuid); + if (IS_ERR(fs_devices)) + return PTR_ERR(fs_devices); +--- a/include/trace/events/btrfs.h ++++ b/include/trace/events/btrfs.h +@@ -78,7 +78,7 @@ struct prelim_ref; + #define TP_STRUCT__entry_fsid __array(u8, fsid, BTRFS_UUID_SIZE) + + #define TP_fast_assign_fsid(fs_info) \ +- memcpy(__entry->fsid, fs_info->fsid, BTRFS_UUID_SIZE) ++ memcpy(__entry->fsid, fs_info->fs_devices->fsid, BTRFS_UUID_SIZE) + + #define TP_STRUCT__entry_btrfs(args...) \ + TP_STRUCT__entry( \ +@@ -628,7 +628,7 @@ TRACE_EVENT(btrfs_add_block_group, + ), + + TP_fast_assign( +- memcpy(__entry->fsid, fs_info->fsid, BTRFS_UUID_SIZE); ++ memcpy(__entry->fsid, fs_info->fs_devices->fsid, BTRFS_UUID_SIZE); + __entry->offset = block_group->key.objectid; + __entry->size = block_group->key.offset; + __entry->flags = block_group->flags; +@@ -983,7 +983,7 @@ TRACE_EVENT(btrfs_trigger_flush, + ), + + TP_fast_assign( +- memcpy(__entry->fsid, fs_info->fsid, BTRFS_UUID_SIZE); ++ memcpy(__entry->fsid, fs_info->fs_devices->fsid, BTRFS_UUID_SIZE); + __entry->flags = flags; + __entry->bytes = bytes; + __entry->flush = flush; +@@ -1025,7 +1025,7 @@ TRACE_EVENT(btrfs_flush_space, + ), + + TP_fast_assign( +- memcpy(__entry->fsid, fs_info->fsid, BTRFS_UUID_SIZE); ++ memcpy(__entry->fsid, fs_info->fs_devices->fsid, BTRFS_UUID_SIZE); + __entry->flags = flags; + __entry->num_bytes = num_bytes; + __entry->orig_bytes = orig_bytes; diff --git a/patches.suse/0002-efi-Add-EFI-signature-data-types.patch b/patches.suse/0002-efi-Add-EFI-signature-data-types.patch new file mode 100644 index 0000000..f7a9276 --- /dev/null +++ b/patches.suse/0002-efi-Add-EFI-signature-data-types.patch @@ -0,0 +1,61 @@ +From d3bb93449901edec76a2322d6273e061af8ccb67 Mon Sep 17 00:00:00 2001 +From: Dave Howells +Date: Thu, 3 Aug 2017 16:17:45 +0100 +Subject: [PATCH 2/6] efi: Add EFI signature data types + +Patch-mainline: Queued in subsystem maintainer repository +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git +Git-commit: d3bb93449901edec76a2322d6273e061af8ccb67 +References: fate#314508 + +Add the data types that are used for containing hashes, keys and +certificates for cryptographic verification along with their corresponding +type GUIDs. + +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + include/linux/efi.h | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -614,6 +614,10 @@ void efi_native_runtime_setup(void); + #define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) + #define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) + ++#define EFI_CERT_SHA256_GUID EFI_GUID(0xc1c41626, 0x504c, 0x4092, 0xac, 0xa9, 0x41, 0xf9, 0x36, 0x93, 0x43, 0x28) ++#define EFI_CERT_X509_GUID EFI_GUID(0xa5c059a1, 0x94e4, 0x4aa7, 0x87, 0xb5, 0xab, 0x15, 0x5c, 0x2b, 0xf0, 0x72) ++#define EFI_CERT_X509_SHA256_GUID EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, 0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed) ++ + /* + * This GUID is used to pass to the kernel proper the struct screen_info + * structure that was populated by the stub based on the GOP protocol instance +@@ -873,6 +877,27 @@ typedef struct { + efi_memory_desc_t entry[0]; + } efi_memory_attributes_table_t; + ++typedef struct { ++ efi_guid_t signature_owner; ++ u8 signature_data[]; ++} efi_signature_data_t; ++ ++typedef struct { ++ efi_guid_t signature_type; ++ u32 signature_list_size; ++ u32 signature_header_size; ++ u32 signature_size; ++ u8 signature_header[]; ++ /* efi_signature_data_t signatures[][] */ ++} efi_signature_list_t; ++ ++typedef u8 efi_sha256_hash_t[32]; ++ ++typedef struct { ++ efi_sha256_hash_t to_be_signed_hash; ++ efi_time_t time_of_revocation; ++} efi_cert_x509_sha256_t; ++ + /* + * All runtime access to EFI goes through this structure: + */ diff --git a/patches.suse/0002-hibernate-avoid-the-data-in-hidden-area-to-be-snapsh.patch b/patches.suse/0002-hibernate-avoid-the-data-in-hidden-area-to-be-snapsh.patch new file mode 100644 index 0000000..6480d4f --- /dev/null +++ b/patches.suse/0002-hibernate-avoid-the-data-in-hidden-area-to-be-snapsh.patch @@ -0,0 +1,97 @@ +From f5b5360dede9682551f09bf505ee2f2c79985c92 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Mon, 11 Dec 2017 18:41:51 +0800 +Subject: [PATCH 02/11] hibernate: avoid the data in hidden area to be + snapshotted +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +The sensitive data in hidden area should not be snapshotted by hibernate. +On the other hand, the hidden area in boot kernel should be cleaned before +the system be restored to target kernel. + +Signed-off-by: Lee, Chun-Yi +--- + kernel/power/snapshot.c | 7 +++++++ + kernel/power/swap.c | 6 ++++++ + kernel/power/user.c | 3 +++ + 3 files changed, 16 insertions(+) + +--- a/kernel/power/snapshot.c ++++ b/kernel/power/snapshot.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -1220,6 +1221,9 @@ static struct page *saveable_highmem_pag + + BUG_ON(!PageHighMem(page)); + ++ if (page_is_hidden(page)) ++ return NULL; ++ + if (swsusp_page_is_forbidden(page) || swsusp_page_is_free(page) || + PageReserved(page)) + return NULL; +@@ -1282,6 +1286,9 @@ static struct page *saveable_page(struct + + BUG_ON(PageHighMem(page)); + ++ if (page_is_hidden(page)) ++ return NULL; ++ + if (swsusp_page_is_forbidden(page) || swsusp_page_is_free(page)) + return NULL; + +--- a/kernel/power/swap.c ++++ b/kernel/power/swap.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include "power.h" + +@@ -1100,6 +1101,9 @@ static int load_image(struct swap_map_ha + snapshot_write_finalize(snapshot); + if (!snapshot_image_loaded(snapshot)) + ret = -ENODATA; ++ ++ /* clean the hidden area in boot kernel */ ++ clean_hidden_area(); + } + swsusp_show_speed(start, stop, nr_to_read, "Read"); + return ret; +@@ -1461,6 +1465,8 @@ out_finish: + } + } + } ++ /* clean the hidden area in boot kernel */ ++ clean_hidden_area(); + } + swsusp_show_speed(start, stop, nr_to_read, "Read"); + out_clean: +--- a/kernel/power/user.c ++++ b/kernel/power/user.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + + #include + +@@ -270,6 +271,8 @@ static long snapshot_ioctl(struct file * + error = -EPERM; + break; + } ++ /* clean the hidden area in boot kernel */ ++ clean_hidden_area(); + error = hibernation_restore(data->platform_support); + break; + diff --git a/patches.suse/0002-mmc-sdhci-correct-the-maximum-timeout-when-enable-CM.patch b/patches.suse/0002-mmc-sdhci-correct-the-maximum-timeout-when-enable-CM.patch new file mode 100644 index 0000000..92137a8 --- /dev/null +++ b/patches.suse/0002-mmc-sdhci-correct-the-maximum-timeout-when-enable-CM.patch @@ -0,0 +1,53 @@ +From: BOUGH CHEN +Date: Mon, 7 Jan 2019 10:11:36 +0000 +Subject: mmc: sdhci: correct the maximum timeout when enable CMDQ + +Git-commit: ac60ee24931a2a79c95d79319087eda5ee1d4639 +Patch-mainline: Queued +Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git +References: bsc#1123999 + +Change to use sdhci_set_timeout() to set the maximum timeout, so that +the host can use it's own set_timeout() callback to set the maximum +timeout if the host has. + +Signed-off-by: Haibo Chen +Acked-by: Adrian Hunter +Signed-off-by: Ulf Hansson +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/mmc/host/sdhci.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -716,7 +716,7 @@ static u32 sdhci_sdma_address(struct sdh + static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) + { + u8 count; +- struct mmc_data *data = cmd->data; ++ struct mmc_data *data; + unsigned target_timeout, current_timeout; + + /* +@@ -728,6 +728,11 @@ static u8 sdhci_calc_timeout(struct sdhc + if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) + return 0xE; + ++ /* Unspecified command, asume max */ ++ if (cmd == NULL) ++ return 0xE; ++ ++ data = cmd->data; + /* Unspecified timeout, assume max */ + if (!data && !cmd->busy_timeout) + return 0xE; +@@ -3100,7 +3105,7 @@ void sdhci_cqe_enable(struct mmc_host *m + SDHCI_BLOCK_SIZE); + + /* Set maximum timeout */ +- sdhci_writeb(host, 0xE, SDHCI_TIMEOUT_CONTROL); ++ sdhci_set_timeout(host, NULL); + + host->ier = host->cqe_ier; + diff --git a/patches.suse/0002-rbd-make-sure-pages-are-freed-by-libceph.patch b/patches.suse/0002-rbd-make-sure-pages-are-freed-by-libceph.patch new file mode 100644 index 0000000..3405140 --- /dev/null +++ b/patches.suse/0002-rbd-make-sure-pages-are-freed-by-libceph.patch @@ -0,0 +1,30 @@ +From: Luis Henriques +Date: Fri, 23 Jun 2017 16:22:19 +0100 +Subject: rbd: make sure pages are freed by libceph +Patch-mainline: Never, it fixes SUSE-specific code that has never been + merged upstream +References: bsc#1045596 + +Changes made for FATE#321625 modified the rbd_dev_getxattr so that the +pages aren't tracked in a struct rbd_obj_request anymore, but in struct +ceph_osd_request instead. By setting the 'own_pages' flag to true when +calling osd_req_op_xattr_response_data_pages ensures that libceph will +take care of freeing pages. + +Signed-off-by: Luis Henriques +Acked-by: David Disseldorp +--- + drivers/block/rbd.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/block/rbd.c ++++ b/drivers/block/rbd.c +@@ -4883,7 +4883,7 @@ int rbd_dev_getxattr(struct rbd_device * + + osd_req_op_xattr_response_data_pages(req, 0, + pages, max_val_len, +- 0, false, false); ++ 0, false, true); + + ret = ceph_osdc_alloc_messages(req, GFP_KERNEL); + if (ret) diff --git a/patches.suse/0002-target_core_rbd-break-up-free_device-callback.patch b/patches.suse/0002-target_core_rbd-break-up-free_device-callback.patch new file mode 100644 index 0000000..8dd5010 --- /dev/null +++ b/patches.suse/0002-target_core_rbd-break-up-free_device-callback.patch @@ -0,0 +1,49 @@ +From 2de85bc491b844bec66a82b3ea0368b3862a8a27 Mon Sep 17 00:00:00 2001 +From: David Disseldorp +Date: Fri, 31 Aug 2018 15:15:43 +0200 +Subject: [PATCH 2/2] target_core_rbd: break up free_device callback +Patch-mainline: Not yet, SES clustered LIO/RBD +References: bsc#1105524 + +This matches upstream behaviour introduced with 926347061ef1: +("target: break up free_device callback") + +Signed-off-by: David Disseldorp +Acked-by: Luis Henriques +--- + drivers/target/target_core_rbd.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/target/target_core_rbd.c b/drivers/target/target_core_rbd.c +index b986a94ff586..0f54c316bbf3 100644 +--- a/drivers/target/target_core_rbd.c ++++ b/drivers/target/target_core_rbd.c +@@ -137,12 +137,15 @@ static void tcm_rbd_dev_call_rcu(struct rcu_head *p) + + static void tcm_rbd_free_device(struct se_device *dev) + { ++ call_rcu(&dev->rcu_head, tcm_rbd_dev_call_rcu); ++} ++ ++static void tcm_rbd_destroy_device(struct se_device *dev) ++{ + struct tcm_rbd_dev *tcm_rbd_dev = TCM_RBD_DEV(dev); + + if (tcm_rbd_dev->bd != NULL) + blkdev_put(tcm_rbd_dev->bd, FMODE_WRITE|FMODE_READ|FMODE_EXCL); +- +- call_rcu(&dev->rcu_head, tcm_rbd_dev_call_rcu); + } + + static sector_t tcm_rbd_get_blocks(struct se_device *dev) +@@ -3068,6 +3071,7 @@ static const struct target_backend_ops tcm_rbd_ops = { + .alloc_device = tcm_rbd_alloc_device, + .configure_device = tcm_rbd_configure_device, + .free_device = tcm_rbd_free_device, ++ .destroy_device = tcm_rbd_destroy_device, + .parse_cdb = tcm_rbd_parse_cdb, + .set_configfs_dev_params = tcm_rbd_set_configfs_dev_params, + .show_configfs_dev_params = tcm_rbd_show_configfs_dev_params, +-- +2.13.7 + diff --git a/patches.suse/0002-usb-Introduce-Xen-pvUSB-frontend-xen-hcd.patch b/patches.suse/0002-usb-Introduce-Xen-pvUSB-frontend-xen-hcd.patch new file mode 100644 index 0000000..d1cee04 --- /dev/null +++ b/patches.suse/0002-usb-Introduce-Xen-pvUSB-frontend-xen-hcd.patch @@ -0,0 +1,1663 @@ +From 9bf941e0f7d0294fef4a4b5b0c71e3c6673d4ccc Mon Sep 17 00:00:00 2001 +From: Juergen Gross +Date: Thu, 16 Aug 2018 11:01:38 +0200 +Subject: [PATCH v5 2/3] usb: Introduce Xen pvUSB frontend (xen hcd) +Patch-Mainline: Not yet, work in progress +References: fate#315712 + +Introduces the Xen pvUSB frontend. With pvUSB it is possible for a Xen +domU to communicate with a USB device assigned to that domU. The +communication is all done via the pvUSB backend in a driver domain +(usually Dom0) which is owner of the physical device. + +The pvUSB frontend is a USB hcd for a virtual USB host connector. + +The code is taken from the pvUSB implementation in Xen done by Fujitsu +based on Linux kernel 2.6.18. + +Changes from the original version are: +- port to upstream kernel +- put all code in just one source file +- move module to appropriate location in kernel tree +- adapt to Linux style guide +- minor code modifications to increase readability + +Signed-off-by: Juergen Gross +--- + drivers/usb/host/Kconfig | 11 + + drivers/usb/host/Makefile | 1 + + drivers/usb/host/xen-hcd.c | 1594 ++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 1606 insertions(+) + create mode 100644 drivers/usb/host/xen-hcd.c + +diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig +index 40b5de597112..d9657f5a966b 100644 +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -793,3 +793,14 @@ config USB_HCD_TEST_MODE + This option is of interest only to developers who need to validate + their USB hardware designs. It is not needed for normal use. If + unsure, say N. ++ ++config USB_XEN_HCD ++ tristate "Xen usb virtual host driver" ++ depends on XEN ++ select XEN_XENBUS_FRONTEND ++ help ++ The Xen usb virtual host driver serves as a frontend driver enabling ++ a Xen guest system to access USB Devices passed through to the guest ++ by the Xen host (usually Dom0). ++ Only needed if the kernel is running in a Xen guest and generic ++ access to a USB device is needed. +diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile +index 84514f71ae44..c69922645999 100644 +--- a/drivers/usb/host/Makefile ++++ b/drivers/usb/host/Makefile +@@ -92,3 +92,4 @@ obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o + obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o + obj-$(CONFIG_USB_FOTG210_HCD) += fotg210-hcd.o + obj-$(CONFIG_USB_MAX3421_HCD) += max3421-hcd.o ++obj-$(CONFIG_USB_XEN_HCD) += xen-hcd.o +diff --git a/drivers/usb/host/xen-hcd.c b/drivers/usb/host/xen-hcd.c +new file mode 100644 +index 000000000000..2968e19466d2 +--- /dev/null ++++ b/drivers/usb/host/xen-hcd.c +@@ -0,0 +1,1594 @@ ++/* ++ * xen-hcd.c ++ * ++ * Xen USB Virtual Host Controller driver ++ * ++ * Copyright (C) 2009, FUJITSU LABORATORIES LTD. ++ * Author: Noboru Iwamatsu ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ * ++ * Or, by your choice: ++ * ++ * When distributed separately from the Linux kernel or incorporated into ++ * other software packages, subject to the following license: ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to ++ * deal in the Software without restriction, including without limitation the ++ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE ++ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++/* Private per-URB data */ ++struct urb_priv { ++ struct list_head list; ++ struct urb *urb; ++ int req_id; /* RING_REQUEST id for submitting */ ++ int unlink_req_id; /* RING_REQUEST id for unlinking */ ++ int status; ++ unsigned unlinked:1; /* dequeued marker */ ++}; ++ ++/* virtual roothub port status */ ++struct rhport_status { ++ __u32 status; ++ unsigned resuming:1; /* in resuming */ ++ unsigned c_connection:1; /* connection changed */ ++ unsigned long timeout; ++}; ++ ++/* status of attached device */ ++struct vdevice_status { ++ int devnum; ++ enum usb_device_state status; ++ enum usb_device_speed speed; ++}; ++ ++/* RING request shadow */ ++struct usb_shadow { ++ struct xenusb_urb_request req; ++ struct urb *urb; ++}; ++ ++struct xenhcd_info { ++ /* Virtual Host Controller has 4 urb queues */ ++ struct list_head pending_submit_list; ++ struct list_head pending_unlink_list; ++ struct list_head in_progress_list; ++ struct list_head giveback_waiting_list; ++ ++ spinlock_t lock; ++ ++ /* timer that kick pending and giveback waiting urbs */ ++ struct timer_list watchdog; ++ unsigned long actions; ++ ++ /* virtual root hub */ ++ int rh_numports; ++ struct rhport_status ports[XENUSB_MAX_PORTNR]; ++ struct vdevice_status devices[XENUSB_MAX_PORTNR]; ++ ++ /* Xen related staff */ ++ struct xenbus_device *xbdev; ++ int urb_ring_ref; ++ int conn_ring_ref; ++ struct xenusb_urb_front_ring urb_ring; ++ struct xenusb_conn_front_ring conn_ring; ++ ++ unsigned int evtchn; ++ unsigned int irq; ++ struct usb_shadow shadow[XENUSB_URB_RING_SIZE]; ++ unsigned shadow_free; ++}; ++ ++#define GRANT_INVALID_REF 0 ++ ++#define XENHCD_RING_JIFFIES (HZ/200) ++#define XENHCD_SCAN_JIFFIES 1 ++ ++enum xenhcd_timer_action { ++ TIMER_RING_WATCHDOG, ++ TIMER_SCAN_PENDING_URBS, ++}; ++ ++static struct kmem_cache *xenhcd_urbp_cachep; ++ ++static inline struct xenhcd_info *xenhcd_hcd_to_info(struct usb_hcd *hcd) ++{ ++ return (struct xenhcd_info *)hcd->hcd_priv; ++} ++ ++static inline struct usb_hcd *xenhcd_info_to_hcd(struct xenhcd_info *info) ++{ ++ return container_of((void *)info, struct usb_hcd, hcd_priv); ++} ++ ++static inline void xenhcd_timer_action_done(struct xenhcd_info *info, ++ enum xenhcd_timer_action action) ++{ ++ clear_bit(action, &info->actions); ++} ++ ++static void xenhcd_timer_action(struct xenhcd_info *info, ++ enum xenhcd_timer_action action) ++{ ++ if (timer_pending(&info->watchdog) && ++ test_bit(TIMER_SCAN_PENDING_URBS, &info->actions)) ++ return; ++ ++ if (!test_and_set_bit(action, &info->actions)) { ++ unsigned long t; ++ ++ switch (action) { ++ case TIMER_RING_WATCHDOG: ++ t = XENHCD_RING_JIFFIES; ++ break; ++ default: ++ t = XENHCD_SCAN_JIFFIES; ++ break; ++ } ++ mod_timer(&info->watchdog, t + jiffies); ++ } ++} ++ ++/* ++ * set virtual port connection status ++ */ ++static void xenhcd_set_connect_state(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ if (info->ports[port].status & USB_PORT_STAT_POWER) { ++ switch (info->devices[port].speed) { ++ case XENUSB_SPEED_NONE: ++ info->ports[port].status &= ++ ~(USB_PORT_STAT_CONNECTION | ++ USB_PORT_STAT_ENABLE | ++ USB_PORT_STAT_LOW_SPEED | ++ USB_PORT_STAT_HIGH_SPEED | ++ USB_PORT_STAT_SUSPEND); ++ break; ++ case XENUSB_SPEED_LOW: ++ info->ports[port].status |= USB_PORT_STAT_CONNECTION; ++ info->ports[port].status |= USB_PORT_STAT_LOW_SPEED; ++ break; ++ case XENUSB_SPEED_FULL: ++ info->ports[port].status |= USB_PORT_STAT_CONNECTION; ++ break; ++ case XENUSB_SPEED_HIGH: ++ info->ports[port].status |= USB_PORT_STAT_CONNECTION; ++ info->ports[port].status |= USB_PORT_STAT_HIGH_SPEED; ++ break; ++ default: /* error */ ++ return; ++ } ++ info->ports[port].status |= (USB_PORT_STAT_C_CONNECTION << 16); ++ } ++} ++ ++/* ++ * set virtual device connection status ++ */ ++static void xenhcd_rhport_connect(struct xenhcd_info *info, __u8 portnum, ++ __u8 speed) ++{ ++ int port; ++ ++ if (portnum < 1 || portnum > info->rh_numports) ++ return; /* invalid port number */ ++ ++ port = portnum - 1; ++ if (info->devices[port].speed != speed) { ++ switch (speed) { ++ case XENUSB_SPEED_NONE: /* disconnect */ ++ info->devices[port].status = USB_STATE_NOTATTACHED; ++ break; ++ case XENUSB_SPEED_LOW: ++ case XENUSB_SPEED_FULL: ++ case XENUSB_SPEED_HIGH: ++ info->devices[port].status = USB_STATE_ATTACHED; ++ break; ++ default: /* error */ ++ return; ++ } ++ info->devices[port].speed = speed; ++ info->ports[port].c_connection = 1; ++ ++ xenhcd_set_connect_state(info, portnum); ++ } ++} ++ ++/* ++ * SetPortFeature(PORT_SUSPENDED) ++ */ ++static void xenhcd_rhport_suspend(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ info->ports[port].status |= USB_PORT_STAT_SUSPEND; ++ info->devices[port].status = USB_STATE_SUSPENDED; ++} ++ ++/* ++ * ClearPortFeature(PORT_SUSPENDED) ++ */ ++static void xenhcd_rhport_resume(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ if (info->ports[port].status & USB_PORT_STAT_SUSPEND) { ++ info->ports[port].resuming = 1; ++ info->ports[port].timeout = jiffies + msecs_to_jiffies(20); ++ } ++} ++ ++/* ++ * SetPortFeature(PORT_POWER) ++ */ ++static void xenhcd_rhport_power_on(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ if ((info->ports[port].status & USB_PORT_STAT_POWER) == 0) { ++ info->ports[port].status |= USB_PORT_STAT_POWER; ++ if (info->devices[port].status != USB_STATE_NOTATTACHED) ++ info->devices[port].status = USB_STATE_POWERED; ++ if (info->ports[port].c_connection) ++ xenhcd_set_connect_state(info, portnum); ++ } ++} ++ ++/* ++ * ClearPortFeature(PORT_POWER) ++ * SetConfiguration(non-zero) ++ * Power_Source_Off ++ * Over-current ++ */ ++static void xenhcd_rhport_power_off(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ if (info->ports[port].status & USB_PORT_STAT_POWER) { ++ info->ports[port].status = 0; ++ if (info->devices[port].status != USB_STATE_NOTATTACHED) ++ info->devices[port].status = USB_STATE_ATTACHED; ++ } ++} ++ ++/* ++ * ClearPortFeature(PORT_ENABLE) ++ */ ++static void xenhcd_rhport_disable(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ info->ports[port].status &= ~USB_PORT_STAT_ENABLE; ++ info->ports[port].status &= ~USB_PORT_STAT_SUSPEND; ++ info->ports[port].resuming = 0; ++ if (info->devices[port].status != USB_STATE_NOTATTACHED) ++ info->devices[port].status = USB_STATE_POWERED; ++} ++ ++/* ++ * SetPortFeature(PORT_RESET) ++ */ ++static void xenhcd_rhport_reset(struct xenhcd_info *info, int portnum) ++{ ++ int port; ++ ++ port = portnum - 1; ++ info->ports[port].status &= ~(USB_PORT_STAT_ENABLE | ++ USB_PORT_STAT_LOW_SPEED | ++ USB_PORT_STAT_HIGH_SPEED); ++ info->ports[port].status |= USB_PORT_STAT_RESET; ++ ++ if (info->devices[port].status != USB_STATE_NOTATTACHED) ++ info->devices[port].status = USB_STATE_ATTACHED; ++ ++ /* 10msec reset signaling */ ++ info->ports[port].timeout = jiffies + msecs_to_jiffies(10); ++} ++ ++#ifdef CONFIG_PM ++static int xenhcd_bus_suspend(struct usb_hcd *hcd) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ int ret = 0; ++ int i, ports; ++ ++ ports = info->rh_numports; ++ ++ spin_lock_irq(&info->lock); ++ if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { ++ ret = -ESHUTDOWN; ++ } else { ++ /* suspend any active ports*/ ++ for (i = 1; i <= ports; i++) ++ xenhcd_rhport_suspend(info, i); ++ } ++ spin_unlock_irq(&info->lock); ++ ++ del_timer_sync(&info->watchdog); ++ ++ return ret; ++} ++ ++static int xenhcd_bus_resume(struct usb_hcd *hcd) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ int ret = 0; ++ int i, ports; ++ ++ ports = info->rh_numports; ++ ++ spin_lock_irq(&info->lock); ++ if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { ++ ret = -ESHUTDOWN; ++ } else { ++ /* resume any suspended ports*/ ++ for (i = 1; i <= ports; i++) ++ xenhcd_rhport_resume(info, i); ++ } ++ spin_unlock_irq(&info->lock); ++ ++ return ret; ++} ++#endif ++ ++static void xenhcd_hub_descriptor(struct xenhcd_info *info, ++ struct usb_hub_descriptor *desc) ++{ ++ __u16 temp; ++ int ports = info->rh_numports; ++ ++ desc->bDescriptorType = 0x29; ++ desc->bPwrOn2PwrGood = 10; /* EHCI says 20ms max */ ++ desc->bHubContrCurrent = 0; ++ desc->bNbrPorts = ports; ++ ++ /* size of DeviceRemovable and PortPwrCtrlMask fields */ ++ temp = 1 + (ports / 8); ++ desc->bDescLength = 7 + 2 * temp; ++ ++ /* bitmaps for DeviceRemovable and PortPwrCtrlMask */ ++ memset(&desc->u.hs.DeviceRemovable[0], 0, temp); ++ memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp); ++ ++ /* per-port over current reporting and no power switching */ ++ temp = 0x000a; ++ desc->wHubCharacteristics = cpu_to_le16(temp); ++} ++ ++/* port status change mask for hub_status_data */ ++#define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \ ++ USB_PORT_STAT_C_ENABLE | \ ++ USB_PORT_STAT_C_SUSPEND | \ ++ USB_PORT_STAT_C_OVERCURRENT | \ ++ USB_PORT_STAT_C_RESET) << 16) ++ ++/* ++ * See USB 2.0 Spec, 11.12.4 Hub and Port Status Change Bitmap. ++ * If port status changed, writes the bitmap to buf and return ++ * that length(number of bytes). ++ * If Nothing changed, return 0. ++ */ ++static int xenhcd_hub_status_data(struct usb_hcd *hcd, char *buf) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ int ports; ++ int i; ++ unsigned long flags; ++ int ret; ++ int changed = 0; ++ ++ /* initialize the status to no-changes */ ++ ports = info->rh_numports; ++ ret = 1 + (ports / 8); ++ memset(buf, 0, ret); ++ ++ spin_lock_irqsave(&info->lock, flags); ++ ++ for (i = 0; i < ports; i++) { ++ /* check status for each port */ ++ if (info->ports[i].status & PORT_C_MASK) { ++ buf[(i + 1) / 8] |= 1 << (i + 1) % 8; ++ changed = 1; ++ } ++ } ++ ++ if ((hcd->state == HC_STATE_SUSPENDED) && (changed == 1)) ++ usb_hcd_resume_root_hub(hcd); ++ ++ spin_unlock_irqrestore(&info->lock, flags); ++ ++ return changed ? ret : 0; ++} ++ ++static int xenhcd_hub_control(struct usb_hcd *hcd, __u16 typeReq, __u16 wValue, ++ __u16 wIndex, char *buf, __u16 wLength) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ int ports = info->rh_numports; ++ unsigned long flags; ++ int ret = 0; ++ int i; ++ int changed = 0; ++ ++ spin_lock_irqsave(&info->lock, flags); ++ switch (typeReq) { ++ case ClearHubFeature: ++ /* ignore this request */ ++ break; ++ case ClearPortFeature: ++ if (!wIndex || wIndex > ports) ++ goto error; ++ ++ switch (wValue) { ++ case USB_PORT_FEAT_SUSPEND: ++ xenhcd_rhport_resume(info, wIndex); ++ break; ++ case USB_PORT_FEAT_POWER: ++ xenhcd_rhport_power_off(info, wIndex); ++ break; ++ case USB_PORT_FEAT_ENABLE: ++ xenhcd_rhport_disable(info, wIndex); ++ break; ++ case USB_PORT_FEAT_C_CONNECTION: ++ info->ports[wIndex-1].c_connection = 0; ++ /* Fall through */ ++ default: ++ info->ports[wIndex-1].status &= ~(1 << wValue); ++ break; ++ } ++ break; ++ case GetHubDescriptor: ++ xenhcd_hub_descriptor(info, (struct usb_hub_descriptor *)buf); ++ break; ++ case GetHubStatus: ++ /* always local power supply good and no over-current exists. */ ++ *(__le32 *)buf = cpu_to_le32(0); ++ break; ++ case GetPortStatus: ++ if (!wIndex || wIndex > ports) ++ goto error; ++ ++ wIndex--; ++ ++ /* resume completion */ ++ if (info->ports[wIndex].resuming && ++ time_after_eq(jiffies, info->ports[wIndex].timeout)) { ++ info->ports[wIndex].status |= ++ USB_PORT_STAT_C_SUSPEND << 16; ++ info->ports[wIndex].status &= ~USB_PORT_STAT_SUSPEND; ++ } ++ ++ /* reset completion */ ++ if ((info->ports[wIndex].status & USB_PORT_STAT_RESET) != 0 && ++ time_after_eq(jiffies, info->ports[wIndex].timeout)) { ++ info->ports[wIndex].status |= ++ USB_PORT_STAT_C_RESET << 16; ++ info->ports[wIndex].status &= ~USB_PORT_STAT_RESET; ++ ++ if (info->devices[wIndex].status != ++ USB_STATE_NOTATTACHED) { ++ info->ports[wIndex].status |= ++ USB_PORT_STAT_ENABLE; ++ info->devices[wIndex].status = ++ USB_STATE_DEFAULT; ++ } ++ ++ switch (info->devices[wIndex].speed) { ++ case XENUSB_SPEED_LOW: ++ info->ports[wIndex].status |= ++ USB_PORT_STAT_LOW_SPEED; ++ break; ++ case XENUSB_SPEED_HIGH: ++ info->ports[wIndex].status |= ++ USB_PORT_STAT_HIGH_SPEED; ++ break; ++ default: ++ break; ++ } ++ } ++ ++ *(__le32 *)buf = cpu_to_le32(info->ports[wIndex].status); ++ break; ++ case SetPortFeature: ++ if (!wIndex || wIndex > ports) ++ goto error; ++ ++ switch (wValue) { ++ case USB_PORT_FEAT_POWER: ++ xenhcd_rhport_power_on(info, wIndex); ++ break; ++ case USB_PORT_FEAT_RESET: ++ xenhcd_rhport_reset(info, wIndex); ++ break; ++ case USB_PORT_FEAT_SUSPEND: ++ xenhcd_rhport_suspend(info, wIndex); ++ break; ++ default: ++ if (info->ports[wIndex-1].status & USB_PORT_STAT_POWER) ++ info->ports[wIndex-1].status |= (1 << wValue); ++ } ++ break; ++ ++ case SetHubFeature: ++ /* not supported */ ++ default: ++error: ++ ret = -EPIPE; ++ } ++ spin_unlock_irqrestore(&info->lock, flags); ++ ++ /* check status for each port */ ++ for (i = 0; i < ports; i++) { ++ if (info->ports[i].status & PORT_C_MASK) ++ changed = 1; ++ } ++ if (changed) ++ usb_hcd_poll_rh_status(hcd); ++ ++ return ret; ++} ++ ++static void xenhcd_free_urb_priv(struct urb_priv *urbp) ++{ ++ urbp->urb->hcpriv = NULL; ++ kmem_cache_free(xenhcd_urbp_cachep, urbp); ++} ++ ++static inline unsigned xenhcd_get_id_from_freelist(struct xenhcd_info *info) ++{ ++ unsigned free; ++ ++ free = info->shadow_free; ++ BUG_ON(free >= XENUSB_URB_RING_SIZE); ++ info->shadow_free = info->shadow[free].req.id; ++ info->shadow[free].req.id = 0x0fff; /* debug */ ++ return free; ++} ++ ++static inline void xenhcd_add_id_to_freelist(struct xenhcd_info *info, ++ unsigned id) ++{ ++ info->shadow[id].req.id = info->shadow_free; ++ info->shadow[id].urb = NULL; ++ info->shadow_free = id; ++} ++ ++static inline int xenhcd_count_pages(void *addr, int length) ++{ ++ unsigned long vaddr = (unsigned long)addr; ++ ++ return PFN_UP(vaddr + length) - PFN_DOWN(vaddr); ++} ++ ++static void xenhcd_gnttab_map(struct xenhcd_info *info, void *addr, int length, ++ grant_ref_t *gref_head, ++ struct xenusb_request_segment *seg, ++ int nr_pages, int flags) ++{ ++ grant_ref_t ref; ++ unsigned long buffer_mfn; ++ unsigned int offset; ++ unsigned int len = length; ++ unsigned int bytes; ++ int i; ++ ++ for (i = 0; i < nr_pages; i++) { ++ BUG_ON(!len); ++ ++ buffer_mfn = PFN_DOWN(arbitrary_virt_to_machine(addr).maddr); ++ offset = offset_in_page(addr); ++ ++ bytes = PAGE_SIZE - offset; ++ if (bytes > len) ++ bytes = len; ++ ++ ref = gnttab_claim_grant_reference(gref_head); ++ BUG_ON(ref == -ENOSPC); ++ gnttab_grant_foreign_access_ref(ref, info->xbdev->otherend_id, ++ buffer_mfn, flags); ++ seg[i].gref = ref; ++ seg[i].offset = (__u16)offset; ++ seg[i].length = (__u16)bytes; ++ ++ addr += bytes; ++ len -= bytes; ++ } ++} ++ ++static __u32 xenhcd_pipe_urb_to_xenusb(__u32 urb_pipe, __u8 port) ++{ ++ static __u32 pipe; ++ ++ pipe = usb_pipedevice(urb_pipe) << XENUSB_PIPE_DEV_SHIFT; ++ pipe |= usb_pipeendpoint(urb_pipe) << XENUSB_PIPE_EP_SHIFT; ++ if (usb_pipein(urb_pipe)) ++ pipe |= XENUSB_PIPE_DIR; ++ switch (usb_pipetype(urb_pipe)) { ++ case PIPE_ISOCHRONOUS: ++ pipe |= XENUSB_PIPE_TYPE_ISOC << XENUSB_PIPE_TYPE_SHIFT; ++ break; ++ case PIPE_INTERRUPT: ++ pipe |= XENUSB_PIPE_TYPE_INT << XENUSB_PIPE_TYPE_SHIFT; ++ break; ++ case PIPE_CONTROL: ++ pipe |= XENUSB_PIPE_TYPE_CTRL << XENUSB_PIPE_TYPE_SHIFT; ++ break; ++ case PIPE_BULK: ++ pipe |= XENUSB_PIPE_TYPE_BULK << XENUSB_PIPE_TYPE_SHIFT; ++ break; ++ } ++ pipe = xenusb_setportnum_pipe(pipe, port); ++ ++ return pipe; ++} ++ ++static int xenhcd_map_urb_for_request(struct xenhcd_info *info, struct urb *urb, ++ struct xenusb_urb_request *req) ++{ ++ grant_ref_t gref_head; ++ int nr_buff_pages = 0; ++ int nr_isodesc_pages = 0; ++ int nr_grants = 0; ++ ++ if (urb->transfer_buffer_length) { ++ nr_buff_pages = xenhcd_count_pages(urb->transfer_buffer, ++ urb->transfer_buffer_length); ++ ++ if (usb_pipeisoc(urb->pipe)) ++ nr_isodesc_pages = xenhcd_count_pages( ++ &urb->iso_frame_desc[0], ++ sizeof(struct usb_iso_packet_descriptor) * ++ urb->number_of_packets); ++ ++ nr_grants = nr_buff_pages + nr_isodesc_pages; ++ if (nr_grants > XENUSB_MAX_SEGMENTS_PER_REQUEST) { ++ pr_err("xenhcd: error: %d grants\n", nr_grants); ++ return -E2BIG; ++ } ++ ++ if (gnttab_alloc_grant_references(nr_grants, &gref_head)) { ++ pr_err("xenhcd: gnttab_alloc_grant_references() error\n"); ++ return -ENOMEM; ++ } ++ ++ xenhcd_gnttab_map(info, urb->transfer_buffer, ++ urb->transfer_buffer_length, &gref_head, ++ &req->seg[0], nr_buff_pages, ++ usb_pipein(urb->pipe) ? 0 : GTF_readonly); ++ } ++ ++ req->pipe = xenhcd_pipe_urb_to_xenusb(urb->pipe, urb->dev->portnum); ++ req->transfer_flags = 0; ++ if (urb->transfer_flags & URB_SHORT_NOT_OK) ++ req->transfer_flags |= XENUSB_SHORT_NOT_OK; ++ req->buffer_length = urb->transfer_buffer_length; ++ req->nr_buffer_segs = nr_buff_pages; ++ ++ switch (usb_pipetype(urb->pipe)) { ++ case PIPE_ISOCHRONOUS: ++ req->u.isoc.interval = urb->interval; ++ req->u.isoc.start_frame = urb->start_frame; ++ req->u.isoc.number_of_packets = urb->number_of_packets; ++ req->u.isoc.nr_frame_desc_segs = nr_isodesc_pages; ++ ++ /* urb->number_of_packets must be > 0 */ ++ BUG_ON(urb->number_of_packets <= 0); ++ ++ xenhcd_gnttab_map(info, &urb->iso_frame_desc[0], ++ sizeof(struct usb_iso_packet_descriptor) * ++ urb->number_of_packets, ++ &gref_head, &req->seg[nr_buff_pages], ++ nr_isodesc_pages, 0); ++ break; ++ case PIPE_INTERRUPT: ++ req->u.intr.interval = urb->interval; ++ break; ++ case PIPE_CONTROL: ++ if (urb->setup_packet) ++ memcpy(req->u.ctrl, urb->setup_packet, 8); ++ break; ++ case PIPE_BULK: ++ break; ++ default: ++ BUG(); ++ } ++ ++ if (nr_grants) ++ gnttab_free_grant_references(gref_head); ++ ++ return 0; ++} ++ ++static void xenhcd_gnttab_done(struct usb_shadow *shadow) ++{ ++ int nr_segs = 0; ++ int i; ++ ++ nr_segs = shadow->req.nr_buffer_segs; ++ ++ if (xenusb_pipeisoc(shadow->req.pipe)) ++ nr_segs += shadow->req.u.isoc.nr_frame_desc_segs; ++ ++ for (i = 0; i < nr_segs; i++) ++ gnttab_end_foreign_access(shadow->req.seg[i].gref, 0, 0UL); ++ ++ shadow->req.nr_buffer_segs = 0; ++ shadow->req.u.isoc.nr_frame_desc_segs = 0; ++} ++ ++static void xenhcd_giveback_urb(struct xenhcd_info *info, struct urb *urb, ++ int status) ++{ ++ struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv; ++ int priv_status = urbp->status; ++ ++ list_del_init(&urbp->list); ++ xenhcd_free_urb_priv(urbp); ++ ++ if (urb->status == -EINPROGRESS) ++ urb->status = status; ++ ++ spin_unlock(&info->lock); ++ usb_hcd_giveback_urb(xenhcd_info_to_hcd(info), urb, ++ priv_status <= 0 ? priv_status : urb->status); ++ spin_lock(&info->lock); ++} ++ ++static int xenhcd_do_request(struct xenhcd_info *info, struct urb_priv *urbp) ++{ ++ struct xenusb_urb_request *req; ++ struct urb *urb = urbp->urb; ++ unsigned id; ++ int notify; ++ int ret; ++ ++ req = RING_GET_REQUEST(&info->urb_ring, info->urb_ring.req_prod_pvt); ++ id = xenhcd_get_id_from_freelist(info); ++ req->id = id; ++ ++ if (unlikely(urbp->unlinked)) { ++ req->u.unlink.unlink_id = urbp->req_id; ++ req->pipe = xenusb_setunlink_pipe(xenhcd_pipe_urb_to_xenusb( ++ urb->pipe, urb->dev->portnum)); ++ urbp->unlink_req_id = id; ++ } else { ++ ret = xenhcd_map_urb_for_request(info, urb, req); ++ if (ret) { ++ xenhcd_add_id_to_freelist(info, id); ++ return ret; ++ } ++ urbp->req_id = id; ++ } ++ ++ info->urb_ring.req_prod_pvt++; ++ info->shadow[id].urb = urb; ++ info->shadow[id].req = *req; ++ ++ RING_PUSH_REQUESTS_AND_CHECK_NOTIFY(&info->urb_ring, notify); ++ if (notify) ++ notify_remote_via_irq(info->irq); ++ ++ return 0; ++} ++ ++static void xenhcd_kick_pending_urbs(struct xenhcd_info *info) ++{ ++ struct urb_priv *urbp; ++ ++ while (!list_empty(&info->pending_submit_list)) { ++ if (RING_FULL(&info->urb_ring)) { ++ xenhcd_timer_action(info, TIMER_RING_WATCHDOG); ++ return; ++ } ++ ++ urbp = list_entry(info->pending_submit_list.next, ++ struct urb_priv, list); ++ if (!xenhcd_do_request(info, urbp)) ++ list_move_tail(&urbp->list, &info->in_progress_list); ++ else ++ xenhcd_giveback_urb(info, urbp->urb, -ESHUTDOWN); ++ } ++ xenhcd_timer_action_done(info, TIMER_SCAN_PENDING_URBS); ++} ++ ++/* ++ * caller must lock info->lock ++ */ ++static void xenhcd_cancel_all_enqueued_urbs(struct xenhcd_info *info) ++{ ++ struct urb_priv *urbp, *tmp; ++ int req_id; ++ ++ list_for_each_entry_safe(urbp, tmp, &info->in_progress_list, list) { ++ req_id = urbp->req_id; ++ if (!urbp->unlinked) { ++ xenhcd_gnttab_done(&info->shadow[req_id]); ++ if (urbp->urb->status == -EINPROGRESS) ++ /* not dequeued */ ++ xenhcd_giveback_urb(info, urbp->urb, ++ -ESHUTDOWN); ++ else /* dequeued */ ++ xenhcd_giveback_urb(info, urbp->urb, ++ urbp->urb->status); ++ } ++ info->shadow[req_id].urb = NULL; ++ } ++ ++ list_for_each_entry_safe(urbp, tmp, &info->pending_submit_list, list) ++ xenhcd_giveback_urb(info, urbp->urb, -ESHUTDOWN); ++} ++ ++/* ++ * caller must lock info->lock ++ */ ++static void xenhcd_giveback_unlinked_urbs(struct xenhcd_info *info) ++{ ++ struct urb_priv *urbp, *tmp; ++ ++ list_for_each_entry_safe(urbp, tmp, &info->giveback_waiting_list, list) ++ xenhcd_giveback_urb(info, urbp->urb, urbp->urb->status); ++} ++ ++static int xenhcd_submit_urb(struct xenhcd_info *info, struct urb_priv *urbp) ++{ ++ int ret; ++ ++ if (RING_FULL(&info->urb_ring)) { ++ list_add_tail(&urbp->list, &info->pending_submit_list); ++ xenhcd_timer_action(info, TIMER_RING_WATCHDOG); ++ return 0; ++ } ++ ++ if (!list_empty(&info->pending_submit_list)) { ++ list_add_tail(&urbp->list, &info->pending_submit_list); ++ xenhcd_timer_action(info, TIMER_SCAN_PENDING_URBS); ++ return 0; ++ } ++ ++ ret = xenhcd_do_request(info, urbp); ++ if (ret == 0) ++ list_add_tail(&urbp->list, &info->in_progress_list); ++ ++ return ret; ++} ++ ++static int xenhcd_unlink_urb(struct xenhcd_info *info, struct urb_priv *urbp) ++{ ++ int ret; ++ ++ /* already unlinked? */ ++ if (urbp->unlinked) ++ return -EBUSY; ++ ++ urbp->unlinked = 1; ++ ++ /* the urb is still in pending_submit queue */ ++ if (urbp->req_id == ~0) { ++ list_move_tail(&urbp->list, &info->giveback_waiting_list); ++ xenhcd_timer_action(info, TIMER_SCAN_PENDING_URBS); ++ return 0; ++ } ++ ++ /* send unlink request to backend */ ++ if (RING_FULL(&info->urb_ring)) { ++ list_move_tail(&urbp->list, &info->pending_unlink_list); ++ xenhcd_timer_action(info, TIMER_RING_WATCHDOG); ++ return 0; ++ } ++ ++ if (!list_empty(&info->pending_unlink_list)) { ++ list_move_tail(&urbp->list, &info->pending_unlink_list); ++ xenhcd_timer_action(info, TIMER_SCAN_PENDING_URBS); ++ return 0; ++ } ++ ++ ret = xenhcd_do_request(info, urbp); ++ if (ret == 0) ++ list_move_tail(&urbp->list, &info->in_progress_list); ++ ++ return ret; ++} ++ ++static int xenhcd_urb_request_done(struct xenhcd_info *info) ++{ ++ struct xenusb_urb_response *res; ++ struct urb *urb; ++ RING_IDX i, rp; ++ __u16 id; ++ int more_to_do = 0; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&info->lock, flags); ++ ++ rp = info->urb_ring.sring->rsp_prod; ++ rmb(); /* ensure we see queued responses up to "rp" */ ++ ++ for (i = info->urb_ring.rsp_cons; i != rp; i++) { ++ res = RING_GET_RESPONSE(&info->urb_ring, i); ++ id = res->id; ++ ++ if (likely(xenusb_pipesubmit(info->shadow[id].req.pipe))) { ++ xenhcd_gnttab_done(&info->shadow[id]); ++ urb = info->shadow[id].urb; ++ if (likely(urb)) { ++ urb->actual_length = res->actual_length; ++ urb->error_count = res->error_count; ++ urb->start_frame = res->start_frame; ++ xenhcd_giveback_urb(info, urb, res->status); ++ } ++ } ++ ++ xenhcd_add_id_to_freelist(info, id); ++ } ++ info->urb_ring.rsp_cons = i; ++ ++ if (i != info->urb_ring.req_prod_pvt) ++ RING_FINAL_CHECK_FOR_RESPONSES(&info->urb_ring, more_to_do); ++ else ++ info->urb_ring.sring->rsp_event = i + 1; ++ ++ spin_unlock_irqrestore(&info->lock, flags); ++ ++ return more_to_do; ++} ++ ++static int xenhcd_conn_notify(struct xenhcd_info *info) ++{ ++ struct xenusb_conn_response *res; ++ struct xenusb_conn_request *req; ++ RING_IDX rc, rp; ++ __u16 id; ++ __u8 portnum, speed; ++ int more_to_do = 0; ++ int notify; ++ int port_changed = 0; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&info->lock, flags); ++ ++ rc = info->conn_ring.rsp_cons; ++ rp = info->conn_ring.sring->rsp_prod; ++ rmb(); /* ensure we see queued responses up to "rp" */ ++ ++ while (rc != rp) { ++ res = RING_GET_RESPONSE(&info->conn_ring, rc); ++ id = res->id; ++ portnum = res->portnum; ++ speed = res->speed; ++ info->conn_ring.rsp_cons = ++rc; ++ ++ xenhcd_rhport_connect(info, portnum, speed); ++ if (info->ports[portnum - 1].c_connection) ++ port_changed = 1; ++ ++ barrier(); ++ ++ req = RING_GET_REQUEST(&info->conn_ring, ++ info->conn_ring.req_prod_pvt); ++ req->id = id; ++ info->conn_ring.req_prod_pvt++; ++ } ++ ++ if (rc != info->conn_ring.req_prod_pvt) ++ RING_FINAL_CHECK_FOR_RESPONSES(&info->conn_ring, more_to_do); ++ else ++ info->conn_ring.sring->rsp_event = rc + 1; ++ ++ RING_PUSH_REQUESTS_AND_CHECK_NOTIFY(&info->conn_ring, notify); ++ if (notify) ++ notify_remote_via_irq(info->irq); ++ ++ spin_unlock_irqrestore(&info->lock, flags); ++ ++ if (port_changed) ++ usb_hcd_poll_rh_status(xenhcd_info_to_hcd(info)); ++ ++ return more_to_do; ++} ++ ++static irqreturn_t xenhcd_int(int irq, void *dev_id) ++{ ++ struct xenhcd_info *info = (struct xenhcd_info *)dev_id; ++ ++ while (xenhcd_urb_request_done(info) | xenhcd_conn_notify(info)) ++ /* Yield point for this unbounded loop. */ ++ cond_resched(); ++ ++ return IRQ_HANDLED; ++} ++ ++static void xenhcd_destroy_rings(struct xenhcd_info *info) ++{ ++ if (info->irq) ++ unbind_from_irqhandler(info->irq, info); ++ info->irq = 0; ++ ++ if (info->urb_ring_ref != GRANT_INVALID_REF) { ++ gnttab_end_foreign_access(info->urb_ring_ref, 0, ++ (unsigned long)info->urb_ring.sring); ++ info->urb_ring_ref = GRANT_INVALID_REF; ++ } ++ info->urb_ring.sring = NULL; ++ ++ if (info->conn_ring_ref != GRANT_INVALID_REF) { ++ gnttab_end_foreign_access(info->conn_ring_ref, 0, ++ (unsigned long)info->conn_ring.sring); ++ info->conn_ring_ref = GRANT_INVALID_REF; ++ } ++ info->conn_ring.sring = NULL; ++} ++ ++static int xenhcd_setup_rings(struct xenbus_device *dev, ++ struct xenhcd_info *info) ++{ ++ struct xenusb_urb_sring *urb_sring; ++ struct xenusb_conn_sring *conn_sring; ++ grant_ref_t gref; ++ int err; ++ ++ info->urb_ring_ref = GRANT_INVALID_REF; ++ info->conn_ring_ref = GRANT_INVALID_REF; ++ ++ urb_sring = (struct xenusb_urb_sring *)get_zeroed_page( ++ GFP_NOIO | __GFP_HIGH); ++ if (!urb_sring) { ++ xenbus_dev_fatal(dev, -ENOMEM, "allocating urb ring"); ++ return -ENOMEM; ++ } ++ SHARED_RING_INIT(urb_sring); ++ FRONT_RING_INIT(&info->urb_ring, urb_sring, PAGE_SIZE); ++ ++ err = xenbus_grant_ring(dev, urb_sring, 1, &gref); ++ if (err < 0) { ++ free_page((unsigned long)urb_sring); ++ info->urb_ring.sring = NULL; ++ goto fail; ++ } ++ info->urb_ring_ref = gref; ++ ++ conn_sring = (struct xenusb_conn_sring *)get_zeroed_page( ++ GFP_NOIO | __GFP_HIGH); ++ if (!conn_sring) { ++ xenbus_dev_fatal(dev, -ENOMEM, "allocating conn ring"); ++ err = -ENOMEM; ++ goto fail; ++ } ++ SHARED_RING_INIT(conn_sring); ++ FRONT_RING_INIT(&info->conn_ring, conn_sring, PAGE_SIZE); ++ ++ err = xenbus_grant_ring(dev, conn_sring, 1, &gref); ++ if (err < 0) { ++ free_page((unsigned long)conn_sring); ++ info->conn_ring.sring = NULL; ++ goto fail; ++ } ++ info->conn_ring_ref = gref; ++ ++ err = xenbus_alloc_evtchn(dev, &info->evtchn); ++ if (err) { ++ xenbus_dev_fatal(dev, err, "xenbus_alloc_evtchn"); ++ goto fail; ++ } ++ ++ err = bind_evtchn_to_irq(info->evtchn); ++ if (err <= 0) { ++ xenbus_dev_fatal(dev, err, "bind_evtchn_to_irq"); ++ goto fail; ++ } ++ ++ info->irq = err; ++ ++ err = request_threaded_irq(info->irq, NULL, xenhcd_int, ++ IRQF_ONESHOT, "xenhcd", info); ++ if (err) { ++ xenbus_dev_fatal(dev, err, "request_threaded_irq"); ++ goto free_irq; ++ } ++ ++ return 0; ++ ++free_irq: ++ unbind_from_irqhandler(info->irq, info); ++fail: ++ xenhcd_destroy_rings(info); ++ return err; ++} ++ ++static int xenhcd_talk_to_backend(struct xenbus_device *dev, ++ struct xenhcd_info *info) ++{ ++ const char *message; ++ struct xenbus_transaction xbt; ++ int err; ++ ++ err = xenhcd_setup_rings(dev, info); ++ if (err) ++ return err; ++ ++again: ++ err = xenbus_transaction_start(&xbt); ++ if (err) { ++ xenbus_dev_fatal(dev, err, "starting transaction"); ++ goto destroy_ring; ++ } ++ ++ err = xenbus_printf(xbt, dev->nodename, "urb-ring-ref", "%u", ++ info->urb_ring_ref); ++ if (err) { ++ message = "writing urb-ring-ref"; ++ goto abort_transaction; ++ } ++ ++ err = xenbus_printf(xbt, dev->nodename, "conn-ring-ref", "%u", ++ info->conn_ring_ref); ++ if (err) { ++ message = "writing conn-ring-ref"; ++ goto abort_transaction; ++ } ++ ++ err = xenbus_printf(xbt, dev->nodename, "event-channel", "%u", ++ info->evtchn); ++ if (err) { ++ message = "writing event-channel"; ++ goto abort_transaction; ++ } ++ ++ err = xenbus_transaction_end(xbt, 0); ++ if (err) { ++ if (err == -EAGAIN) ++ goto again; ++ xenbus_dev_fatal(dev, err, "completing transaction"); ++ goto destroy_ring; ++ } ++ ++ return 0; ++ ++abort_transaction: ++ xenbus_transaction_end(xbt, 1); ++ xenbus_dev_fatal(dev, err, "%s", message); ++ ++destroy_ring: ++ xenhcd_destroy_rings(info); ++ ++ return err; ++} ++ ++static int xenhcd_connect(struct xenbus_device *dev) ++{ ++ struct xenhcd_info *info = dev_get_drvdata(&dev->dev); ++ struct xenusb_conn_request *req; ++ int idx, err; ++ int notify; ++ char name[TASK_COMM_LEN]; ++ struct usb_hcd *hcd; ++ ++ hcd = xenhcd_info_to_hcd(info); ++ snprintf(name, TASK_COMM_LEN, "xenhcd.%d", hcd->self.busnum); ++ ++ err = xenhcd_talk_to_backend(dev, info); ++ if (err) ++ return err; ++ ++ /* prepare ring for hotplug notification */ ++ for (idx = 0; idx < XENUSB_CONN_RING_SIZE; idx++) { ++ req = RING_GET_REQUEST(&info->conn_ring, idx); ++ req->id = idx; ++ } ++ info->conn_ring.req_prod_pvt = idx; ++ ++ RING_PUSH_REQUESTS_AND_CHECK_NOTIFY(&info->conn_ring, notify); ++ if (notify) ++ notify_remote_via_irq(info->irq); ++ ++ return 0; ++} ++ ++static void xenhcd_disconnect(struct xenbus_device *dev) ++{ ++ struct xenhcd_info *info = dev_get_drvdata(&dev->dev); ++ struct usb_hcd *hcd = xenhcd_info_to_hcd(info); ++ ++ usb_remove_hcd(hcd); ++ xenbus_frontend_closed(dev); ++} ++ ++static void xenhcd_watchdog(struct timer_list *timer) ++{ ++ struct xenhcd_info *info = from_timer(info, timer, watchdog); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&info->lock, flags); ++ if (likely(HC_IS_RUNNING(xenhcd_info_to_hcd(info)->state))) { ++ xenhcd_timer_action_done(info, TIMER_RING_WATCHDOG); ++ xenhcd_giveback_unlinked_urbs(info); ++ xenhcd_kick_pending_urbs(info); ++ } ++ spin_unlock_irqrestore(&info->lock, flags); ++} ++ ++/* ++ * one-time HC init ++ */ ++static int xenhcd_setup(struct usb_hcd *hcd) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ ++ spin_lock_init(&info->lock); ++ INIT_LIST_HEAD(&info->pending_submit_list); ++ INIT_LIST_HEAD(&info->pending_unlink_list); ++ INIT_LIST_HEAD(&info->in_progress_list); ++ INIT_LIST_HEAD(&info->giveback_waiting_list); ++ timer_setup(&info->watchdog, xenhcd_watchdog, 0); ++ ++ hcd->has_tt = (hcd->driver->flags & HCD_MASK) != HCD_USB11; ++ ++ return 0; ++} ++ ++/* ++ * start HC running ++ */ ++static int xenhcd_run(struct usb_hcd *hcd) ++{ ++ hcd->uses_new_polling = 1; ++ clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); ++ hcd->state = HC_STATE_RUNNING; ++ return 0; ++} ++ ++/* ++ * stop running HC ++ */ ++static void xenhcd_stop(struct usb_hcd *hcd) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ ++ del_timer_sync(&info->watchdog); ++ spin_lock_irq(&info->lock); ++ /* cancel all urbs */ ++ hcd->state = HC_STATE_HALT; ++ xenhcd_cancel_all_enqueued_urbs(info); ++ xenhcd_giveback_unlinked_urbs(info); ++ spin_unlock_irq(&info->lock); ++} ++ ++/* ++ * called as .urb_enqueue() ++ * non-error returns are promise to giveback the urb later ++ */ ++static int xenhcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, ++ gfp_t mem_flags) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ struct urb_priv *urbp; ++ unsigned long flags; ++ int ret; ++ ++ ++ urbp = kmem_cache_zalloc(xenhcd_urbp_cachep, mem_flags); ++ if (!urbp) ++ return -ENOMEM; ++ ++ spin_lock_irqsave(&info->lock, flags); ++ ++ urbp->urb = urb; ++ urb->hcpriv = urbp; ++ urbp->req_id = ~0; ++ urbp->unlink_req_id = ~0; ++ INIT_LIST_HEAD(&urbp->list); ++ urbp->status = 1; ++ urb->unlinked = 0; ++ ++ ret = xenhcd_submit_urb(info, urbp); ++ ++ if (ret) ++ xenhcd_free_urb_priv(urbp); ++ ++ spin_unlock_irqrestore(&info->lock, flags); ++ ++ return ret; ++} ++ ++/* ++ * called as .urb_dequeue() ++ */ ++static int xenhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) ++{ ++ struct xenhcd_info *info = xenhcd_hcd_to_info(hcd); ++ struct urb_priv *urbp; ++ unsigned long flags; ++ int ret = 0; ++ ++ spin_lock_irqsave(&info->lock, flags); ++ ++ urbp = urb->hcpriv; ++ if (urbp) { ++ urbp->status = status; ++ ret = xenhcd_unlink_urb(info, urbp); ++ } ++ ++ spin_unlock_irqrestore(&info->lock, flags); ++ ++ return ret; ++} ++ ++/* ++ * called from usb_get_current_frame_number(), ++ * but, almost all drivers not use such function. ++ */ ++static int xenhcd_get_frame(struct usb_hcd *hcd) ++{ ++ /* it means error, but probably no problem :-) */ ++ return 0; ++} ++ ++static struct hc_driver xenhcd_usb20_hc_driver = { ++ .description = "xen-hcd", ++ .product_desc = "Xen USB2.0 Virtual Host Controller", ++ .hcd_priv_size = sizeof(struct xenhcd_info), ++ .flags = HCD_USB2, ++ ++ /* basic HC lifecycle operations */ ++ .reset = xenhcd_setup, ++ .start = xenhcd_run, ++ .stop = xenhcd_stop, ++ ++ /* managing urb I/O */ ++ .urb_enqueue = xenhcd_urb_enqueue, ++ .urb_dequeue = xenhcd_urb_dequeue, ++ .get_frame_number = xenhcd_get_frame, ++ ++ /* root hub operations */ ++ .hub_status_data = xenhcd_hub_status_data, ++ .hub_control = xenhcd_hub_control, ++#ifdef CONFIG_PM ++ .bus_suspend = xenhcd_bus_suspend, ++ .bus_resume = xenhcd_bus_resume, ++#endif ++}; ++ ++static struct hc_driver xenhcd_usb11_hc_driver = { ++ .description = "xen-hcd", ++ .product_desc = "Xen USB1.1 Virtual Host Controller", ++ .hcd_priv_size = sizeof(struct xenhcd_info), ++ .flags = HCD_USB11, ++ ++ /* basic HC lifecycle operations */ ++ .reset = xenhcd_setup, ++ .start = xenhcd_run, ++ .stop = xenhcd_stop, ++ ++ /* managing urb I/O */ ++ .urb_enqueue = xenhcd_urb_enqueue, ++ .urb_dequeue = xenhcd_urb_dequeue, ++ .get_frame_number = xenhcd_get_frame, ++ ++ /* root hub operations */ ++ .hub_status_data = xenhcd_hub_status_data, ++ .hub_control = xenhcd_hub_control, ++#ifdef CONFIG_PM ++ .bus_suspend = xenhcd_bus_suspend, ++ .bus_resume = xenhcd_bus_resume, ++#endif ++}; ++ ++static struct usb_hcd *xenhcd_create_hcd(struct xenbus_device *dev) ++{ ++ int i; ++ int err = 0; ++ int num_ports; ++ int usb_ver; ++ struct usb_hcd *hcd = NULL; ++ struct xenhcd_info *info; ++ ++ err = xenbus_scanf(XBT_NIL, dev->otherend, "num-ports", "%d", ++ &num_ports); ++ if (err != 1) { ++ xenbus_dev_fatal(dev, err, "reading num-ports"); ++ return ERR_PTR(-EINVAL); ++ } ++ if (num_ports < 1 || num_ports > XENUSB_MAX_PORTNR) { ++ xenbus_dev_fatal(dev, err, "invalid num-ports"); ++ return ERR_PTR(-EINVAL); ++ } ++ ++ err = xenbus_scanf(XBT_NIL, dev->otherend, "usb-ver", "%d", &usb_ver); ++ if (err != 1) { ++ xenbus_dev_fatal(dev, err, "reading usb-ver"); ++ return ERR_PTR(-EINVAL); ++ } ++ switch (usb_ver) { ++ case XENUSB_VER_USB11: ++ hcd = usb_create_hcd(&xenhcd_usb11_hc_driver, &dev->dev, ++ dev_name(&dev->dev)); ++ break; ++ case XENUSB_VER_USB20: ++ hcd = usb_create_hcd(&xenhcd_usb20_hc_driver, &dev->dev, ++ dev_name(&dev->dev)); ++ break; ++ default: ++ xenbus_dev_fatal(dev, err, "invalid usb-ver"); ++ return ERR_PTR(-EINVAL); ++ } ++ if (!hcd) { ++ xenbus_dev_fatal(dev, err, ++ "fail to allocate USB host controller"); ++ return ERR_PTR(-ENOMEM); ++ } ++ ++ info = xenhcd_hcd_to_info(hcd); ++ info->xbdev = dev; ++ info->rh_numports = num_ports; ++ ++ for (i = 0; i < XENUSB_URB_RING_SIZE; i++) { ++ info->shadow[i].req.id = i + 1; ++ info->shadow[i].urb = NULL; ++ } ++ info->shadow[XENUSB_URB_RING_SIZE - 1].req.id = 0x0fff; ++ ++ return hcd; ++} ++ ++static void xenhcd_backend_changed(struct xenbus_device *dev, ++ enum xenbus_state backend_state) ++{ ++ switch (backend_state) { ++ case XenbusStateInitialising: ++ case XenbusStateReconfiguring: ++ case XenbusStateReconfigured: ++ case XenbusStateUnknown: ++ break; ++ ++ case XenbusStateInitWait: ++ case XenbusStateInitialised: ++ case XenbusStateConnected: ++ if (dev->state != XenbusStateInitialising) ++ break; ++ if (!xenhcd_connect(dev)) ++ xenbus_switch_state(dev, XenbusStateConnected); ++ break; ++ ++ case XenbusStateClosed: ++ if (dev->state == XenbusStateClosed) ++ break; ++ /* Fall through -- Missed the backend's Closing state. */ ++ case XenbusStateClosing: ++ xenhcd_disconnect(dev); ++ break; ++ ++ default: ++ xenbus_dev_fatal(dev, -EINVAL, "saw state %d at frontend", ++ backend_state); ++ break; ++ } ++} ++ ++static int xenhcd_remove(struct xenbus_device *dev) ++{ ++ struct xenhcd_info *info = dev_get_drvdata(&dev->dev); ++ struct usb_hcd *hcd = xenhcd_info_to_hcd(info); ++ ++ xenhcd_destroy_rings(info); ++ usb_put_hcd(hcd); ++ ++ return 0; ++} ++ ++static int xenhcd_probe(struct xenbus_device *dev, ++ const struct xenbus_device_id *id) ++{ ++ int err; ++ struct usb_hcd *hcd; ++ struct xenhcd_info *info; ++ ++ if (usb_disabled()) ++ return -ENODEV; ++ ++ hcd = xenhcd_create_hcd(dev); ++ if (IS_ERR(hcd)) { ++ err = PTR_ERR(hcd); ++ xenbus_dev_fatal(dev, err, ++ "fail to create usb host controller"); ++ return err; ++ } ++ ++ info = xenhcd_hcd_to_info(hcd); ++ dev_set_drvdata(&dev->dev, info); ++ ++ err = usb_add_hcd(hcd, 0, 0); ++ if (err) { ++ xenbus_dev_fatal(dev, err, "fail to add USB host controller"); ++ usb_put_hcd(hcd); ++ dev_set_drvdata(&dev->dev, NULL); ++ } ++ ++ return err; ++} ++ ++static const struct xenbus_device_id xenhcd_ids[] = { ++ { "vusb" }, ++ { "" }, ++}; ++ ++static struct xenbus_driver xenhcd_driver = { ++ .ids = xenhcd_ids, ++ .probe = xenhcd_probe, ++ .otherend_changed = xenhcd_backend_changed, ++ .remove = xenhcd_remove, ++}; ++ ++static int __init xenhcd_init(void) ++{ ++ if (!xen_domain()) ++ return -ENODEV; ++ ++ xenhcd_urbp_cachep = kmem_cache_create("xenhcd_urb_priv", ++ sizeof(struct urb_priv), 0, 0, NULL); ++ if (!xenhcd_urbp_cachep) { ++ pr_err("xenhcd failed to create kmem cache\n"); ++ return -ENOMEM; ++ } ++ ++ return xenbus_register_frontend(&xenhcd_driver); ++} ++module_init(xenhcd_init); ++ ++static void __exit xenhcd_exit(void) ++{ ++ kmem_cache_destroy(xenhcd_urbp_cachep); ++ xenbus_unregister_driver(&xenhcd_driver); ++} ++module_exit(xenhcd_exit); ++ ++MODULE_ALIAS("xen:vusb"); ++MODULE_AUTHOR("Juergen Gross "); ++MODULE_DESCRIPTION("Xen USB Virtual Host Controller driver (xen-hcd)"); ++MODULE_LICENSE("Dual BSD/GPL"); +-- +2.16.4 + diff --git a/patches.suse/0003-Add-external-no-support-as-bad-taint-module.patch b/patches.suse/0003-Add-external-no-support-as-bad-taint-module.patch new file mode 100644 index 0000000..ecf414e --- /dev/null +++ b/patches.suse/0003-Add-external-no-support-as-bad-taint-module.patch @@ -0,0 +1,28 @@ +From: Tony Jones +Subject: Add external support and no support module to bad taint + +Patch-mainline: Never, SLES feature +References: bnc#870450 +Target: SLE-12 + +Acked-by: Lee, Chun-Yi + +--- + kernel/tracepoint.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/kernel/tracepoint.c ++++ b/kernel/tracepoint.c +@@ -331,7 +331,11 @@ EXPORT_SYMBOL_GPL(tracepoint_probe_unreg + bool trace_module_has_bad_taint(struct module *mod) + { + return mod->taints & ~((1 << TAINT_OOT_MODULE) | (1 << TAINT_CRAP) | +- (1 << TAINT_UNSIGNED_MODULE)); ++ (1 << TAINT_UNSIGNED_MODULE) ++#ifdef CONFIG_SUSE_KERNEL_SUPPORTED ++ | (1 << TAINT_EXTERNAL_SUPPORT) | (1 << TAINT_NO_SUPPORT) ++#endif ++ ); + } + + static BLOCKING_NOTIFIER_HEAD(tracepoint_notify_list); diff --git a/patches.suse/0003-MODSIGN-load-blacklist-from-MOKx.patch b/patches.suse/0003-MODSIGN-load-blacklist-from-MOKx.patch new file mode 100644 index 0000000..b9f1888 --- /dev/null +++ b/patches.suse/0003-MODSIGN-load-blacklist-from-MOKx.patch @@ -0,0 +1,54 @@ +From 2963076f2a98124c7a8ca5a489447027169d79eb Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Wed, 29 Nov 2017 18:36:37 +0800 +Subject: [PATCH 3/4] MODSIGN: load blacklist from MOKx +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/10082311/ +References: fate#316531, bnc#854875 + +This patch adds the logic to load the blacklisted hash and +certificates from MOKx which is maintained by shim bootloader. + +Signed-off-by: Lee, Chun-Yi +--- + certs/load_uefi.c | 16 +++++++++++++--- + 1 file changed, 13 insertions(+), 3 deletions(-) + +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -164,8 +164,8 @@ static int __init load_uefi_certs(void) + { + efi_guid_t secure_var = EFI_IMAGE_SECURITY_DATABASE_GUID; + efi_guid_t mok_var = EFI_SHIM_LOCK_GUID; +- void *db = NULL, *dbx = NULL, *mok = NULL; +- unsigned long dbsize = 0, dbxsize = 0, moksize = 0; ++ void *db = NULL, *dbx = NULL, *mok = NULL, *mokx = NULL; ++ unsigned long dbsize = 0, dbxsize = 0, moksize = 0, mokxsize = 0; + int rc = 0; + + if (!efi.get_variable) +@@ -195,7 +195,7 @@ static int __init load_uefi_certs(void) + kfree(dbx); + } + +- /* the MOK can not be trusted when secure boot is disabled */ ++ /* the MOK and MOKx can not be trusted when secure boot is disabled */ + if (!efi_enabled(EFI_SECURE_BOOT)) + return 0; + +@@ -208,6 +208,16 @@ static int __init load_uefi_certs(void) + kfree(mok); + } + ++ mokx = get_cert_list(L"MokListXRT", &mok_var, &mokxsize); ++ if (mokx) { ++ rc = parse_efi_signature_list("UEFI:mokx", ++ mokx, mokxsize, ++ get_handler_for_dbx); ++ if (rc) ++ pr_err("Couldn't parse MokListXRT signatures: %d\n", rc); ++ kfree(mokx); ++ } ++ + return rc; + } + late_initcall(load_uefi_certs); diff --git a/patches.suse/0003-PCI-mobiveil-format-the-code-without-function-change.patch b/patches.suse/0003-PCI-mobiveil-format-the-code-without-function-change.patch new file mode 100644 index 0000000..c94a446 --- /dev/null +++ b/patches.suse/0003-PCI-mobiveil-format-the-code-without-function-change.patch @@ -0,0 +1,598 @@ +From 1fb52646b0c047227417173893b8d51a1bda0820 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:08:40 +0000 +Subject: [PATCH 03/26] PCI: mobiveil: format the code without function change + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Just format the code without functionality change. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 261 ++++++++++++++++++++------------------- + 1 file changed, 137 insertions(+), 124 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 6194ef10e4eb..b48e8e9ed779 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -31,38 +31,40 @@ + * translation tables are grouped into windows, each window registers are + * grouped into blocks of 4 or 16 registers each + */ +-#define PAB_REG_BLOCK_SIZE 16 +-#define PAB_EXT_REG_BLOCK_SIZE 4 ++#define PAB_REG_BLOCK_SIZE 16 ++#define PAB_EXT_REG_BLOCK_SIZE 4 + +-#define PAB_REG_ADDR(offset, win) (offset + (win * PAB_REG_BLOCK_SIZE)) +-#define PAB_EXT_REG_ADDR(offset, win) (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) ++#define PAB_REG_ADDR(offset, win) \ ++ (offset + (win * PAB_REG_BLOCK_SIZE)) ++#define PAB_EXT_REG_ADDR(offset, win) \ ++ (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) + +-#define LTSSM_STATUS 0x0404 +-#define LTSSM_STATUS_L0_MASK 0x3f +-#define LTSSM_STATUS_L0 0x2d ++#define LTSSM_STATUS 0x0404 ++#define LTSSM_STATUS_L0_MASK 0x3f ++#define LTSSM_STATUS_L0 0x2d + +-#define PAB_CTRL 0x0808 +-#define AMBA_PIO_ENABLE_SHIFT 0 +-#define PEX_PIO_ENABLE_SHIFT 1 +-#define PAGE_SEL_SHIFT 13 +-#define PAGE_SEL_MASK 0x3f +-#define PAGE_LO_MASK 0x3ff +-#define PAGE_SEL_OFFSET_SHIFT 10 ++#define PAB_CTRL 0x0808 ++#define AMBA_PIO_ENABLE_SHIFT 0 ++#define PEX_PIO_ENABLE_SHIFT 1 ++#define PAGE_SEL_SHIFT 13 ++#define PAGE_SEL_MASK 0x3f ++#define PAGE_LO_MASK 0x3ff ++#define PAGE_SEL_OFFSET_SHIFT 10 + +-#define PAB_AXI_PIO_CTRL 0x0840 +-#define APIO_EN_MASK 0xf ++#define PAB_AXI_PIO_CTRL 0x0840 ++#define APIO_EN_MASK 0xf + +-#define PAB_PEX_PIO_CTRL 0x08c0 +-#define PIO_ENABLE_SHIFT 0 ++#define PAB_PEX_PIO_CTRL 0x08c0 ++#define PIO_ENABLE_SHIFT 0 + + #define PAB_INTP_AMBA_MISC_ENB 0x0b0c +-#define PAB_INTP_AMBA_MISC_STAT 0x0b1c ++#define PAB_INTP_AMBA_MISC_STAT 0x0b1c + #define PAB_INTP_INTX_MASK 0x01e0 + #define PAB_INTP_MSI_MASK 0x8 + +-#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) +-#define WIN_ENABLE_SHIFT 0 +-#define WIN_TYPE_SHIFT 1 ++#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) ++#define WIN_ENABLE_SHIFT 0 ++#define WIN_TYPE_SHIFT 1 + + #define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) + +@@ -70,16 +72,16 @@ + #define AXI_WINDOW_ALIGN_MASK 3 + + #define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) +-#define PAB_BUS_SHIFT 24 +-#define PAB_DEVICE_SHIFT 19 +-#define PAB_FUNCTION_SHIFT 16 ++#define PAB_BUS_SHIFT 24 ++#define PAB_DEVICE_SHIFT 19 ++#define PAB_FUNCTION_SHIFT 16 + + #define PAB_AXI_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x0bac, win) + #define PAB_INTP_AXI_PIO_CLASS 0x474 + +-#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) +-#define AMAP_CTRL_EN_SHIFT 0 +-#define AMAP_CTRL_TYPE_SHIFT 1 ++#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) ++#define AMAP_CTRL_EN_SHIFT 0 ++#define AMAP_CTRL_TYPE_SHIFT 1 + + #define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) + #define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) +@@ -87,39 +89,39 @@ + #define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) + + /* starting offset of INTX bits in status register */ +-#define PAB_INTX_START 5 ++#define PAB_INTX_START 5 + + /* supported number of MSI interrupts */ +-#define PCI_NUM_MSI 16 ++#define PCI_NUM_MSI 16 + + /* MSI registers */ +-#define MSI_BASE_LO_OFFSET 0x04 +-#define MSI_BASE_HI_OFFSET 0x08 +-#define MSI_SIZE_OFFSET 0x0c +-#define MSI_ENABLE_OFFSET 0x14 +-#define MSI_STATUS_OFFSET 0x18 +-#define MSI_DATA_OFFSET 0x20 +-#define MSI_ADDR_L_OFFSET 0x24 +-#define MSI_ADDR_H_OFFSET 0x28 ++#define MSI_BASE_LO_OFFSET 0x04 ++#define MSI_BASE_HI_OFFSET 0x08 ++#define MSI_SIZE_OFFSET 0x0c ++#define MSI_ENABLE_OFFSET 0x14 ++#define MSI_STATUS_OFFSET 0x18 ++#define MSI_DATA_OFFSET 0x20 ++#define MSI_ADDR_L_OFFSET 0x24 ++#define MSI_ADDR_H_OFFSET 0x28 + + /* outbound and inbound window definitions */ +-#define WIN_NUM_0 0 +-#define WIN_NUM_1 1 +-#define CFG_WINDOW_TYPE 0 +-#define IO_WINDOW_TYPE 1 +-#define MEM_WINDOW_TYPE 2 +-#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) +-#define MAX_PIO_WINDOWS 8 ++#define WIN_NUM_0 0 ++#define WIN_NUM_1 1 ++#define CFG_WINDOW_TYPE 0 ++#define IO_WINDOW_TYPE 1 ++#define MEM_WINDOW_TYPE 2 ++#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) ++#define MAX_PIO_WINDOWS 8 + + /* Parameters for the waiting for link up routine */ +-#define LINK_WAIT_MAX_RETRIES 10 +-#define LINK_WAIT_MIN 90000 +-#define LINK_WAIT_MAX 100000 ++#define LINK_WAIT_MAX_RETRIES 10 ++#define LINK_WAIT_MIN 90000 ++#define LINK_WAIT_MAX 100000 + +-#define PAGED_ADDR_BNDRY 0xc00 +-#define OFFSET_TO_PAGE_ADDR(off) \ ++#define PAGED_ADDR_BNDRY 0xc00 ++#define OFFSET_TO_PAGE_ADDR(off) \ + ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) +-#define OFFSET_TO_PAGE_IDX(off) \ ++#define OFFSET_TO_PAGE_IDX(off) \ + ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) + + struct mobiveil_msi { /* MSI information */ +@@ -297,14 +299,14 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, + unsigned int devfn, int where) + { + struct mobiveil_pcie *pcie = bus->sysdata; ++ u32 value; + + if (!mobiveil_pcie_valid_device(bus, devfn)) + return NULL; + +- if (bus->number == pcie->root_bus_nr) { +- /* RC config access */ ++ /* RC config access */ ++ if (bus->number == pcie->root_bus_nr) + return pcie->csr_axi_slave_base + where; +- } + + /* + * EP config access (in Config/APIO space) +@@ -312,10 +314,12 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, + * (BDF) in PAB_AXI_AMAP_PEX_WIN_L0 Register. + * Relies on pci_lock serialization + */ +- csr_writel(pcie, bus->number << PAB_BUS_SHIFT | +- PCI_SLOT(devfn) << PAB_DEVICE_SHIFT | +- PCI_FUNC(devfn) << PAB_FUNCTION_SHIFT, +- PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); ++ value = bus->number << PAB_BUS_SHIFT | ++ PCI_SLOT(devfn) << PAB_DEVICE_SHIFT | ++ PCI_FUNC(devfn) << PAB_FUNCTION_SHIFT; ++ ++ csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); ++ + return pcie->config_axi_slave_base + where; + } + +@@ -350,22 +354,22 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) + + /* Handle INTx */ + if (intr_status & PAB_INTP_INTX_MASK) { +- shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT) >> +- PAB_INTX_START; ++ shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); ++ shifted_status >>= PAB_INTX_START; + do { + for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { + virq = irq_find_mapping(pcie->intx_domain, +- bit + 1); ++ bit + 1); + if (virq) + generic_handle_irq(virq); + else +- dev_err_ratelimited(dev, +- "unexpected IRQ, INT%d\n", bit); ++ dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", ++ bit); + + /* clear interrupt */ + csr_writel(pcie, +- shifted_status << PAB_INTX_START, +- PAB_INTP_AMBA_MISC_STAT); ++ shifted_status << PAB_INTX_START, ++ PAB_INTP_AMBA_MISC_STAT); + } + } while ((shifted_status >> PAB_INTX_START) != 0); + } +@@ -375,8 +379,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) + + /* handle MSI interrupts */ + while (msi_status & 1) { +- msi_data = readl_relaxed(pcie->apb_csr_base +- + MSI_DATA_OFFSET); ++ msi_data = readl_relaxed(pcie->apb_csr_base + MSI_DATA_OFFSET); + + /* + * MSI_STATUS_OFFSET register gets updated to zero +@@ -385,18 +388,18 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) + * two dummy reads. + */ + msi_addr_lo = readl_relaxed(pcie->apb_csr_base + +- MSI_ADDR_L_OFFSET); ++ MSI_ADDR_L_OFFSET); + msi_addr_hi = readl_relaxed(pcie->apb_csr_base + +- MSI_ADDR_H_OFFSET); ++ MSI_ADDR_H_OFFSET); + dev_dbg(dev, "MSI registers, data: %08x, addr: %08x:%08x\n", +- msi_data, msi_addr_hi, msi_addr_lo); ++ msi_data, msi_addr_hi, msi_addr_lo); + + virq = irq_find_mapping(msi->dev_domain, msi_data); + if (virq) + generic_handle_irq(virq); + + msi_status = readl_relaxed(pcie->apb_csr_base + +- MSI_STATUS_OFFSET); ++ MSI_STATUS_OFFSET); + } + + /* Clear the interrupt status */ +@@ -420,7 +423,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) + + /* map config resource */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, +- "config_axi_slave"); ++ "config_axi_slave"); + pcie->config_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); + if (IS_ERR(pcie->config_axi_slave_base)) + return PTR_ERR(pcie->config_axi_slave_base); +@@ -428,7 +431,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) + + /* map csr resource */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, +- "csr_axi_slave"); ++ "csr_axi_slave"); + pcie->csr_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); + if (IS_ERR(pcie->csr_axi_slave_base)) + return PTR_ERR(pcie->csr_axi_slave_base); +@@ -459,7 +462,7 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) + } + + static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, +- int pci_addr, u32 type, u64 size) ++ int pci_addr, u32 type, u64 size) + { + int pio_ctrl_val; + int amap_ctrl_dw; +@@ -472,19 +475,20 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, + } + + pio_ctrl_val = csr_readl(pcie, PAB_PEX_PIO_CTRL); +- csr_writel(pcie, +- pio_ctrl_val | (1 << PIO_ENABLE_SHIFT), PAB_PEX_PIO_CTRL); +- amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); +- amap_ctrl_dw = (amap_ctrl_dw | (type << AMAP_CTRL_TYPE_SHIFT)); +- amap_ctrl_dw = (amap_ctrl_dw | (1 << AMAP_CTRL_EN_SHIFT)); ++ pio_ctrl_val |= 1 << PIO_ENABLE_SHIFT; ++ csr_writel(pcie, pio_ctrl_val, PAB_PEX_PIO_CTRL); + +- csr_writel(pcie, amap_ctrl_dw | lower_32_bits(size64), +- PAB_PEX_AMAP_CTRL(win_num)); ++ amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); ++ amap_ctrl_dw |= (type << AMAP_CTRL_TYPE_SHIFT) | ++ (1 << AMAP_CTRL_EN_SHIFT) | ++ lower_32_bits(size64); ++ csr_writel(pcie, amap_ctrl_dw, PAB_PEX_AMAP_CTRL(win_num)); + + csr_writel(pcie, upper_32_bits(size64), + PAB_EXT_PEX_AMAP_SIZEN(win_num)); + + csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); ++ + csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); + csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); + } +@@ -493,7 +497,8 @@ static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, + * routine to program the outbound windows + */ + static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, +- u64 cpu_addr, u64 pci_addr, u32 config_io_bit, u64 size) ++ u64 cpu_addr, u64 pci_addr, ++ u32 config_io_bit, u64 size) + { + + u32 value, type; +@@ -512,7 +517,7 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, + type = config_io_bit; + value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); + csr_writel(pcie, 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | +- lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); ++ lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); + + csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); + +@@ -522,14 +527,14 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, + */ + value = csr_readl(pcie, PAB_AXI_AMAP_AXI_WIN(win_num)); + csr_writel(pcie, cpu_addr & (~AXI_WINDOW_ALIGN_MASK), +- PAB_AXI_AMAP_AXI_WIN(win_num)); ++ PAB_AXI_AMAP_AXI_WIN(win_num)); + + value = csr_readl(pcie, PAB_AXI_AMAP_PEX_WIN_H(win_num)); + + csr_writel(pcie, lower_32_bits(pci_addr), +- PAB_AXI_AMAP_PEX_WIN_L(win_num)); ++ PAB_AXI_AMAP_PEX_WIN_L(win_num)); + csr_writel(pcie, upper_32_bits(pci_addr), +- PAB_AXI_AMAP_PEX_WIN_H(win_num)); ++ PAB_AXI_AMAP_PEX_WIN_H(win_num)); + + pcie->ob_wins_configured++; + } +@@ -545,7 +550,9 @@ static int mobiveil_bringup_link(struct mobiveil_pcie *pcie) + + usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); + } ++ + dev_err(&pcie->pdev->dev, "link never came up\n"); ++ + return -ETIMEDOUT; + } + +@@ -558,16 +565,16 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) + msi->msi_pages_phys = (phys_addr_t)msg_addr; + + writel_relaxed(lower_32_bits(msg_addr), +- pcie->apb_csr_base + MSI_BASE_LO_OFFSET); ++ pcie->apb_csr_base + MSI_BASE_LO_OFFSET); + writel_relaxed(upper_32_bits(msg_addr), +- pcie->apb_csr_base + MSI_BASE_HI_OFFSET); ++ pcie->apb_csr_base + MSI_BASE_HI_OFFSET); + writel_relaxed(4096, pcie->apb_csr_base + MSI_SIZE_OFFSET); + writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET); + } + + static int mobiveil_host_init(struct mobiveil_pcie *pcie) + { +- u32 value, pab_ctrl, type = 0; ++ u32 value, pab_ctrl, type; + int err; + struct resource_entry *win, *tmp; + +@@ -582,26 +589,27 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + * Space + */ + value = csr_readl(pcie, PCI_COMMAND); +- csr_writel(pcie, value | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | +- PCI_COMMAND_MASTER, PCI_COMMAND); ++ value |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; ++ csr_writel(pcie, value, PCI_COMMAND); + + /* + * program PIO Enable Bit to 1 (and PEX PIO Enable to 1) in PAB_CTRL + * register + */ + pab_ctrl = csr_readl(pcie, PAB_CTRL); +- csr_writel(pcie, pab_ctrl | (1 << AMBA_PIO_ENABLE_SHIFT) | +- (1 << PEX_PIO_ENABLE_SHIFT), PAB_CTRL); ++ pab_ctrl |= (1 << AMBA_PIO_ENABLE_SHIFT) | (1 << PEX_PIO_ENABLE_SHIFT); ++ csr_writel(pcie, pab_ctrl, PAB_CTRL); + + csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK), +- PAB_INTP_AMBA_MISC_ENB); ++ PAB_INTP_AMBA_MISC_ENB); + + /* + * program PIO Enable Bit to 1 and Config Window Enable Bit to 1 in + * PAB_AXI_PIO_CTRL Register + */ + value = csr_readl(pcie, PAB_AXI_PIO_CTRL); +- csr_writel(pcie, value | APIO_EN_MASK, PAB_AXI_PIO_CTRL); ++ value |= APIO_EN_MASK; ++ csr_writel(pcie, value, PAB_AXI_PIO_CTRL); + + /* + * we'll program one outbound window for config reads and +@@ -612,25 +620,25 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + + /* config outbound translation window */ + program_ob_windows(pcie, pcie->ob_wins_configured, +- pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, +- resource_size(pcie->ob_io_res)); ++ pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, ++ resource_size(pcie->ob_io_res)); + + /* memory inbound translation window */ + program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + + /* Get the I/O and memory ranges from DT */ + resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { +- type = 0; + if (resource_type(win->res) == IORESOURCE_MEM) + type = MEM_WINDOW_TYPE; +- if (resource_type(win->res) == IORESOURCE_IO) ++ else if (resource_type(win->res) == IORESOURCE_IO) + type = IO_WINDOW_TYPE; +- if (type) { +- /* configure outbound translation window */ +- program_ob_windows(pcie, pcie->ob_wins_configured, +- win->res->start, 0, type, +- resource_size(win->res)); +- } ++ else ++ continue; ++ ++ /* configure outbound translation window */ ++ program_ob_windows(pcie, pcie->ob_wins_configured, ++ win->res->start, 0, type, ++ resource_size(win->res)); + } + + /* setup MSI hardware registers */ +@@ -650,7 +658,8 @@ static void mobiveil_mask_intx_irq(struct irq_data *data) + mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); + raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); + shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); +- csr_writel(pcie, (shifted_val & (~mask)), PAB_INTP_AMBA_MISC_ENB); ++ shifted_val &= ~mask; ++ csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); + raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); + } + +@@ -665,7 +674,8 @@ static void mobiveil_unmask_intx_irq(struct irq_data *data) + mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); + raw_spin_lock_irqsave(&pcie->intx_mask_lock, flags); + shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); +- csr_writel(pcie, (shifted_val | mask), PAB_INTP_AMBA_MISC_ENB); ++ shifted_val |= mask; ++ csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); + raw_spin_unlock_irqrestore(&pcie->intx_mask_lock, flags); + } + +@@ -679,10 +689,11 @@ static struct irq_chip intx_irq_chip = { + + /* routine to setup the INTx related data */ + static int mobiveil_pcie_intx_map(struct irq_domain *domain, unsigned int irq, +- irq_hw_number_t hwirq) ++ irq_hw_number_t hwirq) + { + irq_set_chip_and_handler(irq, &intx_irq_chip, handle_level_irq); + irq_set_chip_data(irq, domain->host_data); ++ + return 0; + } + +@@ -699,7 +710,7 @@ static struct irq_chip mobiveil_msi_irq_chip = { + + static struct msi_domain_info mobiveil_msi_domain_info = { + .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | +- MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), ++ MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), + .chip = &mobiveil_msi_irq_chip, + }; + +@@ -717,7 +728,7 @@ static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) + } + + static int mobiveil_msi_set_affinity(struct irq_data *irq_data, +- const struct cpumask *mask, bool force) ++ const struct cpumask *mask, bool force) + { + return -EINVAL; + } +@@ -729,7 +740,8 @@ static struct irq_chip mobiveil_msi_bottom_irq_chip = { + }; + + static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, +- unsigned int virq, unsigned int nr_irqs, void *args) ++ unsigned int virq, ++ unsigned int nr_irqs, void *args) + { + struct mobiveil_pcie *pcie = domain->host_data; + struct mobiveil_msi *msi = &pcie->msi; +@@ -749,13 +761,13 @@ static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, + mutex_unlock(&msi->lock); + + irq_domain_set_info(domain, virq, bit, &mobiveil_msi_bottom_irq_chip, +- domain->host_data, handle_level_irq, +- NULL, NULL); ++ domain->host_data, handle_level_irq, NULL, NULL); + return 0; + } + + static void mobiveil_irq_msi_domain_free(struct irq_domain *domain, +- unsigned int virq, unsigned int nr_irqs) ++ unsigned int virq, ++ unsigned int nr_irqs) + { + struct irq_data *d = irq_domain_get_irq_data(domain, virq); + struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(d); +@@ -763,12 +775,11 @@ static void mobiveil_irq_msi_domain_free(struct irq_domain *domain, + + mutex_lock(&msi->lock); + +- if (!test_bit(d->hwirq, msi->msi_irq_in_use)) { ++ if (!test_bit(d->hwirq, msi->msi_irq_in_use)) + dev_err(&pcie->pdev->dev, "trying to free unused MSI#%lu\n", + d->hwirq); +- } else { ++ else + __clear_bit(d->hwirq, msi->msi_irq_in_use); +- } + + mutex_unlock(&msi->lock); + } +@@ -792,12 +803,14 @@ static int mobiveil_allocate_msi_domains(struct mobiveil_pcie *pcie) + } + + msi->msi_domain = pci_msi_create_irq_domain(fwnode, +- &mobiveil_msi_domain_info, msi->dev_domain); ++ &mobiveil_msi_domain_info, ++ msi->dev_domain); + if (!msi->msi_domain) { + dev_err(dev, "failed to create MSI domain\n"); + irq_domain_remove(msi->dev_domain); + return -ENOMEM; + } ++ + return 0; + } + +@@ -808,8 +821,8 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) + int ret; + + /* setup INTx */ +- pcie->intx_domain = irq_domain_add_linear(node, +- PCI_NUM_INTX, &intx_domain_ops, pcie); ++ pcie->intx_domain = irq_domain_add_linear(node, PCI_NUM_INTX, ++ &intx_domain_ops, pcie); + + if (!pcie->intx_domain) { + dev_err(dev, "Failed to get a INTx IRQ domain\n"); +@@ -925,10 +938,10 @@ MODULE_DEVICE_TABLE(of, mobiveil_pcie_of_match); + static struct platform_driver mobiveil_pcie_driver = { + .probe = mobiveil_pcie_probe, + .driver = { +- .name = "mobiveil-pcie", +- .of_match_table = mobiveil_pcie_of_match, +- .suppress_bind_attrs = true, +- }, ++ .name = "mobiveil-pcie", ++ .of_match_table = mobiveil_pcie_of_match, ++ .suppress_bind_attrs = true, ++ }, + }; + + builtin_platform_driver(mobiveil_pcie_driver); +-- +2.11.0 + diff --git a/patches.suse/0003-apparmor-fix-use-after-free-in-sk_peer_label.patch b/patches.suse/0003-apparmor-fix-use-after-free-in-sk_peer_label.patch new file mode 100644 index 0000000..7772e8c --- /dev/null +++ b/patches.suse/0003-apparmor-fix-use-after-free-in-sk_peer_label.patch @@ -0,0 +1,33 @@ +From 45ff74bd5a009ab8f9648531fa11fce55b9a67fd Mon Sep 17 00:00:00 2001 +From: John Johansen +Date: Tue, 26 Jun 2018 20:19:19 -0700 +Subject: [PATCH 3/3] apparmor: fix use after free in sk_peer_label +References: bsc#1112770 +Patch-mainline: never, apparmor 2.x compatibility fix + +BugLink: http://bugs.launchpad.net/bugs/1778646 +Signed-off-by: John Johansen +Acked-by: Goldwyn Rodrigues +--- + security/apparmor/lsm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/security/apparmor/lsm.c ++++ b/security/apparmor/lsm.c +@@ -1018,7 +1018,7 @@ static struct aa_label *sk_peer_label(st + struct aa_sk_ctx *ctx = SK_CTX(sk); + + if (ctx->peer) +- return ctx->peer; ++ return aa_get_label(ctx->peer); + + return ERR_PTR(-ENOPROTOOPT); + } +@@ -1064,6 +1064,7 @@ out: + + } + ++ aa_put_label(peer); + done: + end_current_label_crit_section(label); + diff --git a/patches.suse/0003-btrfs-Add-handling-for-disk-split-brain-scenario-dur.patch b/patches.suse/0003-btrfs-Add-handling-for-disk-split-brain-scenario-dur.patch new file mode 100644 index 0000000..146c0ea --- /dev/null +++ b/patches.suse/0003-btrfs-Add-handling-for-disk-split-brain-scenario-dur.patch @@ -0,0 +1,74 @@ +From 34c4badfcbda4c8900b97667c8f7e62dd34e8fe5 Mon Sep 17 00:00:00 2001 +From: Nikolay Borisov +Date: Thu, 4 Oct 2018 14:41:17 +0300 +Subject: [PATCH 3/6] btrfs: Add handling for disk split-brain scenario during + fsid change +References: fate#325871 +Patch-mainline: Submitted, awaiting review + +Even though fsid change without rewrite is a very quick operations it's +still possible to experience a split brain scenario if power loss +occurs at the right time. This patch handle the case where power +failure occurs while the first transaction (the one setting +CHANGING_FSID_V2) flag is being persisted on disk. This can cause +the btrfs_fs_devices of this filesystem to be created by a device which: + + a) has the CHANGING_FSID_V2 flag set but its fsid value is intact + + b) or a device which doesn't have CHANGING_FSID_V2 flag set and its + fsid value is intact + +This situation is trivially handled by the current find_fsid code since +in both cases the devices are going to be treated like ordinary devices. +Since btrfs is always mounted using the superblock of the latest +device (the one with highest generation number), meaning it will have +the CHANGING_FSID_V2 flag set, ensure it's being cleared on mount. On +the first transaction commit following mount all disks will have it +cleared. + +Signed-off-by: Nikolay Borisov +--- + fs/btrfs/disk-io.c | 15 ++++++++++++--- + 1 file changed, 12 insertions(+), 3 deletions(-) + +--- a/fs/btrfs/disk-io.c ++++ b/fs/btrfs/disk-io.c +@@ -2863,18 +2863,28 @@ int open_ctree(struct super_block *sb, + * the whole block of INFO_SIZE + */ + memcpy(fs_info->super_copy, bh->b_data, sizeof(*fs_info->super_copy)); +- memcpy(fs_info->super_for_commit, fs_info->super_copy, +- sizeof(*fs_info->super_for_commit)); + brelse(bh); + ++ disk_super = fs_info->super_copy; + ASSERT(!memcmp(fs_info->fs_devices->fsid, fs_info->super_copy->fsid, + BTRFS_FSID_SIZE)); ++ + if (btrfs_fs_incompat(fs_info, METADATA_UUID)) { + ASSERT(!memcmp(fs_info->fs_devices->metadata_uuid, + fs_info->super_copy->metadata_uuid, + BTRFS_FSID_SIZE)); + } + ++ features = btrfs_super_flags(disk_super); ++ if (features & BTRFS_SUPER_FLAG_CHANGING_FSID_V2) { ++ features &= ~BTRFS_SUPER_FLAG_CHANGING_FSID_V2; ++ btrfs_set_super_flags(disk_super, features); ++ btrfs_info(fs_info, "found metadata uuid in progress flag. Clearing"); ++ } ++ ++ memcpy(fs_info->super_for_commit, fs_info->super_copy, ++ sizeof(*fs_info->super_for_commit)); ++ + ret = btrfs_check_super_valid(fs_info); + if (ret) { + btrfs_err(fs_info, "superblock contains fatal errors"); +@@ -2882,7 +2892,6 @@ int open_ctree(struct super_block *sb, + goto fail_alloc; + } + +- disk_super = fs_info->super_copy; + if (!btrfs_super_root(disk_super)) + goto fail_alloc; + diff --git a/patches.suse/0003-efi-Add-an-EFI-signature-blob-parser.patch b/patches.suse/0003-efi-Add-an-EFI-signature-blob-parser.patch new file mode 100644 index 0000000..c0f48e5 --- /dev/null +++ b/patches.suse/0003-efi-Add-an-EFI-signature-blob-parser.patch @@ -0,0 +1,203 @@ +From 1de3a29ec7b6aa2f24c182229745ff2a8601df16 Mon Sep 17 00:00:00 2001 +From: Dave Howells +Date: Thu, 3 Aug 2017 16:17:46 +0100 +Subject: [PATCH 3/6] efi: Add an EFI signature blob parser + +Patch-mainline: Queued in subsystem maintainer repository +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git +Git-commit: 1de3a29ec7b6aa2f24c182229745ff2a8601df16 +References: fate#314508 + +Add a function to parse an EFI signature blob looking for elements of +interest. A list is made up of a series of sublists, where all the +elements in a sublist are of the same type, but sublists can be of +different types. + +For each sublist encountered, the function pointed to by the +get_handler_for_guid argument is called with the type specifier GUID and +returns either a pointer to a function to handle elements of that type or +NULL if the type is not of interest. + +If the sublist is of interest, each element is passed to the handler +function in turn. + +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + certs/Kconfig | 8 ++++ + certs/Makefile | 1 + + certs/efi_parser.c | 112 ++++++++++++++++++++++++++++++++++++++++++++++++++++ + include/linux/efi.h | 9 +++++ + 4 files changed, 130 insertions(+) + create mode 100644 certs/efi_parser.c + +diff --git a/certs/Kconfig b/certs/Kconfig +index 6ce51ed..630ae09 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -82,4 +82,12 @@ config SYSTEM_BLACKLIST_HASH_LIST + wrapper to incorporate the list into the kernel. Each should + be a string of hex digits. + ++config EFI_SIGNATURE_LIST_PARSER ++ bool "EFI signature list parser" ++ depends on EFI ++ select X509_CERTIFICATE_PARSER ++ help ++ This option provides support for parsing EFI signature lists for ++ X.509 certificates and turning them into keys. ++ + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index 847361c..ffe8715 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -9,6 +9,7 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_hashes.o + else + obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif ++obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o + + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + +diff --git a/certs/efi_parser.c b/certs/efi_parser.c +new file mode 100644 +index 0000000..4e396f9 +--- /dev/null ++++ b/certs/efi_parser.c +@@ -0,0 +1,112 @@ ++/* EFI signature/key/certificate list parser ++ * ++ * Copyright (C) 2012, 2016 Red Hat, Inc. All Rights Reserved. ++ * Written by David Howells (dhowells@redhat.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++#define pr_fmt(fmt) "EFI: "fmt ++#include ++#include ++#include ++#include ++ ++/** ++ * parse_efi_signature_list - Parse an EFI signature list for certificates ++ * @source: The source of the key ++ * @data: The data blob to parse ++ * @size: The size of the data blob ++ * @get_handler_for_guid: Get the handler func for the sig type (or NULL) ++ * ++ * Parse an EFI signature list looking for elements of interest. A list is ++ * made up of a series of sublists, where all the elements in a sublist are of ++ * the same type, but sublists can be of different types. ++ * ++ * For each sublist encountered, the @get_handler_for_guid function is called ++ * with the type specifier GUID and returns either a pointer to a function to ++ * handle elements of that type or NULL if the type is not of interest. ++ * ++ * If the sublist is of interest, each element is passed to the handler ++ * function in turn. ++ * ++ * Error EBADMSG is returned if the list doesn't parse correctly and 0 is ++ * returned if the list was parsed correctly. No error can be returned from ++ * the @get_handler_for_guid function or the element handler function it ++ * returns. ++ */ ++int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)) ++{ ++ efi_element_handler_t handler; ++ unsigned offs = 0; ++ ++ pr_devel("-->%s(,%zu)\n", __func__, size); ++ ++ while (size > 0) { ++ const efi_signature_data_t *elem; ++ efi_signature_list_t list; ++ size_t lsize, esize, hsize, elsize; ++ ++ if (size < sizeof(list)) ++ return -EBADMSG; ++ ++ memcpy(&list, data, sizeof(list)); ++ pr_devel("LIST[%04x] guid=%pUl ls=%x hs=%x ss=%x\n", ++ offs, ++ list.signature_type.b, list.signature_list_size, ++ list.signature_header_size, list.signature_size); ++ ++ lsize = list.signature_list_size; ++ hsize = list.signature_header_size; ++ esize = list.signature_size; ++ elsize = lsize - sizeof(list) - hsize; ++ ++ if (lsize > size) { ++ pr_devel("<--%s() = -EBADMSG [overrun @%x]\n", ++ __func__, offs); ++ return -EBADMSG; ++ } ++ ++ if (lsize < sizeof(list) || ++ lsize - sizeof(list) < hsize || ++ esize < sizeof(*elem) || ++ elsize < esize || ++ elsize % esize != 0) { ++ pr_devel("- bad size combo @%x\n", offs); ++ return -EBADMSG; ++ } ++ ++ handler = get_handler_for_guid(&list.signature_type); ++ if (!handler) { ++ data += lsize; ++ size -= lsize; ++ offs += lsize; ++ continue; ++ } ++ ++ data += sizeof(list) + hsize; ++ size -= sizeof(list) + hsize; ++ offs += sizeof(list) + hsize; ++ ++ for (; elsize > 0; elsize -= esize) { ++ elem = data; ++ ++ pr_devel("ELEM[%04x]\n", offs); ++ handler(source, ++ &elem->signature_data, ++ esize - sizeof(*elem)); ++ ++ data += esize; ++ size -= esize; ++ offs += esize; ++ } ++ } ++ ++ return 0; ++} +diff --git a/include/linux/efi.h b/include/linux/efi.h +index a1e0621..fd0457f 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -1067,6 +1067,15 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, + char * __init efi_md_typeattr_format(char *buf, size_t size, + const efi_memory_desc_t *md); + ++ ++typedef void (*efi_element_handler_t)(const char *source, ++ const void *element_data, ++ size_t element_size); ++extern int __init parse_efi_signature_list( ++ const char *source, ++ const void *data, size_t size, ++ efi_element_handler_t (*get_handler_for_guid)(const efi_guid_t *)); ++ + /** + * efi_range_is_wc - check the WC bit on an address range + * @start: starting kvirt address +-- +2.6.2 + diff --git a/patches.suse/0003-kabi-Add-placeholders-to-a-couple-of-important-struc.patch b/patches.suse/0003-kabi-Add-placeholders-to-a-couple-of-important-struc.patch new file mode 100644 index 0000000..8a991f4 --- /dev/null +++ b/patches.suse/0003-kabi-Add-placeholders-to-a-couple-of-important-struc.patch @@ -0,0 +1,185 @@ +From 33b3ab6631ded858f811d6f5f6d7af4ac15dbc65 Mon Sep 17 00:00:00 2001 +From: Michal Marek +Date: Fri, 16 Sep 2011 11:56:20 +0200 +Subject: [PATCH 3/3] kabi: Add placeholders to a couple of important + structures +Patch-mainline: Never, kabi +References: fate#312013 + +Add a void* suse_kabi_padding placeholder to the following structures: +struct smp_ops +struct vm_area_struct +struct mm_struct +struct zone + - adding an explicit padding here is not strictly required, but can + serve as documentation that there is some space +struct pglist_data +struct vfsmount +struct module +struct signal_struct +struct sched_entity +struct sock +struct task_struct + +The idea is that when a fix appears that requires a new member in any of +these structures, we use this padding: + + #ifdef __GENKSYMS__ + void *suse_kabi_padding; + #else + long foo; + #endif + +And we don't have to worry about changing size of the structure, as long +as the new member is a pointer or a long. + +Signed-off-by: Michal Marek + +--- + arch/x86/include/asm/mmu.h | 1 + + arch/x86/include/asm/smp.h | 1 + + include/linux/device.h | 7 +++++++ + include/linux/mm_types.h | 1 + + include/linux/mmzone.h | 1 + + include/linux/module.h | 1 + + include/linux/mount.h | 1 + + include/linux/sched.h | 2 ++ + include/linux/sched/signal.h | 1 + + include/net/sock.h | 1 + + 10 files changed, 17 insertions(+) + +--- a/arch/x86/include/asm/mmu.h ++++ b/arch/x86/include/asm/mmu.h +@@ -54,6 +54,7 @@ typedef struct { + /* address of the bounds directory */ + void __user *bd_addr; + #endif ++ void *suse_kabi_padding; + } mm_context_t; + + #define INIT_MM_CONTEXT(mm) \ +--- a/arch/x86/include/asm/smp.h ++++ b/arch/x86/include/asm/smp.h +@@ -59,6 +59,7 @@ struct smp_ops { + + void (*send_call_func_ipi)(const struct cpumask *mask); + void (*send_call_func_single_ipi)(int cpu); ++ void *suse_kabi_padding; + }; + + /* Globals due to paravirt */ +--- a/include/linux/device.h ++++ b/include/linux/device.h +@@ -144,6 +144,8 @@ struct bus_type { + struct lock_class_key lock_key; + + bool need_parent_lock; ++ ++ void *suse_kabi_padding; + }; + + extern int __must_check bus_register(struct bus_type *bus); +@@ -301,6 +303,8 @@ struct device_driver { + void (*coredump) (struct device *dev); + + struct driver_private *p; ++ ++ void *suse_kabi_padding; + }; + + +@@ -428,6 +432,8 @@ struct class { + const struct dev_pm_ops *pm; + + struct subsys_private *p; ++ ++ void *suse_kabi_padding; + }; + + struct class_dev_iter { +@@ -1074,6 +1080,7 @@ struct device { + defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) + bool dma_coherent:1; + #endif ++ void *suse_kabi_padding; + }; + + static inline struct device *kobj_to_dev(struct kobject *kobj) +--- a/include/linux/mm_types.h ++++ b/include/linux/mm_types.h +@@ -348,6 +348,7 @@ struct vm_area_struct { + struct mempolicy *vm_policy; /* NUMA policy for the VMA */ + #endif + struct vm_userfaultfd_ctx vm_userfaultfd_ctx; ++ void *suse_kabi_padding; + } __randomize_layout; + + struct core_thread { +--- a/include/linux/mmzone.h ++++ b/include/linux/mmzone.h +@@ -559,6 +559,7 @@ struct zone { + /* Zone statistics */ + atomic_long_t vm_stat[NR_VM_ZONE_STAT_ITEMS]; + atomic_long_t vm_numa_stat[NR_VM_NUMA_STAT_ITEMS]; ++ void *suse_kabi_padding; + } ____cacheline_internodealigned_in_smp; + + enum pgdat_flags { +--- a/include/linux/module.h ++++ b/include/linux/module.h +@@ -508,6 +508,7 @@ struct module { + struct error_injection_entry *ei_funcs; + unsigned int num_ei_funcs; + #endif ++ void *suse_kabi_padding; + } ____cacheline_aligned __randomize_layout; + #ifndef MODULE_ARCH_INIT + #define MODULE_ARCH_INIT {} +--- a/include/linux/mount.h ++++ b/include/linux/mount.h +@@ -69,6 +69,7 @@ struct vfsmount { + struct dentry *mnt_root; /* root of the mounted tree */ + struct super_block *mnt_sb; /* pointer to superblock */ + int mnt_flags; ++ void *suse_kabi_padding; + } __randomize_layout; + + struct file; /* forward dec */ +--- a/include/linux/sched.h ++++ b/include/linux/sched.h +@@ -507,6 +507,7 @@ struct sched_rt_entity { + /* rq "owned" by this entity/group: */ + struct rt_rq *my_q; + #endif ++ void *suse_kabi_padding; + } __randomize_layout; + + struct sched_dl_entity { +@@ -1273,6 +1274,7 @@ struct task_struct { + unsigned long lowest_stack; + unsigned long prev_lowest_stack; + #endif ++ void *suse_kabi_padding; + + /* + * New fields for task_struct should be added above here, so that +--- a/include/linux/sched/signal.h ++++ b/include/linux/sched/signal.h +@@ -233,6 +233,7 @@ struct signal_struct { + struct mutex cred_guard_mutex; /* guard against foreign influences on + * credential calculations + * (notably. ptrace) */ ++ void *suse_kabi_padding; + } __randomize_layout; + + /* +--- a/include/net/sock.h ++++ b/include/net/sock.h +@@ -506,6 +506,7 @@ struct sock { + struct sk_buff *skb); + #endif + void (*sk_destruct)(struct sock *sk); ++ void *suse_kabi_padding; + struct sock_reuseport __rcu *sk_reuseport_cb; + #ifdef CONFIG_BPF_SYSCALL + struct bpf_sk_storage __rcu *sk_bpf_storage; diff --git a/patches.suse/0003-x86-KASLR-public-the-function-for-getting-random-lon.patch b/patches.suse/0003-x86-KASLR-public-the-function-for-getting-random-lon.patch new file mode 100644 index 0000000..7f4f2d6 --- /dev/null +++ b/patches.suse/0003-x86-KASLR-public-the-function-for-getting-random-lon.patch @@ -0,0 +1,177 @@ +From 03dc808fb73d82b882cc7080fc9a1f774a5add83 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Mon, 11 Dec 2017 22:11:36 +0800 +Subject: [PATCH 03/11] x86/KASLR: public the function for getting random long + number +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +Separating the functions for getting random long number from KASLR +to x86 library, then it can be used to generate random long for +EFI secret key. + +Signed-off-by: Lee, Chun-Yi +--- + arch/x86/boot/compressed/kaslr.c | 21 ------------ + arch/x86/boot/compressed/misc.c | 17 ++++++++++ + arch/x86/boot/compressed/misc.h | 6 +++ + arch/x86/lib/random.c | 66 +++++++++++++++++++++++++++++++++++++++ + 4 files changed, 89 insertions(+), 21 deletions(-) + create mode 100644 arch/x86/lib/random.c + +--- a/arch/x86/boot/compressed/kaslr.c ++++ b/arch/x86/boot/compressed/kaslr.c +@@ -31,13 +31,11 @@ + #include "misc.h" + #include "error.h" + +-#include + #include + #include + #include + #include + #include +-#include + #include + + /* Macros used by the included decompressor code below. */ +@@ -46,25 +44,6 @@ + + extern unsigned long get_cmd_line_ptr(void); + +-/* Simplified build-specific string for starting entropy. */ +-static const char build_str[] = UTS_RELEASE " (" LINUX_COMPILE_BY "@" +- LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION; +- +-static unsigned long rotate_xor(unsigned long hash, const void *area, +- size_t size) +-{ +- size_t i; +- unsigned long *ptr = (unsigned long *)area; +- +- for (i = 0; i < size / sizeof(hash); i++) { +- /* Rotate by odd number of bits and XOR. */ +- hash = (hash << ((sizeof(hash) * 8) - 7)) | (hash >> 7); +- hash ^= ptr[i]; +- } +- +- return hash; +-} +- + /* Attempt to create a simple but unpredictable starting entropy. */ + static unsigned long get_boot_seed(void) + { +--- a/arch/x86/boot/compressed/misc.c ++++ b/arch/x86/boot/compressed/misc.c +@@ -431,3 +431,20 @@ asmlinkage __visible void *extract_kerne + debug_putstr("done.\nBooting the kernel.\n"); + return output; + } ++ ++#if CONFIG_RANDOMIZE_BASE ++unsigned long rotate_xor(unsigned long hash, const void *area, ++ size_t size) ++{ ++ size_t i; ++ unsigned long *ptr = (unsigned long *)area; ++ ++ for (i = 0; i < size / sizeof(hash); i++) { ++ /* Rotate by odd number of bits and XOR. */ ++ hash = (hash << ((sizeof(hash) * 8) - 7)) | (hash >> 7); ++ hash ^= ptr[i]; ++ } ++ ++ return hash; ++} ++#endif +--- a/arch/x86/boot/compressed/misc.h ++++ b/arch/x86/boot/compressed/misc.h +@@ -66,6 +66,8 @@ int cmdline_find_option_bool(const char + + + #if CONFIG_RANDOMIZE_BASE ++#include ++#include + /* kaslr.c */ + void choose_random_location(unsigned long input, + unsigned long input_size, +@@ -74,6 +76,10 @@ void choose_random_location(unsigned lon + unsigned long *virt_addr); + /* cpuflags.c */ + bool has_cpuflag(int flag); ++/* Simplified build-specific string for starting entropy. */ ++static const char build_str[] = UTS_RELEASE " (" LINUX_COMPILE_BY "@" ++ LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION; ++unsigned long rotate_xor(unsigned long hash, const void *area, size_t size); + #else + static inline void choose_random_location(unsigned long input, + unsigned long input_size, +--- /dev/null ++++ b/arch/x86/lib/random.c +@@ -0,0 +1,66 @@ ++#include ++#include ++ ++#define I8254_PORT_CONTROL 0x43 ++#define I8254_PORT_COUNTER0 0x40 ++#define I8254_CMD_READBACK 0xC0 ++#define I8254_SELECT_COUNTER0 0x02 ++#define I8254_STATUS_NOTREADY 0x40 ++static inline u16 i8254(void) ++{ ++ u16 status, timer; ++ ++ do { ++ outb(I8254_CMD_READBACK | I8254_SELECT_COUNTER0, ++ I8254_PORT_CONTROL); ++ status = inb(I8254_PORT_COUNTER0); ++ timer = inb(I8254_PORT_COUNTER0); ++ timer |= inb(I8254_PORT_COUNTER0) << 8; ++ } while (status & I8254_STATUS_NOTREADY); ++ ++ return timer; ++} ++ ++static unsigned long get_random_long(const char *purpose) ++{ ++#ifdef CONFIG_X86_64 ++ const unsigned long mix_const = 0x5d6008cbf3848dd3UL; ++#else ++ const unsigned long mix_const = 0x3f39e593UL; ++#endif ++ unsigned long raw, random = get_boot_seed(); ++ bool use_i8254 = true; ++ ++ debug_putstr(purpose); ++ ++ if (has_cpuflag(X86_FEATURE_RDRAND)) { ++ debug_putstr(" RDRAND"); ++ if (rdrand_long(&raw)) { ++ random ^= raw; ++ use_i8254 = false; ++ } ++ } ++ ++ if (has_cpuflag(X86_FEATURE_TSC)) { ++ debug_putstr(" RDTSC"); ++ raw = rdtsc(); ++ ++ random ^= raw; ++ use_i8254 = false; ++ } ++ ++ if (use_i8254) { ++ debug_putstr(" i8254"); ++ random ^= i8254(); ++ } ++ ++ /* Circular multiply for better bit diffusion */ ++ asm(_ASM_MUL "%3" ++ : "=a" (random), "=d" (raw) ++ : "a" (random), "rm" (mix_const)); ++ random += raw; ++ ++ debug_putstr("...\n"); ++ ++ return random; ++} diff --git a/patches.suse/0004-MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch b/patches.suse/0004-MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch new file mode 100644 index 0000000..f894bee --- /dev/null +++ b/patches.suse/0004-MODSIGN-Import-certificates-from-UEFI-Secure-Boot.patch @@ -0,0 +1,252 @@ +From 4c2d71675fba6c81338bbd087014a4e2f75b776c Mon Sep 17 00:00:00 2001 +From: Josh Boyer +Date: Thu, 3 Aug 2017 16:17:46 +0100 +Subject: [PATCH 4/6] MODSIGN: Import certificates from UEFI Secure Boot + +Patch-mainline: Queued in subsystem maintainer repository +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git +Git-commit: 4c2d71675fba6c81338bbd087014a4e2f75b776c +References: fate#314508 + +Secure Boot stores a list of allowed certificates in the 'db' variable. +This imports those certificates into the system trusted keyring. This +allows for a third party signing certificate to be used in conjunction +with signed modules. By importing the public certificate into the 'db' +variable, a user can allow a module signed with that certificate to +load. The shim UEFI bootloader has a similar certificate list stored +in the 'MokListRT' variable. We import those as well. + +Secure Boot also maintains a list of disallowed certificates in the 'dbx' +variable. We load those certificates into the newly introduced system +blacklist keyring and forbid any module signed with those from loading and +forbid the use within the kernel of any key with a matching hash. + +This facility is enabled by setting CONFIG_LOAD_UEFI_KEYS. + +Signed-off-by: Josh Boyer +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + certs/Kconfig | 16 ++++++ + certs/Makefile | 4 ++ + certs/load_uefi.c | 168 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 188 insertions(+) + create mode 100644 certs/load_uefi.c + +diff --git a/certs/Kconfig b/certs/Kconfig +index 630ae09..edf9f75 100644 +--- a/certs/Kconfig ++++ b/certs/Kconfig +@@ -90,4 +90,20 @@ config EFI_SIGNATURE_LIST_PARSER + This option provides support for parsing EFI signature lists for + X.509 certificates and turning them into keys. + ++config LOAD_UEFI_KEYS ++ bool "Load certs and blacklist from UEFI db for module checking" ++ depends on SYSTEM_BLACKLIST_KEYRING ++ depends on SECONDARY_TRUSTED_KEYRING ++ depends on EFI ++ depends on EFI_SIGNATURE_LIST_PARSER ++ help ++ If the kernel is booted in secure boot mode, this option will cause ++ the kernel to load the certificates from the UEFI db and MokListRT ++ into the secondary trusted keyring. It will also load any X.509 ++ SHA256 hashes in the dbx list into the blacklist. ++ ++ The effect of this is that, if the kernel is booted in secure boot ++ mode, modules signed with UEFI-stored keys will be permitted to be ++ loaded and keys that match the blacklist will be rejected. ++ + endmenu +diff --git a/certs/Makefile b/certs/Makefile +index ffe8715..4b18d4e 100644 +--- a/certs/Makefile ++++ b/certs/Makefile +@@ -11,6 +11,10 @@ obj-$(CONFIG_SYSTEM_BLACKLIST_KEYRING) += blacklist_nohashes.o + endif + obj-$(CONFIG_EFI_SIGNATURE_LIST_PARSER) += efi_parser.o + ++obj-$(CONFIG_LOAD_UEFI_KEYS) += load_uefi.o ++$(obj)/load_uefi.o: KBUILD_CFLAGS += -fshort-wchar ++ ++ + ifeq ($(CONFIG_SYSTEM_TRUSTED_KEYRING),y) + + $(eval $(call config_filename,SYSTEM_TRUSTED_KEYS)) +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +new file mode 100644 +index 0000000..b44e464 +--- /dev/null ++++ b/certs/load_uefi.c +@@ -0,0 +1,168 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "internal.h" ++ ++static __initdata efi_guid_t efi_cert_x509_guid = EFI_CERT_X509_GUID; ++static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GUID; ++static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; ++ ++/* ++ * Get a certificate list blob from the named EFI variable. ++ */ ++static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, ++ unsigned long *size) ++{ ++ efi_status_t status; ++ unsigned long lsize = 4; ++ unsigned long tmpdb[4]; ++ void *db; ++ ++ status = efi.get_variable(name, guid, NULL, &lsize, &tmpdb); ++ if (status != EFI_BUFFER_TOO_SMALL) { ++ pr_err("Couldn't get size: 0x%lx\n", status); ++ return NULL; ++ } ++ ++ db = kmalloc(lsize, GFP_KERNEL); ++ if (!db) { ++ pr_err("Couldn't allocate memory for uefi cert list\n"); ++ return NULL; ++ } ++ ++ status = efi.get_variable(name, guid, NULL, &lsize, db); ++ if (status != EFI_SUCCESS) { ++ kfree(db); ++ pr_err("Error reading db var: 0x%lx\n", status); ++ return NULL; ++ } ++ ++ *size = lsize; ++ return db; ++} ++ ++/* ++ * Blacklist an X509 TBS hash. ++ */ ++static __init void uefi_blacklist_x509_tbs(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "tbs:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Blacklist the hash of an executable. ++ */ ++static __init void uefi_blacklist_binary(const char *source, ++ const void *data, size_t len) ++{ ++ char *hash, *p; ++ ++ hash = kmalloc(4 + len * 2 + 1, GFP_KERNEL); ++ if (!hash) ++ return; ++ p = memcpy(hash, "bin:", 4); ++ p += 4; ++ bin2hex(p, data, len); ++ p += len * 2; ++ *p = 0; ++ ++ mark_hash_blacklisted(hash); ++ kfree(hash); ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI db and MokListRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_db(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_guid) == 0) ++ return add_trusted_secondary_key; ++ return 0; ++} ++ ++/* ++ * Return the appropriate handler for particular signature list types found in ++ * the UEFI dbx and MokListXRT tables. ++ */ ++static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_type) ++{ ++ if (efi_guidcmp(*sig_type, efi_cert_x509_sha256_guid) == 0) ++ return uefi_blacklist_x509_tbs; ++ if (efi_guidcmp(*sig_type, efi_cert_sha256_guid) == 0) ++ return uefi_blacklist_binary; ++ return 0; ++} ++ ++/* ++ * Load the certs contained in the UEFI databases ++ */ ++static int __init load_uefi_certs(void) ++{ ++ efi_guid_t secure_var = EFI_IMAGE_SECURITY_DATABASE_GUID; ++ efi_guid_t mok_var = EFI_SHIM_LOCK_GUID; ++ void *db = NULL, *dbx = NULL, *mok = NULL; ++ unsigned long dbsize = 0, dbxsize = 0, moksize = 0; ++ int rc = 0; ++ ++ if (!efi.get_variable) ++ return false; ++ ++ /* Get db, MokListRT, and dbx. They might not exist, so it isn't ++ * an error if we can't get them. ++ */ ++ db = get_cert_list(L"db", &secure_var, &dbsize); ++ if (!db) { ++ pr_err("MODSIGN: Couldn't get UEFI db list\n"); ++ } else { ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); ++ if (rc) ++ pr_err("Couldn't parse db signatures: %d\n", rc); ++ kfree(db); ++ } ++ ++ mok = get_cert_list(L"MokListRT", &mok_var, &moksize); ++ if (!mok) { ++ pr_info("MODSIGN: Couldn't get UEFI MokListRT\n"); ++ } else { ++ rc = parse_efi_signature_list("UEFI:MokListRT", ++ mok, moksize, get_handler_for_db); ++ if (rc) ++ pr_err("Couldn't parse MokListRT signatures: %d\n", rc); ++ kfree(mok); ++ } ++ ++ dbx = get_cert_list(L"dbx", &secure_var, &dbxsize); ++ if (!dbx) { ++ pr_info("MODSIGN: Couldn't get UEFI dbx list\n"); ++ } else { ++ rc = parse_efi_signature_list("UEFI:dbx", ++ dbx, dbxsize, ++ get_handler_for_dbx); ++ if (rc) ++ pr_err("Couldn't parse dbx signatures: %d\n", rc); ++ kfree(dbx); ++ } ++ ++ return rc; ++} ++late_initcall(load_uefi_certs); +-- +2.6.2 + diff --git a/patches.suse/0004-MODSIGN-checking-the-blacklisted-hash-before-loading.patch b/patches.suse/0004-MODSIGN-checking-the-blacklisted-hash-before-loading.patch new file mode 100644 index 0000000..68837d0 --- /dev/null +++ b/patches.suse/0004-MODSIGN-checking-the-blacklisted-hash-before-loading.patch @@ -0,0 +1,120 @@ +From 6a3f34b43ad377eb7473425f7525e403de384be5 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Wed, 29 Nov 2017 18:44:57 +0800 +Subject: [PATCH 4/4] MODSIGN: checking the blacklisted hash before loading a + kernel module +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/10082315/ +References: fate#316531, bnc#854875 + +This patch adds the logic for checking the kernel module's hash +base on blacklist. The hash must be generated by sha256 and enrolled +to dbx/mokx. + +For example: + sha256sum sample.ko + mokutil --mokx --import-hash $HASH_RESULT + +Whether the signature on ko file is stripped or not, the hash can be +compared by kernel. + +Signed-off-by: Lee, Chun-Yi +--- + kernel/module_signing.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 59 insertions(+), 2 deletions(-) + +--- a/kernel/module_signing.c ++++ b/kernel/module_signing.c +@@ -15,6 +15,8 @@ + #include + #include + #include ++#include ++#include + #include "module-internal.h" + + enum pkey_id_type { +@@ -43,19 +45,67 @@ struct module_signature { + __be32 sig_len; /* Length of signature data */ + }; + ++static int mod_is_hash_blacklisted(const void *mod, size_t verifylen) ++{ ++ struct crypto_shash *tfm; ++ struct shash_desc *desc; ++ size_t digest_size, desc_size; ++ u8 *digest; ++ int ret = 0; ++ ++ tfm = crypto_alloc_shash("sha256", 0, 0); ++ if (IS_ERR(tfm)) ++ goto error_return; ++ ++ desc_size = crypto_shash_descsize(tfm) + sizeof(*desc); ++ digest_size = crypto_shash_digestsize(tfm); ++ digest = kzalloc(digest_size + desc_size, GFP_KERNEL); ++ if (!digest) { ++ pr_err("digest memory buffer allocate fail\n"); ++ ret = -ENOMEM; ++ goto error_digest; ++ } ++ desc = (void *)digest + digest_size; ++ desc->tfm = tfm; ++ desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP; ++ ret = crypto_shash_init(desc); ++ if (ret < 0) ++ goto error_shash; ++ ++ ret = crypto_shash_finup(desc, mod, verifylen, digest); ++ if (ret < 0) ++ goto error_shash; ++ ++ pr_debug("%ld digest: %*phN\n", verifylen, (int) digest_size, digest); ++ ++ ret = is_hash_blacklisted(digest, digest_size, "bin"); ++ if (ret == -EKEYREJECTED) ++ pr_err("Module hash %*phN is blacklisted\n", ++ (int) digest_size, digest); ++ ++error_shash: ++ kfree(digest); ++error_digest: ++ crypto_free_shash(tfm); ++error_return: ++ return ret; ++} ++ + /* + * Verify the signature on a module. + */ + int mod_verify_sig(const void *mod, struct load_info *info) + { + struct module_signature ms; +- size_t modlen = info->len, sig_len; ++ size_t modlen = info->len, sig_len, wholelen; ++ int ret; + + pr_devel("==>%s(,%zu)\n", __func__, modlen); + + if (modlen <= sizeof(ms)) + return -EBADMSG; + ++ wholelen = modlen + sizeof(MODULE_SIG_STRING) - 1; + memcpy(&ms, mod + (modlen - sizeof(ms)), sizeof(ms)); + modlen -= sizeof(ms); + +@@ -83,7 +133,14 @@ int mod_verify_sig(const void *mod, stru + return -EBADMSG; + } + +- return verify_pkcs7_signature(mod, modlen, mod + modlen, sig_len, ++ ret = verify_pkcs7_signature(mod, modlen, mod + modlen, sig_len, + (void *)1UL, VERIFYING_MODULE_SIGNATURE, + NULL, NULL); ++ pr_devel("verify_pkcs7_signature() = %d\n", ret); ++ ++ /* checking hash of module is in blacklist */ ++ if (!ret) ++ ret = mod_is_hash_blacklisted(mod, wholelen); ++ ++ return ret; + } diff --git a/patches.suse/0004-PCI-mobiveil-correct-the-returned-error-number.patch b/patches.suse/0004-PCI-mobiveil-correct-the-returned-error-number.patch new file mode 100644 index 0000000..c24cad6 --- /dev/null +++ b/patches.suse/0004-PCI-mobiveil-correct-the-returned-error-number.patch @@ -0,0 +1,57 @@ +From 253faf87290b55809cd2fa2a70eac4fe2e33721b Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:08:47 +0000 +Subject: [PATCH 04/26] PCI: mobiveil: correct the returned error number + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +This patch corrected the returned error number by convention, +and removed a unnecessary error check. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 8 +++----- + 1 file changed, 3 insertions(+), 5 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index b48e8e9ed779..33615646806e 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -826,7 +826,7 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) + + if (!pcie->intx_domain) { + dev_err(dev, "Failed to get a INTx IRQ domain\n"); +- return -ENODEV; ++ return -ENOMEM; + } + + raw_spin_lock_init(&pcie->intx_mask_lock); +@@ -853,11 +853,9 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) + /* allocate the PCIe port */ + bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie)); + if (!bridge) +- return -ENODEV; ++ return -ENOMEM; + + pcie = pci_host_bridge_priv(bridge); +- if (!pcie) +- return -ENOMEM; + + pcie->pdev = pdev; + +@@ -874,7 +872,7 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) + &pcie->resources, &iobase); + if (ret) { + dev_err(dev, "Getting bridge resources failed\n"); +- return -ENOMEM; ++ return ret; + } + + /* +-- +2.11.0 + diff --git a/patches.suse/0004-btrfs-Introduce-2-more-members-to-struct-btrfs_fs_de.patch b/patches.suse/0004-btrfs-Introduce-2-more-members-to-struct-btrfs_fs_de.patch new file mode 100644 index 0000000..94005b3 --- /dev/null +++ b/patches.suse/0004-btrfs-Introduce-2-more-members-to-struct-btrfs_fs_de.patch @@ -0,0 +1,81 @@ +From 3985fb80d0d37810e55ef328c9c406d0e963c444 Mon Sep 17 00:00:00 2001 +From: Nikolay Borisov +Date: Wed, 10 Oct 2018 12:48:41 +0300 +Subject: [PATCH 4/6] btrfs: Introduce 2 more members to struct + btrfs_fs_devices +References: fate#325871 +Patch-mainline: Submitted, awaiting review + +In order to gracefully handle split-brain scenario which are very +unlikely, yet possible, while performing the FSID change I'm +gonna need two more pieces of information: + + 1. The highest generation number among all devices registered to a + particular btrfs_fs_devices + + 2. A boolean flag whether a given btrfs_fs_devices was created by a + device which had the FSID_CHANGING_V2 flag set. + +This is a preparatory patch and just introduces the variables as well +as code which sets them, their actual use is going to happen in a later +patch. + +Signed-off-by: Nikolay Borisov +--- + fs/btrfs/volumes.c | 9 ++++++++- + fs/btrfs/volumes.h | 4 ++++ + 2 files changed, 12 insertions(+), 1 deletion(-) + +--- a/fs/btrfs/volumes.c ++++ b/fs/btrfs/volumes.c +@@ -634,6 +634,8 @@ static noinline int device_list_add(cons + u64 found_transid = btrfs_super_generation(disk_super); + bool has_metadata_uuid = (btrfs_super_incompat_flags(disk_super) & + BTRFS_FEATURE_INCOMPAT_METADATA_UUID); ++ bool fsid_change_in_progress = (btrfs_super_flags(disk_super) & ++ BTRFS_SUPER_FLAG_CHANGING_FSID_V2); + + if (has_metadata_uuid) + fs_devices = find_fsid(disk_super->fsid, disk_super->metadata_uuid); +@@ -650,6 +652,8 @@ static noinline int device_list_add(cons + if (IS_ERR(fs_devices)) + return PTR_ERR(fs_devices); + ++ fs_devices->fsid_change = fsid_change_in_progress; ++ + list_add(&fs_devices->list, &fs_uuids); + + device = NULL; +@@ -738,8 +742,11 @@ static noinline int device_list_add(cons + * it back. We need it to pick the disk with largest generation + * (as above). + */ +- if (!fs_devices->opened) ++ if (!fs_devices->opened) { + device->generation = found_transid; ++ fs_devices->latest_generation = max(found_transid, ++ fs_devices->latest_generation); ++ } + + /* + * if there is new btrfs on an already registered device, +--- a/fs/btrfs/volumes.h ++++ b/fs/btrfs/volumes.h +@@ -220,6 +220,7 @@ BTRFS_DEVICE_GETSET_FUNCS(bytes_used); + struct btrfs_fs_devices { + u8 fsid[BTRFS_FSID_SIZE]; /* FS specific uuid */ + u8 metadata_uuid[BTRFS_FSID_SIZE]; ++ bool fsid_change; + + u64 num_devices; + u64 open_devices; +@@ -229,6 +230,9 @@ struct btrfs_fs_devices { + u64 total_devices; + struct block_device *latest_bdev; + ++ /* Highest generation number of seen devices */ ++ u64 latest_generation; ++ + /* all of the devices in the FS, protected by a mutex + * so we can safely walk it to write out the supers without + * worrying about add/remove by the multi-device code. diff --git a/patches.suse/0005-MODSIGN-Allow-the-db-UEFI-variable-to-be-suppressed.patch b/patches.suse/0005-MODSIGN-Allow-the-db-UEFI-variable-to-be-suppressed.patch new file mode 100644 index 0000000..e792409 --- /dev/null +++ b/patches.suse/0005-MODSIGN-Allow-the-db-UEFI-variable-to-be-suppressed.patch @@ -0,0 +1,94 @@ +From 7c395b30a33a617c5cc2cdd419300af71277b79a Mon Sep 17 00:00:00 2001 +From: Josh Boyer +Date: Thu, 3 Aug 2017 16:17:46 +0100 +Subject: [PATCH 5/6] MODSIGN: Allow the "db" UEFI variable to be suppressed + +Patch-mainline: Queued in subsystem maintainer repository +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git +Git-commit: 7c395b30a33a617c5cc2cdd419300af71277b79a +References: fate#314508 + +If a user tells shim to not use the certs/hashes in the UEFI db variable +for verification purposes, shim will set a UEFI variable called +MokIgnoreDB. Have the uefi import code look for this and ignore the db +variable if it is found. + +Signed-off-by: Josh Boyer +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + certs/load_uefi.c | 44 ++++++++++++++++++++++++++++++++++---------- + 1 file changed, 34 insertions(+), 10 deletions(-) + +diff --git a/certs/load_uefi.c b/certs/load_uefi.c +index b44e464..3d88459 100644 +--- a/certs/load_uefi.c ++++ b/certs/load_uefi.c +@@ -13,6 +13,26 @@ static __initdata efi_guid_t efi_cert_x509_sha256_guid = EFI_CERT_X509_SHA256_GU + static __initdata efi_guid_t efi_cert_sha256_guid = EFI_CERT_SHA256_GUID; + + /* ++ * Look to see if a UEFI variable called MokIgnoreDB exists and return true if ++ * it does. ++ * ++ * This UEFI variable is set by the shim if a user tells the shim to not use ++ * the certs/hashes in the UEFI db variable for verification purposes. If it ++ * is set, we should ignore the db variable also and the true return indicates ++ * this. ++ */ ++static __init bool uefi_check_ignore_db(void) ++{ ++ efi_status_t status; ++ unsigned int db = 0; ++ unsigned long size = sizeof(db); ++ efi_guid_t guid = EFI_SHIM_LOCK_GUID; ++ ++ status = efi.get_variable(L"MokIgnoreDB", &guid, NULL, &size, &db); ++ return status == EFI_SUCCESS; ++} ++ ++/* + * Get a certificate list blob from the named EFI variable. + */ + static __init void *get_cert_list(efi_char16_t *name, efi_guid_t *guid, +@@ -113,7 +133,9 @@ static __init efi_element_handler_t get_handler_for_dbx(const efi_guid_t *sig_ty + } + + /* +- * Load the certs contained in the UEFI databases ++ * Load the certs contained in the UEFI databases into the secondary trusted ++ * keyring and the UEFI blacklisted X.509 cert SHA256 hashes into the blacklist ++ * keyring. + */ + static int __init load_uefi_certs(void) + { +@@ -129,15 +151,17 @@ static int __init load_uefi_certs(void) + /* Get db, MokListRT, and dbx. They might not exist, so it isn't + * an error if we can't get them. + */ +- db = get_cert_list(L"db", &secure_var, &dbsize); +- if (!db) { +- pr_err("MODSIGN: Couldn't get UEFI db list\n"); +- } else { +- rc = parse_efi_signature_list("UEFI:db", +- db, dbsize, get_handler_for_db); +- if (rc) +- pr_err("Couldn't parse db signatures: %d\n", rc); +- kfree(db); ++ if (!uefi_check_ignore_db()) { ++ db = get_cert_list(L"db", &secure_var, &dbsize); ++ if (!db) { ++ pr_err("MODSIGN: Couldn't get UEFI db list\n"); ++ } else { ++ rc = parse_efi_signature_list("UEFI:db", ++ db, dbsize, get_handler_for_db); ++ if (rc) ++ pr_err("Couldn't parse db signatures: %d\n", rc); ++ kfree(db); ++ } + } + + mok = get_cert_list(L"MokListRT", &mok_var, &moksize); +-- +2.6.2 + diff --git a/patches.suse/0005-PCI-mobiveil-remove-flag-MSI_FLAG_MULTI_PCI_MSI.patch b/patches.suse/0005-PCI-mobiveil-remove-flag-MSI_FLAG_MULTI_PCI_MSI.patch new file mode 100644 index 0000000..7b36523 --- /dev/null +++ b/patches.suse/0005-PCI-mobiveil-remove-flag-MSI_FLAG_MULTI_PCI_MSI.patch @@ -0,0 +1,35 @@ +From 6796bc060461003a5deee756a20db8483d5eb48d Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:08:53 +0000 +Subject: [PATCH 05/26] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +The current code does not support multiple MSIs, so remove +the corresponding flag from the msi_domain_info structure. + +Fixes: 1e913e58335f ("PCI: mobiveil: Add MSI support") +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 33615646806e..02292b0a04a3 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -710,7 +710,7 @@ static struct irq_chip mobiveil_msi_irq_chip = { + + static struct msi_domain_info mobiveil_msi_domain_info = { + .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | +- MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), ++ MSI_FLAG_PCI_MSIX), + .chip = &mobiveil_msi_irq_chip, + }; + +-- +2.11.0 + diff --git a/patches.suse/0005-btrfs-Handle-one-more-split-brain-scenario-during-fs.patch b/patches.suse/0005-btrfs-Handle-one-more-split-brain-scenario-during-fs.patch new file mode 100644 index 0000000..ec78a6a --- /dev/null +++ b/patches.suse/0005-btrfs-Handle-one-more-split-brain-scenario-during-fs.patch @@ -0,0 +1,166 @@ +From 75ce0a496c6cbc49fa8e2315333cf1ba5bc5bd6e Mon Sep 17 00:00:00 2001 +From: Nikolay Borisov +Date: Wed, 10 Oct 2018 14:16:42 +0300 +Subject: [PATCH 5/6] btrfs: Handle one more split-brain scenario during fsid + change +References: fate#325871 +Patch-mainline: Submitted, awaiting review + +This commit continues hardening the scanning code to handle cases where +power loss could have caused disks in a multi-disk filesystem to be +in inconsistent state. Namely handle the situation that can occur when +some of the disks in multi-disk fs have completed their fsid change i.e +they have METADATA_UUID incompat flag set, have cleared the +CHANGING_FSID_V2 flag and their fsid/metadata_uuid are different. At +the same time the other half of the disks will have their +fsid/metadata_uuid unchanged and will only have CHANGING_FSID_V2 flag. + +This is handled by introducing code in the scan path which: + + a) Handles the case when a device with CHANGING_FSID_V2 flag is + scanned and as a result btrfs_fs_devices is created with matching + fsid/metdata_uuid. Subsequently, when a device with completed fsid + change is scanned it will detect this via the new code in find_fsid + i.e that such an fs_devices exist that fsid_change flag is set to true, + it's metadata_uuid/fsid match and the metadata_uuid of the scanned + device matches that of the fs_devices. In this case, it's important to + note that the devices which has its fsid change completed will have a + higher generation number than the device with FSID_CHANGING_V2 flag + set, so its superblock block will be used during mount. To prevent an + assertion triggering because the sb used for mounting will have + differing fsid/metadata_uuid than the ones in the fs_devices struct + also add code in device_list_add which overwrites the values in + fs_devices. + + b) Alternatively we can end up with a device that completed its + fsid change be scanned first which will create the respective + btrfs_fs_devices struct with differing fsid/metadata_uuid. In this + case when a device with FSID_CHANGING_V2 flag set is scanned it will + call the newly added find_fsid_inprogress function which will return + the correct fs_devices. + +Signed-off-by: Nikolay Borisov +--- + fs/btrfs/volumes.c | 77 +++++++++++++++++++++++++++++++++++++++++++--- + 1 file changed, 73 insertions(+), 4 deletions(-) + +diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c +index 0c6fdb069f47..68f6bae04d12 100644 +--- a/fs/btrfs/volumes.c ++++ b/fs/btrfs/volumes.c +@@ -285,6 +285,26 @@ static noinline struct btrfs_fs_devices *find_fsid(u8 *fsid, + + ASSERT(fsid); + ++ if (metadata_uuid) { ++ ++ /* ++ * Handle scanned device having completed its fsid change but ++ * belonging to a fs_devices that was created by first scanning ++ * a device which didn't have it's fsid/metadata_uuid changed ++ * at all and the CHANGING_FSID_V2 flag set. ++ */ ++ list_for_each_entry(fs_devices, &fs_uuids, list) { ++ if (fs_devices->fsid_change && ++ memcmp(metadata_uuid, fs_devices->fsid, ++ BTRFS_FSID_SIZE) == 0 && ++ memcmp(fs_devices->fsid, fs_devices->metadata_uuid, ++ BTRFS_FSID_SIZE) == 0) { ++ return fs_devices; ++ } ++ } ++ } ++ ++ /* Handle non-split brain cases */ + list_for_each_entry(fs_devices, &fs_uuids, list) { + if (metadata_uuid) { + if (memcmp(fsid, fs_devices->fsid, BTRFS_FSID_SIZE) == 0 +@@ -615,6 +635,27 @@ void btrfs_free_stale_device(struct btrfs_device *cur_dev) + } + } + ++/* ++ * Handle scanned device having its CHANGING_FSID_V2 flag set and the fs_devices ++ * being created with a disk that has already completed its fsid change. ++ */ ++static struct btrfs_fs_devices *find_fsid_inprogress( ++ struct btrfs_super_block *disk_super) ++{ ++ struct btrfs_fs_devices *fs_devices; ++ ++ list_for_each_entry(fs_devices, &fs_uuids, list) { ++ if (memcmp(fs_devices->metadata_uuid, fs_devices->fsid, ++ BTRFS_FSID_SIZE) != 0 && ++ memcmp(fs_devices->metadata_uuid, disk_super->fsid, ++ BTRFS_FSID_SIZE) == 0 && !fs_devices->fsid_change) { ++ return fs_devices; ++ } ++ } ++ ++ return NULL; ++} ++ + /* + * Add new device to list of registered devices + * +@@ -628,7 +669,7 @@ static noinline int device_list_add(const char *path, + u64 devid, struct btrfs_fs_devices **fs_devices_ret) + { + struct btrfs_device *device; +- struct btrfs_fs_devices *fs_devices; ++ struct btrfs_fs_devices *fs_devices = NULL; + struct rcu_string *name; + int ret = 0; + u64 found_transid = btrfs_super_generation(disk_super); +@@ -637,10 +678,23 @@ static noinline int device_list_add(const char *path, + bool fsid_change_in_progress = (btrfs_super_flags(disk_super) & + BTRFS_SUPER_FLAG_CHANGING_FSID_V2); + +- if (has_metadata_uuid) +- fs_devices = find_fsid(disk_super->fsid, disk_super->metadata_uuid); +- else ++ if (fsid_change_in_progress && !has_metadata_uuid) { ++ /* ++ * When we have an image which has CHANGING_FSID_V2 set it might ++ * belong to either a filesystem which has disks with completed ++ * fsid change or it might belong to fs with no uuid changes in ++ * effect, handle both. ++ */ ++ fs_devices = find_fsid_inprogress(disk_super); ++ if (!fs_devices) ++ fs_devices = find_fsid(disk_super->fsid, NULL); ++ ++ } else if (has_metadata_uuid) { ++ fs_devices = find_fsid(disk_super->fsid, ++ disk_super->metadata_uuid); ++ } else { + fs_devices = find_fsid(disk_super->fsid, NULL); ++ } + + if (!fs_devices) { + if (has_metadata_uuid) +@@ -660,6 +714,21 @@ static noinline int device_list_add(const char *path, + } else { + device = __find_device(&fs_devices->devices, devid, + disk_super->dev_item.uuid); ++ ++ /* ++ * If this disk has been pulled into an fs devices created by ++ * a device which had the FSID_CHANGING flag then replace the ++ * metadata_uuid/fsid values of the fs_devices. ++ */ ++ if (has_metadata_uuid && fs_devices->fsid_change && ++ found_transid > fs_devices->latest_generation) { ++ memcpy(fs_devices->fsid, disk_super->fsid, ++ BTRFS_FSID_SIZE); ++ memcpy(fs_devices->metadata_uuid, ++ disk_super->metadata_uuid, BTRFS_FSID_SIZE); ++ ++ fs_devices->fsid_change = false; ++ } + } + + if (!device) { +-- +2.17.1 + diff --git a/patches.suse/0005-efi-generate-secret-key-in-EFI-boot-environment.patch b/patches.suse/0005-efi-generate-secret-key-in-EFI-boot-environment.patch new file mode 100644 index 0000000..4279dd0 --- /dev/null +++ b/patches.suse/0005-efi-generate-secret-key-in-EFI-boot-environment.patch @@ -0,0 +1,553 @@ +From a52895e103adf8dcaf94f481dec8a6098caccc99 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Tue, 12 Dec 2017 12:57:50 +0800 +Subject: [PATCH 05/11] efi: generate secret key in EFI boot environment +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +When secure boot is enabled, only signed EFI execution can access +EFI boot service variable before ExitBootService. Which means the +EFI boot service variable is secure. + +This patch add a function to EFI stub to generate a 512-bit random +number that it can be used as a secret key for HMAC or AES. This +secret key will be kept in EFI boot service variable. EFI stub +reads and transfers secret key to runtime kernel by setup data. + +At runtime, the secret key will be kept in hidden area to prevent +leak from accessing by user space. Hibernation uses EFI secret key +to encrypt hidden area and sign the snapshot image. + +Signed-off-by: Lee, Chun-Yi +--- + arch/x86/boot/compressed/Makefile | 1 + arch/x86/boot/compressed/cpuflags.c | 2 + arch/x86/boot/compressed/eboot.c | 3 + arch/x86/boot/compressed/efi_secret_key.c | 210 ++++++++++++++++++++++++++++++ + arch/x86/boot/compressed/misc.c | 2 + arch/x86/boot/compressed/misc.h | 18 +- + arch/x86/include/asm/efi.h | 13 + + arch/x86/include/uapi/asm/bootparam.h | 1 + arch/x86/kernel/setup.c | 19 ++ + drivers/firmware/efi/Kconfig | 16 ++ + drivers/firmware/efi/Makefile | 1 + drivers/firmware/efi/efi-secret-key.c | 84 ++++++++++++ + include/linux/efi.h | 19 ++ + 13 files changed, 378 insertions(+), 11 deletions(-) + create mode 100644 arch/x86/boot/compressed/efi_secret_key.c + create mode 100644 drivers/firmware/efi/efi-secret-key.c + +--- a/arch/x86/boot/compressed/Makefile ++++ b/arch/x86/boot/compressed/Makefile +@@ -81,6 +81,7 @@ endif + + $(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone + ++vmlinux-objs-$(CONFIG_EFI_SECRET_KEY) += $(obj)/efi_secret_key.o + vmlinux-objs-$(CONFIG_EFI_STUB) += $(obj)/eboot.o $(obj)/efi_stub_$(BITS).o \ + $(objtree)/drivers/firmware/efi/libstub/lib.a + vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o +--- a/arch/x86/boot/compressed/cpuflags.c ++++ b/arch/x86/boot/compressed/cpuflags.c +@@ -1,4 +1,4 @@ +-#ifdef CONFIG_RANDOMIZE_BASE ++#if defined(CONFIG_RANDOMIZE_BASE) || defined(CONFIG_EFI_SECRET_KEY) + + #include "../cpuflags.c" + +--- a/arch/x86/boot/compressed/eboot.c ++++ b/arch/x86/boot/compressed/eboot.c +@@ -1001,6 +1001,9 @@ struct boot_params *efi_main(struct efi_ + + setup_efi_pci(boot_params); + ++ if (boot_params->secure_boot == efi_secureboot_mode_enabled) ++ efi_setup_secret_key(sys_table, boot_params); ++ + setup_quirks(boot_params); + + status = efi_call_early(allocate_pool, EFI_LOADER_DATA, +--- /dev/null ++++ b/arch/x86/boot/compressed/efi_secret_key.c +@@ -0,0 +1,210 @@ ++/* EFI secret key generator ++ * ++ * Copyright (C) 2017 Lee, Chun-Yi ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++#include "misc.h" ++ ++static efi_system_table_t *s_table; ++static struct boot_params *b_params; ++ ++#ifdef DEBUG ++#define debug_putstr(__x) efi_printk(s_table, (char *)__x) ++#else ++#define debug_putstr(__x) ++#endif ++ ++static void efi_printk_status(char *reason, efi_status_t status) ++{ ++ efi_printk(s_table, reason); ++ efi_printk(s_table, efi_status_to_str(status)); ++ efi_printk(s_table, "\n"); ++} ++ ++static unsigned long get_boot_seed(void) ++{ ++ unsigned long hash = 0; ++ ++ hash = rotate_xor(hash, build_str, sizeof(build_str)); ++ hash = rotate_xor(hash, b_params, sizeof(*b_params)); ++ ++ return hash; ++} ++ ++#include "../../lib/random.c" ++ ++static void generate_secret_key(u8 key[], unsigned int size) ++{ ++ unsigned int bfill = size; ++ ++ if (key == NULL || !size) ++ return; ++ ++ memset(key, 0, size); ++ while (bfill > 0) { ++ unsigned long entropy = 0; ++ unsigned int copy_len = 0; ++ entropy = get_random_long("EFI secret key"); ++ copy_len = (bfill < sizeof(entropy)) ? bfill : sizeof(entropy); ++ memcpy((void *)(key + size - bfill), &entropy, copy_len); ++ bfill -= copy_len; ++ } ++} ++ ++#define get_efi_var(name, vendor, ...) \ ++ efi_call_runtime(get_variable, \ ++ (efi_char16_t *)(name), (efi_guid_t *)(vendor), \ ++ __VA_ARGS__); ++#define set_efi_var(name, vendor, ...) \ ++ efi_call_runtime(set_variable, \ ++ (efi_char16_t *)(name), (efi_guid_t *)(vendor), \ ++ __VA_ARGS__); ++ ++static efi_char16_t const secret_key_name[] = { ++ 'S', 'e', 'c', 'r', 'e', 't', 'K', 'e', 'y', 0 ++}; ++#define SECRET_KEY_ATTRIBUTE (EFI_VARIABLE_NON_VOLATILE | \ ++ EFI_VARIABLE_BOOTSERVICE_ACCESS) ++ ++static efi_status_t get_secret_key(unsigned long *attributes, ++ unsigned long *key_size, ++ struct efi_skey_setup_data *skey_setup) ++{ ++ void *key_data; ++ efi_status_t status; ++ ++ status = efi_call_early(allocate_pool, EFI_LOADER_DATA, ++ *key_size, &key_data); ++ if (status != EFI_SUCCESS) { ++ efi_printk_status("Failed to allocate mem: \n", status); ++ return status; ++ } ++ memset(key_data, 0, *key_size); ++ status = get_efi_var(secret_key_name, &EFI_SECRET_GUID, ++ attributes, key_size, key_data); ++ if (status != EFI_SUCCESS) { ++ efi_printk_status("Failed to get secret key: ", status); ++ goto err; ++ } ++ ++ memset(skey_setup->secret_key, 0, SECRET_KEY_SIZE); ++ memcpy(skey_setup->secret_key, key_data, ++ (*key_size >= SECRET_KEY_SIZE) ? SECRET_KEY_SIZE : *key_size); ++err: ++ efi_call_early(free_pool, key_data); ++ return status; ++} ++ ++static efi_status_t remove_secret_key(unsigned long attributes) ++{ ++ efi_status_t status; ++ ++ status = set_efi_var(secret_key_name, ++ &EFI_SECRET_GUID, attributes, 0, NULL); ++ if (status == EFI_SUCCESS) ++ efi_printk(s_table, "Removed secret key\n"); ++ else ++ efi_printk_status("Failed to remove secret key: ", status); ++ ++ return status; ++} ++ ++static efi_status_t create_secret_key(struct efi_skey_setup_data *skey_setup) ++{ ++ efi_status_t status; ++ ++ efi_printk(s_table, "Create new secret key\n"); ++ generate_secret_key(skey_setup->secret_key, SECRET_KEY_SIZE); ++ status = set_efi_var(secret_key_name, &EFI_SECRET_GUID, ++ SECRET_KEY_ATTRIBUTE, SECRET_KEY_SIZE, ++ skey_setup->secret_key); ++ if (status != EFI_SUCCESS) ++ efi_printk_status("Failed to write secret key: ", status); ++ ++ return status; ++} ++ ++static efi_status_t regen_secret_key(struct efi_skey_setup_data *skey_setup) ++{ ++ unsigned long attributes = 0; ++ unsigned long key_size = SECRET_KEY_SIZE; ++ efi_status_t status; ++ ++ status = remove_secret_key(attributes); ++ if (status == EFI_SUCCESS) ++ status = create_secret_key(skey_setup); ++ if (status == EFI_SUCCESS) ++ status = get_secret_key(&attributes, &key_size, skey_setup); ++} ++ ++void efi_setup_secret_key(efi_system_table_t *sys_table, struct boot_params *params) ++{ ++ struct setup_data *setup_data, *skey_setup_data; ++ unsigned long setup_size = 0; ++ unsigned long attributes = 0; ++ unsigned long key_size = 0; ++ struct efi_skey_setup_data *skey_setup; ++ efi_status_t status; ++ ++ s_table = sys_table; ++ b_params = params; ++ ++ setup_size = sizeof(struct setup_data) + sizeof(struct efi_skey_setup_data); ++ status = efi_call_early(allocate_pool, EFI_LOADER_DATA, ++ setup_size, &skey_setup_data); ++ if (status != EFI_SUCCESS) { ++ efi_printk(s_table, "Failed to allocate mem for secret key\n"); ++ return; ++ } ++ memset(skey_setup_data, 0, setup_size); ++ skey_setup = (struct efi_skey_setup_data *) skey_setup_data->data; ++ ++ /* detect the size of secret key variable */ ++ status = get_efi_var(secret_key_name, &EFI_SECRET_GUID, ++ &attributes, &key_size, NULL); ++ skey_setup->detect_status = status; ++ switch (status) { ++ case EFI_BUFFER_TOO_SMALL: ++ status = get_secret_key(&attributes, &key_size, skey_setup); ++ if (status != EFI_SUCCESS) ++ break; ++ if (attributes != SECRET_KEY_ATTRIBUTE) { ++ efi_printk(sys_table, "Found a unqualified secret key\n"); ++ status = regen_secret_key(skey_setup); ++ } ++ break; ++ ++ case EFI_NOT_FOUND: ++ status = create_secret_key(skey_setup); ++ if (status == EFI_SUCCESS) { ++ key_size = SECRET_KEY_SIZE; ++ status = get_secret_key(&attributes, &key_size, skey_setup); ++ } ++ break; ++ ++ default: ++ efi_printk_status("Failed to detect secret key's size: ", status); ++ } ++ ++ skey_setup->key_size = key_size; ++ skey_setup->final_status = status; ++ ++ skey_setup_data->type = SETUP_EFI_SECRET_KEY; ++ skey_setup_data->len = sizeof(struct efi_skey_setup_data); ++ skey_setup_data->next = 0; ++ setup_data = (struct setup_data *)params->hdr.setup_data; ++ while (setup_data && setup_data->next) ++ setup_data = (struct setup_data *)setup_data->next; ++ if (setup_data) ++ setup_data->next = (unsigned long)skey_setup_data; ++ else ++ params->hdr.setup_data = (unsigned long)skey_setup_data; ++} +--- a/arch/x86/boot/compressed/misc.c ++++ b/arch/x86/boot/compressed/misc.c +@@ -412,7 +412,7 @@ asmlinkage __visible void *extract_kerne + return output; + } + +-#if CONFIG_RANDOMIZE_BASE ++#if defined(CONFIG_RANDOMIZE_BASE) || defined(CONFIG_EFI_SECRET_KEY) + unsigned long rotate_xor(unsigned long hash, const void *area, + size_t size) + { +--- a/arch/x86/boot/compressed/misc.h ++++ b/arch/x86/boot/compressed/misc.h +@@ -64,22 +64,24 @@ int cmdline_find_option(const char *opti + int cmdline_find_option_bool(const char *option); + #endif + +- +-#if CONFIG_RANDOMIZE_BASE ++#if defined(CONFIG_RANDOMIZE_BASE) || defined(CONFIG_EFI_SECRET_KEY) + #include + #include +-/* kaslr.c */ +-void choose_random_location(unsigned long input, +- unsigned long input_size, +- unsigned long *output, +- unsigned long output_size, +- unsigned long *virt_addr); + /* cpuflags.c */ + bool has_cpuflag(int flag); + /* Simplified build-specific string for starting entropy. */ + static const char build_str[] = UTS_RELEASE " (" LINUX_COMPILE_BY "@" + LINUX_COMPILE_HOST ") (" LINUX_COMPILER ") " UTS_VERSION; + unsigned long rotate_xor(unsigned long hash, const void *area, size_t size); ++#endif ++ ++#if CONFIG_RANDOMIZE_BASE ++/* kaslr.c */ ++void choose_random_location(unsigned long input, ++ unsigned long input_size, ++ unsigned long *output, ++ unsigned long output_size, ++ unsigned long *virt_addr); + #else + static inline void choose_random_location(unsigned long input, + unsigned long input_size, +--- a/arch/x86/include/asm/efi.h ++++ b/arch/x86/include/asm/efi.h +@@ -162,6 +162,16 @@ static inline bool efi_runtime_supported + extern struct console early_efi_console; + extern void parse_efi_setup(u64 phys_addr, u32 data_len); + ++#ifdef CONFIG_EFI_SECRET_KEY ++extern void efi_setup_secret_key(efi_system_table_t *table, ++ struct boot_params *params); ++extern void parse_efi_secret_key_setup(u64 phys_addr, u32 data_len); ++#else ++static inline void efi_setup_secret_key(efi_system_table_t *table, ++ struct boot_params *params) {} ++static inline void parse_efi_secret_key_setup(u64 phys_addr, u32 data_len) {} ++#endif /* CONFIG_EFI_SECRET_KEY */ ++ + extern void efifb_setup_from_dmi(struct screen_info *si, const char *opt); + + #ifdef CONFIG_EFI_MIXED +@@ -235,6 +245,9 @@ extern bool efi_reboot_required(void); + + #else + static inline void parse_efi_setup(u64 phys_addr, u32 data_len) {} ++static inline void parse_efi_secret_key_setup(u64 phys_addr, u32 data_len) {} ++static inline void efi_setup_secret_key(efi_system_table_t *table, ++ struct boot_params *params) {} + static inline bool efi_reboot_required(void) + { + return false; +--- a/arch/x86/include/uapi/asm/bootparam.h ++++ b/arch/x86/include/uapi/asm/bootparam.h +@@ -8,6 +8,7 @@ + #define SETUP_PCI 3 + #define SETUP_EFI 4 + #define SETUP_APPLE_PROPERTIES 5 ++#define SETUP_EFI_SECRET_KEY 6 + + /* ram_size flags */ + #define RAMDISK_IMAGE_START_MASK 0x07FF +--- a/arch/x86/kernel/setup.c ++++ b/arch/x86/kernel/setup.c +@@ -419,10 +419,22 @@ static void __init reserve_initrd(void) + } + #endif /* CONFIG_BLK_DEV_INITRD */ + ++static void __init remove_setup_data(u64 pa_prev, u64 pa_next) ++{ ++ struct setup_data *data; ++ ++ if (pa_prev) { ++ data = early_memremap(pa_prev, sizeof(*data)); ++ data->next = pa_next; ++ early_iounmap(data, sizeof(*data)); ++ } else ++ boot_params.hdr.setup_data = pa_next; ++} ++ + static void __init parse_setup_data(void) + { + struct setup_data *data; +- u64 pa_data, pa_next; ++ u64 pa_data, pa_next, pa_prev = 0; + + pa_data = boot_params.hdr.setup_data; + while (pa_data) { +@@ -444,9 +456,14 @@ static void __init parse_setup_data(void + case SETUP_EFI: + parse_efi_setup(pa_data, data_len); + break; ++ case SETUP_EFI_SECRET_KEY: ++ parse_efi_secret_key_setup(pa_data, data_len); ++ remove_setup_data(pa_prev, pa_next); ++ break; + default: + break; + } ++ pa_prev = pa_data; + pa_data = pa_next; + } + } +--- a/drivers/firmware/efi/Kconfig ++++ b/drivers/firmware/efi/Kconfig +@@ -142,6 +142,22 @@ config APPLE_PROPERTIES + + If unsure, say Y if you have a Mac. Otherwise N. + ++config EFI_SECRET_KEY ++ bool "EFI secret key" ++ default n ++ depends on EFI_STUB && X86 ++ select HIDDEN_AREA ++ help ++ This option enables the EFI secret key function in EFI stub. EFI ++ stub wll generate a 512-bit random number that it can be used as ++ a secret key by HMAC or AES. The secret key will be kept in EFI ++ oot service variable which is secure when secre boot is enabled. ++ At runtime, the secret key will be kept in hidden area to prevent ++ leak from accessing by user space. Hibernation uses EFI secret key ++ to encrypt hidden area and sign the snapshot image. ++ ++ If unsure, say N. ++ + endmenu + + config UEFI_CPER +--- a/drivers/firmware/efi/Makefile ++++ b/drivers/firmware/efi/Makefile +@@ -29,3 +29,4 @@ arm-obj-$(CONFIG_EFI) := arm-init.o ar + obj-$(CONFIG_ARM) += $(arm-obj-y) + obj-$(CONFIG_ARM64) += $(arm-obj-y) + obj-$(CONFIG_EFI_CAPSULE_LOADER) += capsule-loader.o ++obj-$(CONFIG_EFI_SECRET_KEY) += efi-secret-key.o +--- /dev/null ++++ b/drivers/firmware/efi/efi-secret-key.c +@@ -0,0 +1,84 @@ ++/* EFI secret key ++ * ++ * Copyright (C) 2017 Lee, Chun-Yi ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++ ++static u64 efi_skey_setup; ++static void *secret_key; ++ ++void __init parse_efi_secret_key_setup(u64 phys_addr, u32 data_len) ++{ ++ struct setup_data *skey_setup_data; ++ ++ /* reserve secret key setup data, will copy and erase later */ ++ efi_skey_setup = phys_addr + sizeof(struct setup_data); ++ memblock_reserve(efi_skey_setup, sizeof(struct efi_skey_setup_data)); ++ ++ /* clean setup data */ ++ skey_setup_data = early_memremap(phys_addr, data_len); ++ memset(skey_setup_data, 0, sizeof(struct setup_data)); ++ early_iounmap(skey_setup_data, data_len); ++} ++ ++static void __init ++print_efi_skey_setup_data(struct efi_skey_setup_data *skey_setup) ++{ ++ pr_debug("EFI secret key detection status: %s 0x%lx\n", ++ efi_status_to_str(skey_setup->detect_status), ++ skey_setup->detect_status); ++ pr_debug("EFI secret key getting status: %s 0x%lx\n", ++ efi_status_to_str(skey_setup->final_status), ++ skey_setup->final_status); ++ pr_debug("EFI secret key size: %ld\n", skey_setup->key_size); ++ ++ if (skey_setup->final_status != EFI_SUCCESS) { ++ pr_warn("EFI secret key getting failed: %s 0x%lx\n", ++ efi_status_to_str(skey_setup->final_status), ++ skey_setup->final_status); ++ } ++ if (skey_setup->key_size < SECRET_KEY_SIZE) { ++ pr_warn(KERN_CONT "EFI secret key size %ld is less than %d.", ++ skey_setup->key_size, SECRET_KEY_SIZE); ++ pr_warn(KERN_CONT " Please regenerate secret key\n"); ++ } ++} ++ ++static int __init init_efi_secret_key(void) ++{ ++ struct efi_skey_setup_data *skey_setup; ++ int ret = 0; ++ ++ if (!efi_skey_setup) ++ return -ENODEV; ++ ++ skey_setup = early_memremap(efi_skey_setup, ++ sizeof(struct efi_skey_setup_data)); ++ print_efi_skey_setup_data(skey_setup); ++ secret_key = memcpy_to_hidden_area(skey_setup->secret_key, ++ SECRET_KEY_SIZE); ++ if (!secret_key) ++ pr_info("copy secret key to hidden area failed\n"); ++ ++ /* earse key in setup data */ ++ memset(skey_setup->secret_key, 0, SECRET_KEY_SIZE); ++ early_iounmap(skey_setup, sizeof(struct efi_skey_setup_data)); ++ ++ return ret; ++} ++ ++void *get_efi_secret_key(void) ++{ ++ return secret_key; ++} ++EXPORT_SYMBOL(get_efi_secret_key); ++ ++late_initcall(init_efi_secret_key); +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -1617,4 +1617,23 @@ efi_status_to_str(efi_status_t status) + + return ""; + } ++ ++#ifdef CONFIG_EFI_SECRET_KEY ++#define EFI_SECRET_GUID \ ++ EFI_GUID(0x8c136d32, 0x039a, 0x4016, 0x8b, 0xb4, 0x9e, 0x98, 0x5e, 0x62, 0x78, 0x6f) ++#define SECRET_KEY_SIZE 64 ++struct efi_skey_setup_data { ++ unsigned long detect_status; ++ unsigned long final_status; ++ unsigned long key_size; ++ u8 secret_key[SECRET_KEY_SIZE]; ++}; ++extern void *get_efi_secret_key(void); ++#else ++#define SECRET_KEY_SIZE 0 ++static inline void *get_efi_secret_key(void) ++{ ++ return NULL; ++} ++#endif /* CONFIG_EFI_SECRET_KEY */ + #endif /* _LINUX_EFI_H */ diff --git a/patches.suse/0005-modsign-print-module-name-along-with-error-message.patch b/patches.suse/0005-modsign-print-module-name-along-with-error-message.patch new file mode 100644 index 0000000..357544c --- /dev/null +++ b/patches.suse/0005-modsign-print-module-name-along-with-error-message.patch @@ -0,0 +1,39 @@ +From 4f9ed1bb71eb48ec2c4c7d5c31b116e3fe161f36 Mon Sep 17 00:00:00 2001 +From: Jessica Yu +Date: Wed, 30 May 2018 10:46:28 +0200 +Subject: [PATCH 5/5] modsign: print module name along with error message +Patch-mainline: No, submitted https://lkml.kernel.org/r/20180530090830.20737-4-jeyu@kernel.org +References: bsc#1093666 + +It is useful to know which module failed signature verification, so +print the module name along with the error message. + +Signed-off-by: Jessica Yu +Acked-by: Jessica Yu +--- + kernel/module.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/kernel/module.c b/kernel/module.c +index 49b9c706bb1c..e2ae46d0abb9 100644 +--- a/kernel/module.c ++++ b/kernel/module.c +@@ -2860,11 +2860,13 @@ static int module_sig_check(struct load_info *info, int flags) + reason = "Loading of module with unavailable key"; + decide: + if (sig_enforce) { +- pr_notice("%s is rejected\n", reason); ++ pr_notice("%s: %s is rejected\n", ++ info->mod->name, reason); + return -EKEYREJECTED; + } + if (kernel_is_locked_down()) { +- pr_notice("%s is rejected, kernel is locked down\n", reason); ++ pr_notice("%s: %s is rejected, kernel is locked down\n", ++ info->mod->name, reason); + return -EPERM; + } + return 0; +-- +2.16.4 + diff --git a/patches.suse/0006-NFS-Allow-multiple-connections-to-NFSv3-and-NFSv4.0-.patch b/patches.suse/0006-NFS-Allow-multiple-connections-to-NFSv3-and-NFSv4.0-.patch new file mode 100644 index 0000000..adce39f --- /dev/null +++ b/patches.suse/0006-NFS-Allow-multiple-connections-to-NFSv3-and-NFSv4.0-.patch @@ -0,0 +1,26 @@ +From: Bennett Amodio +Date: Tue, 15 Aug 2017 17:48:43 -0700 +Subject: [PATCH] NFS: Allow multiple connections to NFSv4.0 servers +Patch-mainline: Submitted, linux-nfs@vger.kernel.org +References: fate#322786 + +Enable nconnect mount option and multipathing behavior for NFSv4.0. + +Signed-off-by: Jui-Yu Chang +Acked-by: NeilBrown + +--- + fs/nfs/nfs4client.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/nfs/nfs4client.c ++++ b/fs/nfs/nfs4client.c +@@ -879,7 +879,7 @@ static int nfs4_set_client(struct nfs_se + }; + struct nfs_client *clp; + +- if (minorversion > 0 && proto == XPRT_TRANSPORT_TCP) ++ if (proto == XPRT_TRANSPORT_TCP) + cl_init.nconnect = nconnect; + if (server->flags & NFS_MOUNT_NORESVPORT) + set_bit(NFS_CS_NORESVPORT, &cl_init.init_flags); diff --git a/patches.suse/0006-PCI-mobiveil-correct-PCI-base-address-in-MEM-IO-outb.patch b/patches.suse/0006-PCI-mobiveil-correct-PCI-base-address-in-MEM-IO-outb.patch new file mode 100644 index 0000000..7dd82d1 --- /dev/null +++ b/patches.suse/0006-PCI-mobiveil-correct-PCI-base-address-in-MEM-IO-outb.patch @@ -0,0 +1,42 @@ +From ad93730e19e3b3b17fcf4d074446a8c1f2b534aa Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:00 +0000 +Subject: [PATCH 06/26] PCI: mobiveil: correct PCI base address in MEM/IO + outbound windows + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +It should get PCI base address from the DT node property 'ranges' +to setup MEM/IO outbound windows instead of always zero. + +Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge +IP driver") +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa + +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 02292b0a04a3..5c0ca63ba9cf 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -637,8 +637,9 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + + /* configure outbound translation window */ + program_ob_windows(pcie, pcie->ob_wins_configured, +- win->res->start, 0, type, +- resource_size(win->res)); ++ win->res->start, ++ win->res->start - win->offset, ++ type, resource_size(win->res)); + } + + /* setup MSI hardware registers */ +-- +2.11.0 + diff --git a/patches.suse/0006-btrfs-Handle-final-split-brain-possibility-during-fs.patch b/patches.suse/0006-btrfs-Handle-final-split-brain-possibility-during-fs.patch new file mode 100644 index 0000000..c820110 --- /dev/null +++ b/patches.suse/0006-btrfs-Handle-final-split-brain-possibility-during-fs.patch @@ -0,0 +1,140 @@ +From c235aa32a6b03b717400c36a80c141a05ecfbc74 Mon Sep 17 00:00:00 2001 +From: Nikolay Borisov +Date: Wed, 10 Oct 2018 18:31:03 +0300 +Subject: [PATCH 6/6] btrfs: Handle final split-brain possibility during fsid + change +References: fate#325871 +Patch-mainline: Submitted, awaiting review + +This patch lands the last case which needs to be handled by the fsid +change code. Namely, this is the case where a multidisk filesystem has +already undergone at least one successful fsid change i.e all disks +have the METADATA_UUID incompat bit and power failure occurs as another +fsid change is in progress. When such an event occurs, disks could be +split in 2 groups. One of the groups will have both METADATA_UUID and +CHANGING_FSID_V2 flags set coupled with old fsid/metadata_uuid pairs. +The other group of disks will have only METADATA_UUID bit set and their +fsid will be different than the one in disks in the first group. Here +we look at the following cases: + + a) A disk from the first group is scanned first, so fs_devices is + created with stale fsid/metdata_uuid. Then when a disk from the + second group is scanned it needs to first check whether there exists + such an fs_devices that has fsid_change set to true (because it was + created with a disk having the CHANGING_FSID_V2 flag), the + metadata_uuid and fsid of the fs_devices will be different (since it was + created by a disk which already has had at least 1 successful fsid change) + and finally the metadata_uuid of the fs_devices will equal that of the + currently scanned disk (because metadata_uuid never really changes). + When the correct fs_devices is found the information from the scanned + disk will replace the current one in fs_devices since the scanned disk + will have higher generation number. + + b) A disk from the second group is scanned so fs_devices is created + as usual with differing fsid/metdata_uid. Then when a disk from the + first group is scanned the code detects that it has both + CHANGING_FSID_V2 and METADATA_UUID flags set and will search for + fs_devices that has differing metadata_uuid/fsid and whose + metadata_uuid is the same as that of the scanned device. + +Signed-off-by: Nikolay Borisov +--- + fs/btrfs/volumes.c | 66 ++++++++++++++++++++++++++++++++++++++-------- + 1 file changed, 55 insertions(+), 11 deletions(-) + +diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c +index 68f6bae04d12..18a7b95e0a07 100644 +--- a/fs/btrfs/volumes.c ++++ b/fs/btrfs/volumes.c +@@ -302,8 +302,25 @@ static noinline struct btrfs_fs_devices *find_fsid(u8 *fsid, + return fs_devices; + } + } ++ ++ /* ++ * Handle scanned device having completed its fsid change but ++ * belonging to a fs_devices that was created by a device that ++ * has an outdated pair of fsid/metadata_uuid and ++ * CHANGING_FSID_V2 flag set. ++ */ ++ list_for_each_entry(fs_devices, &fs_uuids, list) { ++ if (fs_devices->fsid_change && ++ memcmp(fs_devices->metadata_uuid, ++ fs_devices->fsid, BTRFS_FSID_SIZE) != 0 && ++ memcmp(metadata_uuid, fs_devices->metadata_uuid, ++ BTRFS_FSID_SIZE) == 0) { ++ return fs_devices; ++ } ++ } + } + ++ + /* Handle non-split brain cases */ + list_for_each_entry(fs_devices, &fs_uuids, list) { + if (metadata_uuid) { +@@ -656,6 +673,30 @@ static struct btrfs_fs_devices *find_fsid_inprogress( + return NULL; + } + ++static struct btrfs_fs_devices *find_fsid_changed( ++ struct btrfs_super_block *disk_super) ++{ ++ struct btrfs_fs_devices *fs_devices; ++ ++ /* ++ * Handles the case where scanned device is part of an fs that had ++ * multiple successful changes of FSID but curently device didn't ++ * observe it. Meaning our fsid will be different than theirs. ++ */ ++ list_for_each_entry(fs_devices, &fs_uuids, list) { ++ if (memcmp(fs_devices->metadata_uuid, fs_devices->fsid, ++ BTRFS_FSID_SIZE) != 0 && ++ memcmp(fs_devices->metadata_uuid, disk_super->metadata_uuid, ++ BTRFS_FSID_SIZE) == 0 && ++ memcmp(fs_devices->fsid, disk_super->fsid, ++ BTRFS_FSID_SIZE) != 0) { ++ return fs_devices; ++ } ++ } ++ ++ return NULL; ++} ++ + /* + * Add new device to list of registered devices + * +@@ -678,17 +719,20 @@ static noinline int device_list_add(const char *path, + bool fsid_change_in_progress = (btrfs_super_flags(disk_super) & + BTRFS_SUPER_FLAG_CHANGING_FSID_V2); + +- if (fsid_change_in_progress && !has_metadata_uuid) { +- /* +- * When we have an image which has CHANGING_FSID_V2 set it might +- * belong to either a filesystem which has disks with completed +- * fsid change or it might belong to fs with no uuid changes in +- * effect, handle both. +- */ +- fs_devices = find_fsid_inprogress(disk_super); +- if (!fs_devices) +- fs_devices = find_fsid(disk_super->fsid, NULL); +- ++ if (fsid_change_in_progress) { ++ if (!has_metadata_uuid) { ++ /* ++ * When we have an image which has CHANGING_FSID_V2 set ++ * it might belong to either a filesystem which has ++ * disks with completed fsid change or it might belong ++ * to fs with no uuid changes in effect, handle both. ++ */ ++ fs_devices = find_fsid_inprogress(disk_super); ++ if (!fs_devices) ++ fs_devices = find_fsid(disk_super->fsid, NULL); ++ } else { ++ fs_devices = find_fsid_changed(disk_super); ++ } + } else if (has_metadata_uuid) { + fs_devices = find_fsid(disk_super->fsid, + disk_super->metadata_uuid); +-- +2.17.1 + diff --git a/patches.suse/0006-efi-allow-user-to-regenerate-secret-key.patch b/patches.suse/0006-efi-allow-user-to-regenerate-secret-key.patch new file mode 100644 index 0000000..cf5a089 --- /dev/null +++ b/patches.suse/0006-efi-allow-user-to-regenerate-secret-key.patch @@ -0,0 +1,247 @@ +From 9897578d93d596c652b72095adc27da55ed05106 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Tue, 12 Dec 2017 14:10:37 +0800 +Subject: [PATCH 06/11] efi: allow user to regenerate secret key +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +This patch adds a sysfs interface for user to trigger the secret key +regenerate process in EFI stub. At runtime, kernel creates SecretKeyRegen +efi variable as a flag. When system reboot, EFI stub will regenerate +secret key if the flga be found. + +Signed-off-by: Lee, Chun-Yi +--- + arch/x86/boot/compressed/efi_secret_key.c | 36 +++++++++ + drivers/firmware/efi/efi-secret-key.c | 114 ++++++++++++++++++++++++++++++ + drivers/firmware/efi/efi.c | 4 + + include/linux/efi.h | 11 ++ + 4 files changed, 165 insertions(+) + +--- a/arch/x86/boot/compressed/efi_secret_key.c ++++ b/arch/x86/boot/compressed/efi_secret_key.c +@@ -132,6 +132,39 @@ static efi_status_t create_secret_key(st + return status; + } + ++static bool found_regen_flag(void) ++{ ++ unsigned long attributes = 0; ++ unsigned long size = 0; ++ void *flag; ++ bool regen; ++ efi_status_t status; ++ ++ /* detect secret key regen flag variable */ ++ status = get_efi_var(EFI_SECRET_KEY_REGEN, &EFI_SECRET_GUID, ++ &attributes, &size, NULL); ++ if (status != EFI_BUFFER_TOO_SMALL) ++ return false; ++ ++ status = efi_call_early(allocate_pool, EFI_LOADER_DATA, ++ size, &flag); ++ if (status != EFI_SUCCESS) ++ return false; ++ ++ memset(flag, 0, size); ++ status = get_efi_var(EFI_SECRET_KEY_REGEN, &EFI_SECRET_GUID, ++ &attributes, &size, flag); ++ if (status == EFI_SUCCESS) ++ regen = *(bool *)flag; ++ ++ /* clean regen flag */ ++ set_efi_var(EFI_SECRET_KEY_REGEN, &EFI_SECRET_GUID, ++ attributes, 0, NULL); ++err: ++ efi_call_early(free_pool, flag); ++ return regen; ++} ++ + static efi_status_t regen_secret_key(struct efi_skey_setup_data *skey_setup) + { + unsigned long attributes = 0; +@@ -179,6 +212,9 @@ void efi_setup_secret_key(efi_system_tab + if (attributes != SECRET_KEY_ATTRIBUTE) { + efi_printk(sys_table, "Found a unqualified secret key\n"); + status = regen_secret_key(skey_setup); ++ } else if (found_regen_flag()) { ++ efi_printk(sys_table, "Regenerate secret key\n"); ++ status = regen_secret_key(skey_setup); + } + break; + +--- a/drivers/firmware/efi/efi-secret-key.c ++++ b/drivers/firmware/efi/efi-secret-key.c +@@ -11,9 +11,12 @@ + #include + #include + #include ++#include ++#include + + static u64 efi_skey_setup; + static void *secret_key; ++static bool skey_regen; + + void __init parse_efi_secret_key_setup(u64 phys_addr, u32 data_len) + { +@@ -82,3 +85,114 @@ void *get_efi_secret_key(void) + EXPORT_SYMBOL(get_efi_secret_key); + + late_initcall(init_efi_secret_key); ++ ++static int set_regen_flag(void) ++{ ++ struct efivar_entry *entry = NULL; ++ bool regen = true; ++ int err = 0; ++ ++ if (!efi_enabled(EFI_RUNTIME_SERVICES)) ++ return 0; ++ ++ entry = kzalloc(sizeof(*entry), GFP_KERNEL); ++ if (!entry) ++ return -ENOMEM; ++ ++ memcpy(entry->var.VariableName, ++ EFI_SECRET_KEY_REGEN, sizeof(EFI_SECRET_KEY_REGEN)); ++ memcpy(&(entry->var.VendorGuid), ++ &EFI_SECRET_GUID, sizeof(efi_guid_t)); ++ err = efivar_entry_set(entry, EFI_SECRET_KEY_REGEN_ATTRIBUTE, ++ sizeof(bool), ®en, NULL); ++ if (err) ++ pr_warn("Create EFI secret key regen failed: %d\n", err); ++ ++ kfree(entry); ++ ++ return err; ++} ++ ++static int clean_regen_flag(void) ++{ ++ struct efivar_entry *entry = NULL; ++ int err = 0; ++ ++ if (!efi_enabled(EFI_RUNTIME_SERVICES)) ++ return 0; ++ ++ entry = kzalloc(sizeof(*entry), GFP_KERNEL); ++ if (!entry) ++ return -ENOMEM; ++ ++ memcpy(entry->var.VariableName, ++ EFI_SECRET_KEY_REGEN, sizeof(EFI_SECRET_KEY_REGEN)); ++ memcpy(&(entry->var.VendorGuid), ++ &EFI_SECRET_GUID, sizeof(efi_guid_t)); ++ err = efivar_entry_set(entry, EFI_SECRET_KEY_REGEN_ATTRIBUTE, ++ 0, NULL, NULL); ++ if (err && err != -ENOENT) ++ pr_warn("Clean EFI secret key regen failed: %d\n", err); ++ ++ kfree(entry); ++ ++ return err; ++} ++ ++void efi_skey_stop_regen(void) ++{ ++ if (!efi_enabled(EFI_RUNTIME_SERVICES)) ++ return; ++ ++ if (!clean_regen_flag()) ++ skey_regen = false; ++} ++EXPORT_SYMBOL(efi_skey_stop_regen); ++ ++static struct kobject *secret_key_kobj; ++ ++static ssize_t regen_show(struct kobject *kobj, ++ struct kobj_attribute *attr, char *buf) ++{ ++ return sprintf(buf, "%d\n", skey_regen); ++} ++ ++static ssize_t regen_store(struct kobject *kobj, ++ struct kobj_attribute *attr, ++ const char *buf, size_t size) ++{ ++ bool regen_in; ++ int ret; ++ ++ ret = strtobool(buf, ®en_in); ++ if (ret < 0) ++ return ret; ++ ++ if (!skey_regen && regen_in) { ++ ret = set_regen_flag(); ++ if (ret < 0) ++ return ret; ++ } ++ ++ if (skey_regen && !regen_in) { ++ ret = clean_regen_flag(); ++ if (ret < 0) ++ return ret; ++ } ++ ++ skey_regen = regen_in; ++ ++ return size; ++} ++ ++static const struct kobj_attribute regen_attr = ++ __ATTR(regen, 0644, regen_show, regen_store); ++ ++int __init efi_skey_sysfs_init(struct kobject *efi_kobj) ++{ ++ secret_key_kobj = kobject_create_and_add("secret-key", efi_kobj); ++ if (!secret_key_kobj) ++ return -ENOMEM; ++ ++ return sysfs_create_file(secret_key_kobj, ®en_attr.attr); ++} +--- a/drivers/firmware/efi/efi.c ++++ b/drivers/firmware/efi/efi.c +@@ -351,6 +351,10 @@ static int __init efisubsys_init(void) + if (error) + goto err_remove_group; + ++ error = efi_skey_sysfs_init(efi_kobj); ++ if (error) ++ goto err_remove_group; ++ + /* and the standard mountpoint for efivarfs */ + error = sysfs_create_mount_point(efi_kobj, "efivars"); + if (error) { +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -1622,6 +1622,11 @@ efi_status_to_str(efi_status_t status) + #define EFI_SECRET_GUID \ + EFI_GUID(0x8c136d32, 0x039a, 0x4016, 0x8b, 0xb4, 0x9e, 0x98, 0x5e, 0x62, 0x78, 0x6f) + #define SECRET_KEY_SIZE 64 ++#define EFI_SECRET_KEY_REGEN \ ++ ((efi_char16_t [15]) { 'S', 'e', 'c', 'r', 'e', 't', 'K', 'e', 'y', 'R', 'e', 'g', 'e', 'n', 0 }) ++#define EFI_SECRET_KEY_REGEN_ATTRIBUTE (EFI_VARIABLE_NON_VOLATILE | \ ++ EFI_VARIABLE_BOOTSERVICE_ACCESS | \ ++ EFI_VARIABLE_RUNTIME_ACCESS) + struct efi_skey_setup_data { + unsigned long detect_status; + unsigned long final_status; +@@ -1629,11 +1634,17 @@ struct efi_skey_setup_data { + u8 secret_key[SECRET_KEY_SIZE]; + }; + extern void *get_efi_secret_key(void); ++extern void efi_skey_stop_regen(void); ++extern void efi_skey_set_regen(void); ++extern int efi_skey_sysfs_init(struct kobject *efi_kobj); + #else + #define SECRET_KEY_SIZE 0 + static inline void *get_efi_secret_key(void) + { + return NULL; + } ++static inline void efi_skey_stop_regen(void) {} ++static inline void efi_skey_set_regen(void) {} ++static inline int efi_skey_sysfs_init(struct kobject *efi_kobj) { return 0; } + #endif /* CONFIG_EFI_SECRET_KEY */ + #endif /* _LINUX_EFI_H */ diff --git a/patches.suse/0006-modsign-Use-secondary-trust-keyring-for-module-signi.patch b/patches.suse/0006-modsign-Use-secondary-trust-keyring-for-module-signi.patch new file mode 100644 index 0000000..1eee42d --- /dev/null +++ b/patches.suse/0006-modsign-Use-secondary-trust-keyring-for-module-signi.patch @@ -0,0 +1,34 @@ +From c0187008a89e1571458ab48bed145cb1b893bb1a Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Thu, 3 Aug 2017 16:56:22 +0100 +Subject: [PATCH 6/6] modsign: Use secondary trust keyring for module signing + +Patch-mainline: Queued in subsystem maintainer repository +Git-repo: https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git +Git-commit: c0187008a89e1571458ab48bed145cb1b893bb1a +References: fate#314508 + +Use secondary trust keyring for module signing as that's where the UEFI +keys get stashed. + +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + kernel/module_signing.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/module_signing.c b/kernel/module_signing.c +index 937c844..d3d6f95 100644 +--- a/kernel/module_signing.c ++++ b/kernel/module_signing.c +@@ -81,6 +81,6 @@ int mod_verify_sig(const void *mod, unsigned long *_modlen) + } + + return verify_pkcs7_signature(mod, modlen, mod + modlen, sig_len, +- NULL, VERIFYING_MODULE_SIGNATURE, ++ (void *)1UL, VERIFYING_MODULE_SIGNATURE, + NULL, NULL); + } +-- +2.6.2 + diff --git a/patches.suse/0007-PCI-mobiveil-replace-the-resource-list-iteration-fun.patch b/patches.suse/0007-PCI-mobiveil-replace-the-resource-list-iteration-fun.patch new file mode 100644 index 0000000..fe7aab2 --- /dev/null +++ b/patches.suse/0007-PCI-mobiveil-replace-the-resource-list-iteration-fun.patch @@ -0,0 +1,46 @@ +From 4da2904daaf9c9c3bef8dac3a366bb6fe96030f0 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:06 +0000 +Subject: [PATCH 07/26] PCI: mobiveil: replace the resource list iteration + function + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +As it won't delete any node in this iteration, replaced +the function resource_list_for_each_entry_safe() with +the resource_list_for_each_entry(). + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 5c0ca63ba9cf..c7802999eadf 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -576,7 +576,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + { + u32 value, pab_ctrl, type; + int err; +- struct resource_entry *win, *tmp; ++ struct resource_entry *win; + + err = mobiveil_bringup_link(pcie); + if (err) { +@@ -627,7 +627,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + + /* Get the I/O and memory ranges from DT */ +- resource_list_for_each_entry_safe(win, tmp, &pcie->resources) { ++ resource_list_for_each_entry(win, &pcie->resources) { + if (resource_type(win->res) == IORESOURCE_MEM) + type = MEM_WINDOW_TYPE; + else if (resource_type(win->res) == IORESOURCE_IO) +-- +2.11.0 + diff --git a/patches.suse/0007-PM-hibernate-encrypt-hidden-area.patch b/patches.suse/0007-PM-hibernate-encrypt-hidden-area.patch new file mode 100644 index 0000000..4d03f7f --- /dev/null +++ b/patches.suse/0007-PM-hibernate-encrypt-hidden-area.patch @@ -0,0 +1,356 @@ +From 9f5eff10f723d39ddac3ed9300cb3246e9298156 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Tue, 12 Dec 2017 14:55:01 +0800 +Subject: [PATCH 07/11] PM / hibernate: encrypt hidden area +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +The hidden area keeps sensitive data (symmetric key, password...) that +it can not be leaked to user space. So the hidden area page is ignored +by snapshot process. But it causes that the hidden area is empty after +system resumed, then all sensitive data are lost. + +The idea against this situation is that using EFI secret key to +encrypt/backup the hidden area when producing snapshot image, then +decrypt/restore hidden area after system resumed. In resuming process, +the boot kernel must transfers secret key to target kernel, otherwise +target kernel doesn't have secret key to decrypt hidden area because +hidden area (including secret key) was ignored by snapshot. + +For transferring secret key to targer kernel, hibernation creates a +trampoline page in snapshot image. The trampoline page can be used +by boot kernel to fill in secret key before whole system be restored +from snapshot image. After system is restored, kernel uses the secret +key in trampoline page to decrypt/restore hidden area. Then all +sensitive data are back. + +Signed-off-by: Lee, Chun-Yi +--- + kernel/power/hibernate.c | 19 ++++++ + kernel/power/power.h | 5 + + kernel/power/snapshot.c | 133 +++++++++++++++++++++++++++++++++++++++++++++-- + kernel/power/swap.c | 2 + kernel/power/user.c | 5 + + 5 files changed, 161 insertions(+), 3 deletions(-) + +--- a/kernel/power/hibernate.c ++++ b/kernel/power/hibernate.c +@@ -32,6 +32,8 @@ + #include + #include + #include ++#include ++#include + #include + + #include "power.h" +@@ -679,12 +681,28 @@ int hibernate(void) + { + int error, nr_calls = 0; + bool snapshot_test = false; ++ void *secret_key; + + if (!hibernation_available()) { + pr_debug("Hibernation not available.\n"); + return -EPERM; + } + ++ error = snapshot_create_trampoline(); ++ if (error) ++ return error; ++ ++ /* using EFI secret key to encrypt hidden area */ ++ secret_key = get_efi_secret_key(); ++ if (secret_key) { ++ error = encrypt_backup_hidden_area(secret_key, SECRET_KEY_SIZE); ++ if (error) { ++ pr_err("Encrypt hidden area failed: %d\n", error); ++ snapshot_free_trampoline(); ++ return error; ++ } ++ } ++ + lock_system_sleep(); + /* The snapshot device should not be opened while we're running */ + if (!atomic_add_unless(&snapshot_device_available, -1, 0)) { +@@ -740,6 +758,7 @@ int hibernate(void) + pm_restore_gfp_mask(); + } else { + pr_debug("Image restored successfully.\n"); ++ snapshot_restore_trampoline(); + } + + Free_bitmaps: +--- a/kernel/power/power.h ++++ b/kernel/power/power.h +@@ -12,6 +12,7 @@ struct swsusp_info { + unsigned long image_pages; + unsigned long pages; + unsigned long size; ++ unsigned long trampoline_pfn; + } __aligned(PAGE_SIZE); + + #ifdef CONFIG_HIBERNATION +@@ -157,6 +158,10 @@ extern int snapshot_read_next(struct sna + extern int snapshot_write_next(struct snapshot_handle *handle); + extern void snapshot_write_finalize(struct snapshot_handle *handle); + extern int snapshot_image_loaded(struct snapshot_handle *handle); ++extern int snapshot_create_trampoline(void); ++extern void snapshot_init_trampoline(void); ++extern void snapshot_restore_trampoline(void); ++extern void snapshot_free_trampoline(void); + + /* If unset, the snapshot device cannot be open. */ + extern atomic_t snapshot_device_available; +--- a/kernel/power/snapshot.c ++++ b/kernel/power/snapshot.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -80,6 +81,24 @@ static inline void hibernate_restore_pro + static inline void hibernate_restore_unprotect_page(void *page_address) {} + #endif /* CONFIG_STRICT_KERNEL_RWX && CONFIG_ARCH_HAS_SET_MEMORY */ + ++/* ++ * The trampoline is used to forward information from boot kernel ++ * to image kernel. ++ */ ++struct trampoline { ++ bool secret_key_valid; ++ u8 secret_key[SECRET_KEY_SIZE]; ++}; ++ ++/* the trampoline is used by image kernel */ ++static void *trampoline_virt; ++ ++/* trampoline pfn from swsusp_info in snapshot for snapshot_write_next() */ ++static unsigned long trampoline_pfn; ++ ++/* Keep the buffer for foward page in snapshot_write_next() */ ++static void *trampoline_buff; ++ + static int swsusp_page_is_free(struct page *); + static void swsusp_set_page_forbidden(struct page *); + static void swsusp_unset_page_forbidden(struct page *); +@@ -2048,10 +2067,109 @@ static int init_header(struct swsusp_inf + info->pages = snapshot_get_image_size(); + info->size = info->pages; + info->size <<= PAGE_SHIFT; ++ info->trampoline_pfn = page_to_pfn(virt_to_page(trampoline_virt)); + return init_header_complete(info); + } + + /** ++ * create trampoline - Create a trampoline page before snapshot be created ++ * In hibernation process, this routine will be called by kernel before ++ * the snapshot image be created. It can be used in resuming process. ++ */ ++int snapshot_create_trampoline(void) ++{ ++ if (trampoline_virt) { ++ pr_warn("PM: Tried to create trampoline again\n"); ++ return 0; ++ } ++ ++ trampoline_virt = (void *)get_zeroed_page(GFP_KERNEL); ++ if (!trampoline_virt) { ++ pr_err("PM: Allocate trampoline page failed\n"); ++ return -ENOMEM; ++ } ++ trampoline_pfn = 0; ++ trampoline_buff = NULL; ++ ++ return 0; ++} ++ ++/** ++ * initial trampoline - Put data to trampoline buffer for target kernel ++ * ++ * In resuming process, this routine will be called by boot kernel before ++ * the target kernel be restored. The boot kernel uses trampoline buffer ++ * to transfer information to target kernel. ++ */ ++void snapshot_init_trampoline(void) ++{ ++ struct trampoline *t; ++ void *efi_secret_key; ++ ++ if (!trampoline_pfn || !trampoline_buff) { ++ pr_err("PM: Did not find trampoline buffer, pfn: %ld\n", ++ trampoline_pfn); ++ return; ++ } ++ ++ hibernate_restore_unprotect_page(trampoline_buff); ++ memset(trampoline_buff, 0, PAGE_SIZE); ++ t = (struct trampoline *)trampoline_buff; ++ ++ efi_secret_key = get_efi_secret_key(); ++ if (efi_secret_key) { ++ memset(t->secret_key, 0, SECRET_KEY_SIZE); ++ memcpy(t->secret_key, efi_secret_key, SECRET_KEY_SIZE); ++ t->secret_key_valid = true; ++ } ++ pr_info("PM: Hibernation trampoline page prepared\n"); ++} ++ ++/** ++ * restore trampoline - Handle the data from boot kernel and free. ++ * ++ * In resuming process, this routine will be called by target kernel ++ * after target kernel is restored. The target kernel handles ++ * the data in trampoline that it is transferred from boot kernel. ++ */ ++void snapshot_restore_trampoline(void) ++{ ++ struct trampoline *t; ++ int ret; ++ ++ if (!trampoline_virt) { ++ pr_err("PM: Doesn't have trampoline page\n"); ++ return; ++ } ++ ++ t = (struct trampoline *)trampoline_virt; ++ if (t->secret_key_valid) { ++ ret = decrypt_restore_hidden_area(t->secret_key, SECRET_KEY_SIZE); ++ if (ret) ++ pr_err("PM: Decrypted hidden area failed: %d\n", ret); ++ else ++ pr_info("PM: Hidden area decrypted\n"); ++ } ++ ++ snapshot_free_trampoline(); ++} ++ ++void snapshot_free_trampoline(void) ++{ ++ if (!trampoline_virt) { ++ pr_err("PM: No trampoline page can be freed\n"); ++ return; ++ } ++ ++ trampoline_pfn = 0; ++ trampoline_buff = NULL; ++ memset(trampoline_virt, 0, PAGE_SIZE); ++ free_page((unsigned long)trampoline_virt); ++ trampoline_virt = NULL; ++ pr_info("PM: Trampoline freed\n"); ++} ++ ++/** + * pack_pfns - Prepare PFNs for saving. + * @bm: Memory bitmap. + * @buf: Memory buffer to store the PFNs in. +@@ -2198,6 +2316,7 @@ static int load_header(struct swsusp_inf + if (!error) { + nr_copy_pages = info->image_pages; + nr_meta_pages = info->pages - info->image_pages - 1; ++ trampoline_pfn = info->trampoline_pfn; + } + return error; + } +@@ -2531,7 +2650,8 @@ static int prepare_image(struct memory_b + * Get the address that snapshot_write_next() should return to its caller to + * write to. + */ +-static void *get_buffer(struct memory_bitmap *bm, struct chain_allocator *ca) ++static void *get_buffer(struct memory_bitmap *bm, struct chain_allocator *ca, ++ unsigned long *pfn_out) + { + struct pbe *pbe; + struct page *page; +@@ -2540,6 +2660,9 @@ static void *get_buffer(struct memory_bi + if (pfn == BM_END_OF_MAP) + return ERR_PTR(-EFAULT); + ++ if (pfn_out) ++ *pfn_out = pfn; ++ + page = pfn_to_page(pfn); + if (PageHighMem(page)) + return get_highmem_page_buffer(page, ca); +@@ -2587,6 +2710,7 @@ static void *get_buffer(struct memory_bi + int snapshot_write_next(struct snapshot_handle *handle) + { + static struct chain_allocator ca; ++ unsigned long pfn; + int error = 0; + + /* Check if we have already loaded the entire image */ +@@ -2634,7 +2758,7 @@ int snapshot_write_next(struct snapshot_ + chain_init(&ca, GFP_ATOMIC, PG_SAFE); + memory_bm_position_reset(&orig_bm); + restore_pblist = NULL; +- handle->buffer = get_buffer(&orig_bm, &ca); ++ handle->buffer = get_buffer(&orig_bm, &ca, &pfn); + handle->sync_read = 0; + if (IS_ERR(handle->buffer)) + return PTR_ERR(handle->buffer); +@@ -2644,11 +2768,14 @@ int snapshot_write_next(struct snapshot_ + /* Restore page key for data page (s390 only). */ + page_key_write(handle->buffer); + hibernate_restore_protect_page(handle->buffer); +- handle->buffer = get_buffer(&orig_bm, &ca); ++ handle->buffer = get_buffer(&orig_bm, &ca, &pfn); + if (IS_ERR(handle->buffer)) + return PTR_ERR(handle->buffer); + if (handle->buffer != buffer) + handle->sync_read = 0; ++ /* Capture the trampoline for transfer data */ ++ if (pfn == trampoline_pfn && trampoline_pfn) ++ trampoline_buff = handle->buffer; + } + handle->cur++; + return PAGE_SIZE; +--- a/kernel/power/swap.c ++++ b/kernel/power/swap.c +@@ -1102,6 +1102,7 @@ static int load_image(struct swap_map_ha + if (!snapshot_image_loaded(snapshot)) + ret = -ENODATA; + ++ snapshot_init_trampoline(); + /* clean the hidden area in boot kernel */ + clean_hidden_area(); + } +@@ -1465,6 +1466,7 @@ out_finish: + } + } + } ++ snapshot_init_trampoline(); + /* clean the hidden area in boot kernel */ + clean_hidden_area(); + } +--- a/kernel/power/user.c ++++ b/kernel/power/user.c +@@ -249,6 +249,7 @@ static long snapshot_ioctl(struct file * + if (!data->frozen || data->ready) + break; + pm_restore_gfp_mask(); ++ snapshot_restore_trampoline(); + free_basic_memory_bitmaps(); + data->free_bitmaps = false; + thaw_processes(); +@@ -260,6 +261,9 @@ static long snapshot_ioctl(struct file * + error = -EPERM; + break; + } ++ error = snapshot_create_trampoline(); ++ if (error) ++ return error; + pm_restore_gfp_mask(); + error = hibernation_snapshot(data->platform_support); + if (!error) { +@@ -276,6 +280,7 @@ static long snapshot_ioctl(struct file * + error = -EPERM; + break; + } ++ snapshot_init_trampoline(); + /* clean the hidden area in boot kernel */ + clean_hidden_area(); + error = hibernation_restore(data->platform_support); diff --git a/patches.suse/0008-PCI-mobiveil-use-WIN_NUM_0-explicitly-for-CFG-outbou.patch b/patches.suse/0008-PCI-mobiveil-use-WIN_NUM_0-explicitly-for-CFG-outbou.patch new file mode 100644 index 0000000..9f31894 --- /dev/null +++ b/patches.suse/0008-PCI-mobiveil-use-WIN_NUM_0-explicitly-for-CFG-outbou.patch @@ -0,0 +1,40 @@ +From 0a0fff5c497b04d1c095ef9d0762fd3488f67a1f Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:12 +0000 +Subject: [PATCH 08/26] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG + outbound window + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +As the .map_bus() use the WIN_NUM_0 for CFG transactions, +it's better passing WIN_NUM_0 explicitly when initialize +the CFG outbound window. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index c7802999eadf..3d1372f2167f 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -619,9 +619,8 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + */ + + /* config outbound translation window */ +- program_ob_windows(pcie, pcie->ob_wins_configured, +- pcie->ob_io_res->start, 0, CFG_WINDOW_TYPE, +- resource_size(pcie->ob_io_res)); ++ program_ob_windows(pcie, WIN_NUM_0, pcie->ob_io_res->start, 0, ++ CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); + + /* memory inbound translation window */ + program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); +-- +2.11.0 + diff --git a/patches.suse/0008-PM-hibernate-Generate-and-verify-signature-for-snaps.patch b/patches.suse/0008-PM-hibernate-Generate-and-verify-signature-for-snaps.patch new file mode 100644 index 0000000..37bef42 --- /dev/null +++ b/patches.suse/0008-PM-hibernate-Generate-and-verify-signature-for-snaps.patch @@ -0,0 +1,528 @@ +From 71d8a8950aaf2fc5ed81ce75106e62955b835153 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Tue, 12 Dec 2017 16:37:58 +0800 +Subject: [PATCH 08/11] PM / hibernate: Generate and verify signature for + snapshot image +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +When producing memory snapshot image, hibernation uses HMAC-SHA512 +with EFI secret key to calculate the hash for all data pages in image. +The hash result will be kept in the snapshot header as the image +signature. Before hibernation restores system, kernel executes +HMAC-SHA512 again and compares the result with the signature in header +to verify the integrity of snapshot image. + +If the verification failed, the resume process will be stopped. The +snapshot image will be discarded and system will boot as normal. + +Signed-off-by: Lee, Chun-Yi +--- + kernel/power/Kconfig | 13 ++ + kernel/power/hibernate.c | 9 + + kernel/power/power.h | 14 ++ + kernel/power/snapshot.c | 277 ++++++++++++++++++++++++++++++++++++++++++++--- + kernel/power/swap.c | 5 + kernel/power/user.c | 4 + 6 files changed, 307 insertions(+), 15 deletions(-) + +--- a/kernel/power/Kconfig ++++ b/kernel/power/Kconfig +@@ -76,6 +76,19 @@ config HIBERNATION + + For more information take a look at . + ++config HIBERNATE_VERIFICATION ++ bool "Hibernate verification" ++ depends on HIBERNATION ++ depends on EFI_SECRET_KEY ++ select CRYPTO_HMAC ++ select CRYPTO_SHA512 ++ help ++ This option provides support for generating and verifying the ++ signature of memory snapshot image by HMAC-SHA512. Current mechanism ++ relies on UEFI secure boot environment, EFI stub generates HMAC ++ key for hibernate verification. This function will be bypassed on ++ legacy BIOS. ++ + config ARCH_SAVE_PAGE_KEYS + bool + +--- a/kernel/power/hibernate.c ++++ b/kernel/power/hibernate.c +@@ -273,10 +273,14 @@ static int create_image(int platform_mod + { + int error; + ++ error = swsusp_prepare_hash(false); ++ if (error) ++ return error; ++ + error = dpm_suspend_end(PMSG_FREEZE); + if (error) { + pr_err("Some devices failed to power down, aborting hibernation\n"); +- return error; ++ goto finish_hash; + } + + error = platform_pre_snapshot(platform_mode); +@@ -330,6 +334,9 @@ static int create_image(int platform_mod + dpm_resume_start(in_suspend ? + (error ? PMSG_RECOVER : PMSG_THAW) : PMSG_RESTORE); + ++ finish_hash: ++ swsusp_finish_hash(); ++ + return error; + } + +--- a/kernel/power/power.h ++++ b/kernel/power/power.h +@@ -4,6 +4,10 @@ + #include + #include + ++/* HMAC algorithm for hibernate snapshot signature */ ++#define SNAPSHOT_HMAC "hmac(sha512)" ++#define SNAPSHOT_DIGEST_SIZE 64 ++ + struct swsusp_info { + struct new_utsname uts; + u32 version_code; +@@ -13,6 +17,7 @@ struct swsusp_info { + unsigned long pages; + unsigned long size; + unsigned long trampoline_pfn; ++ u8 signature[SNAPSHOT_DIGEST_SIZE]; + } __aligned(PAGE_SIZE); + + #ifdef CONFIG_HIBERNATION +@@ -162,6 +167,15 @@ extern int snapshot_create_trampoline(vo + extern void snapshot_init_trampoline(void); + extern void snapshot_restore_trampoline(void); + extern void snapshot_free_trampoline(void); ++#ifdef CONFIG_HIBERNATE_VERIFICATION ++extern int snapshot_image_verify(void); ++extern int swsusp_prepare_hash(bool may_sleep); ++extern void swsusp_finish_hash(void); ++#else ++static inline int snapshot_image_verify(void) { return 0; } ++static inline int swsusp_prepare_hash(bool may_sleep) { return 0; } ++static inline void swsusp_finish_hash(void) {} ++#endif + + /* If unset, the snapshot device cannot be open. */ + extern atomic_t snapshot_device_available; +--- a/kernel/power/snapshot.c ++++ b/kernel/power/snapshot.c +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -41,6 +42,9 @@ + #ifdef CONFIG_ARCH_HAS_SET_MEMORY + #include + #endif ++#ifdef CONFIG_HIBERNATE_VERIFICATION ++#include ++#endif + + #include "power.h" + +@@ -86,6 +90,7 @@ static inline void hibernate_restore_unp + * to image kernel. + */ + struct trampoline { ++ int sig_verify_ret; + bool secret_key_valid; + u8 secret_key[SECRET_KEY_SIZE]; + }; +@@ -1418,8 +1423,241 @@ static inline void copy_data_page(unsign + } + #endif /* CONFIG_HIGHMEM */ + +-static void copy_data_pages(struct memory_bitmap *copy_bm, +- struct memory_bitmap *orig_bm) ++/* Total number of image pages */ ++static unsigned int nr_copy_pages; ++ ++/* Point array for collecting buffers' address in snapshot_write_next() */ ++static void **h_buf; ++ ++#ifdef CONFIG_HIBERNATE_VERIFICATION ++/* ++ * Signature of snapshot image ++ */ ++static u8 signature[SNAPSHOT_DIGEST_SIZE]; ++ ++/* Keep the signature verification result for trampoline */ ++static int sig_verify_ret; ++ ++static u8 *s4_verify_digest; ++static struct shash_desc *s4_verify_desc; ++ ++int swsusp_prepare_hash(bool may_sleep) ++{ ++ struct crypto_shash *tfm; ++ u8 *key; ++ size_t digest_size, desc_size; ++ int ret; ++ ++ key = get_efi_secret_key(); ++ if (!key) { ++ pr_warn_once("PM: secret key is invalid\n"); ++ return -EINVAL; ++ } ++ ++ tfm = crypto_alloc_shash(SNAPSHOT_HMAC, 0, 0); ++ if (IS_ERR(tfm)) { ++ pr_err("PM: Allocate HMAC failed: %ld\n", PTR_ERR(tfm)); ++ return PTR_ERR(tfm); ++ } ++ ++ ret = crypto_shash_setkey(tfm, key, SNAPSHOT_DIGEST_SIZE); ++ if (ret) { ++ pr_err("PM: Set HMAC key failed\n"); ++ goto error; ++ } ++ ++ desc_size = crypto_shash_descsize(tfm) + sizeof(*s4_verify_desc); ++ digest_size = crypto_shash_digestsize(tfm); ++ s4_verify_digest = kzalloc(digest_size + desc_size, GFP_KERNEL); ++ if (!s4_verify_digest) { ++ pr_err("PM: Allocate digest failed\n"); ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ s4_verify_desc = (void *) s4_verify_digest + digest_size; ++ s4_verify_desc->tfm = tfm; ++ if (may_sleep) ++ s4_verify_desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP; ++ ret = crypto_shash_init(s4_verify_desc); ++ if (ret < 0) ++ goto free_shash; ++ ++ return 0; ++ ++ free_shash: ++ kfree(s4_verify_digest); ++ error: ++ crypto_free_shash(tfm); ++ s4_verify_digest = NULL; ++ s4_verify_desc = NULL; ++ return ret; ++} ++ ++void swsusp_finish_hash(void) ++{ ++ if (s4_verify_desc) ++ crypto_free_shash(s4_verify_desc->tfm); ++ kfree(s4_verify_digest); ++ s4_verify_desc = NULL; ++ s4_verify_digest = NULL; ++} ++ ++int snapshot_image_verify(void) ++{ ++ int ret, i; ++ ++ if (!h_buf) { ++ ret = -ENOMEM; ++ goto error; ++ } ++ ++ if (!efi_enabled(EFI_BOOT)) { ++ pr_info_once("PM: Bypass verification on non-EFI machine\n"); ++ ret = 0; ++ goto error_prep; ++ } ++ ++ ret = swsusp_prepare_hash(true); ++ if (ret || !s4_verify_desc) ++ goto error_prep; ++ ++ for (i = 0; i < nr_copy_pages; i++) { ++ ret = crypto_shash_update(s4_verify_desc, *(h_buf + i), PAGE_SIZE); ++ if (ret) ++ goto error_shash; ++ } ++ ++ ret = crypto_shash_final(s4_verify_desc, s4_verify_digest); ++ if (ret) ++ goto error_shash; ++ ++ pr_debug("PM: Signature %*phN\n", SNAPSHOT_DIGEST_SIZE, signature); ++ pr_debug("PM: Digest %*phN\n", SNAPSHOT_DIGEST_SIZE, s4_verify_digest); ++ if (memcmp(signature, s4_verify_digest, SNAPSHOT_DIGEST_SIZE)) ++ ret = -EKEYREJECTED; ++ ++ error_shash: ++ swsusp_finish_hash(); ++ ++ error_prep: ++ vfree(h_buf); ++ if (ret) ++ pr_warn("PM: Signature verification failed: %d\n", ret); ++ error: ++ sig_verify_ret = ret; ++ return ret; ++} ++ ++static int ++__copy_data_pages(struct memory_bitmap *copy_bm, struct memory_bitmap *orig_bm) ++{ ++ unsigned long pfn, dst_pfn; ++ struct page *d_page; ++ void *hash_buffer = NULL; ++ int ret = 0; ++ ++ memory_bm_position_reset(orig_bm); ++ memory_bm_position_reset(copy_bm); ++ for (;;) { ++ pfn = memory_bm_next_pfn(orig_bm); ++ if (unlikely(pfn == BM_END_OF_MAP)) ++ break; ++ dst_pfn = memory_bm_next_pfn(copy_bm); ++ copy_data_page(dst_pfn, pfn); ++ ++ /* Generate digest */ ++ d_page = pfn_to_page(dst_pfn); ++ if (PageHighMem(d_page)) { ++ void *kaddr = kmap_atomic(d_page); ++ ++ copy_page(buffer, kaddr); ++ kunmap_atomic(kaddr); ++ hash_buffer = buffer; ++ } else { ++ hash_buffer = page_address(d_page); ++ } ++ ++ if (!s4_verify_desc) ++ continue; ++ ++ ret = crypto_shash_update(s4_verify_desc, hash_buffer, ++ PAGE_SIZE); ++ if (ret) ++ return ret; ++ } ++ ++ if (s4_verify_desc) { ++ ret = crypto_shash_final(s4_verify_desc, s4_verify_digest); ++ if (ret) ++ return ret; ++ ++ memset(signature, 0, SNAPSHOT_DIGEST_SIZE); ++ memcpy(signature, s4_verify_digest, SNAPSHOT_DIGEST_SIZE); ++ } ++ ++ return 0; ++} ++ ++static void alloc_h_buf(void) ++{ ++ h_buf = vmalloc(sizeof(void *) * nr_copy_pages); ++ if (!h_buf) ++ pr_err("PM: Allocate buffer point array failed\n"); ++} ++ ++static void init_signature(struct swsusp_info *info) ++{ ++ memcpy(info->signature, signature, SNAPSHOT_DIGEST_SIZE); ++} ++ ++static void load_signature(struct swsusp_info *info) ++{ ++ memset(signature, 0, SNAPSHOT_DIGEST_SIZE); ++ memcpy(signature, info->signature, SNAPSHOT_DIGEST_SIZE); ++} ++ ++static void init_sig_verify(struct trampoline *t) ++{ ++ t->sig_verify_ret = sig_verify_ret; ++ sig_verify_ret = 0; ++} ++ ++static void handle_sig_verify(struct trampoline *t) ++{ ++ if (t->sig_verify_ret) ++ pr_warn("PM: Signature verification failed: %d\n", ++ t->sig_verify_ret); ++ else if (t->secret_key_valid) ++ pr_info("PM: Signature verification passed.\n"); ++} ++#else ++static int ++__copy_data_pages(struct memory_bitmap *copy_bm, struct memory_bitmap *orig_bm) ++{ ++ unsigned long pfn; ++ ++ memory_bm_position_reset(orig_bm); ++ memory_bm_position_reset(copy_bm); ++ for (;;) { ++ pfn = memory_bm_next_pfn(orig_bm); ++ if (unlikely(pfn == BM_END_OF_MAP)) ++ break; ++ copy_data_page(memory_bm_next_pfn(copy_bm), pfn); ++ } ++ ++ return 0; ++} ++ ++static inline void alloc_h_buf(void) {} ++static void init_signature(struct swsusp_info *info) {} ++static void load_signature(struct swsusp_info *info) {} ++static void init_sig_verify(struct trampoline *t) {} ++static void handle_sig_verify(struct trampoline *t) {} ++#endif /* CONFIG_HIBERNATE_VERIFICATION */ ++ ++static int copy_data_pages(struct memory_bitmap *copy_bm, ++ struct memory_bitmap *orig_bm) + { + struct zone *zone; + unsigned long pfn; +@@ -1433,18 +1671,9 @@ static void copy_data_pages(struct memor + if (page_is_saveable(zone, pfn)) + memory_bm_set_bit(orig_bm, pfn); + } +- memory_bm_position_reset(orig_bm); +- memory_bm_position_reset(copy_bm); +- for(;;) { +- pfn = memory_bm_next_pfn(orig_bm); +- if (unlikely(pfn == BM_END_OF_MAP)) +- break; +- copy_data_page(memory_bm_next_pfn(copy_bm), pfn); +- } ++ return __copy_data_pages(copy_bm, orig_bm); + } + +-/* Total number of image pages */ +-static unsigned int nr_copy_pages; + /* Number of pages needed for saving the original pfns of the image pages */ + static unsigned int nr_meta_pages; + /* +@@ -1989,6 +2218,7 @@ static int swsusp_alloc(struct memory_bi + asmlinkage __visible int swsusp_save(void) + { + unsigned int nr_pages, nr_highmem; ++ int ret; + + printk(KERN_INFO "PM: Creating hibernation image:\n"); + +@@ -2012,7 +2242,11 @@ asmlinkage __visible int swsusp_save(voi + * Kill them. + */ + drain_local_pages(NULL); +- copy_data_pages(©_bm, &orig_bm); ++ ret = copy_data_pages(©_bm, &orig_bm); ++ if (ret) { ++ pr_err("PM: Copy data pages failed\n"); ++ return ret; ++ } + + /* + * End of critical section. From now on, we can write to memory, +@@ -2068,6 +2302,7 @@ static int init_header(struct swsusp_inf + info->size = info->pages; + info->size <<= PAGE_SHIFT; + info->trampoline_pfn = page_to_pfn(virt_to_page(trampoline_virt)); ++ init_signature(info); + return init_header_complete(info); + } + +@@ -2116,6 +2351,8 @@ void snapshot_init_trampoline(void) + memset(trampoline_buff, 0, PAGE_SIZE); + t = (struct trampoline *)trampoline_buff; + ++ init_sig_verify(t); ++ + efi_secret_key = get_efi_secret_key(); + if (efi_secret_key) { + memset(t->secret_key, 0, SECRET_KEY_SIZE); +@@ -2143,6 +2380,9 @@ void snapshot_restore_trampoline(void) + } + + t = (struct trampoline *)trampoline_virt; ++ ++ handle_sig_verify(t); ++ + if (t->secret_key_valid) { + ret = decrypt_restore_hidden_area(t->secret_key, SECRET_KEY_SIZE); + if (ret) +@@ -2317,6 +2557,7 @@ static int load_header(struct swsusp_inf + nr_copy_pages = info->image_pages; + nr_meta_pages = info->pages - info->image_pages - 1; + trampoline_pfn = info->trampoline_pfn; ++ load_signature(info); + } + return error; + } +@@ -2735,6 +2976,12 @@ int snapshot_write_next(struct snapshot_ + + safe_pages_list = NULL; + ++ /* Allocate buffer point array for generating ++ * digest to compare with signature. ++ * h_buf will freed in snapshot_image_verify(). ++ */ ++ alloc_h_buf(); ++ + error = memory_bm_create(©_bm, GFP_ATOMIC, PG_ANY); + if (error) + return error; +@@ -2762,6 +3009,8 @@ int snapshot_write_next(struct snapshot_ + handle->sync_read = 0; + if (IS_ERR(handle->buffer)) + return PTR_ERR(handle->buffer); ++ if (h_buf) ++ *h_buf = handle->buffer; + } + } else { + copy_last_highmem_page(); +@@ -2776,6 +3025,8 @@ int snapshot_write_next(struct snapshot_ + /* Capture the trampoline for transfer data */ + if (pfn == trampoline_pfn && trampoline_pfn) + trampoline_buff = handle->buffer; ++ if (h_buf) ++ *(h_buf + (handle->cur - nr_meta_pages - 1)) = handle->buffer; + } + handle->cur++; + return PAGE_SIZE; +--- a/kernel/power/swap.c ++++ b/kernel/power/swap.c +@@ -1101,7 +1101,8 @@ static int load_image(struct swap_map_ha + snapshot_write_finalize(snapshot); + if (!snapshot_image_loaded(snapshot)) + ret = -ENODATA; +- ++ if (!ret) ++ ret = snapshot_image_verify(); + snapshot_init_trampoline(); + /* clean the hidden area in boot kernel */ + clean_hidden_area(); +@@ -1466,6 +1467,8 @@ out_finish: + } + } + } ++ if (!ret) ++ ret = snapshot_image_verify(); + snapshot_init_trampoline(); + /* clean the hidden area in boot kernel */ + clean_hidden_area(); +--- a/kernel/power/user.c ++++ b/kernel/power/user.c +@@ -280,6 +280,10 @@ static long snapshot_ioctl(struct file * + error = -EPERM; + break; + } ++ if (snapshot_image_verify()) { ++ error = -EPERM; ++ break; ++ } + snapshot_init_trampoline(); + /* clean the hidden area in boot kernel */ + clean_hidden_area(); diff --git a/patches.suse/0008-kabi-arm64-reserve-space-in-cpu_hwcaps-and-cpu_hwcap.patch b/patches.suse/0008-kabi-arm64-reserve-space-in-cpu_hwcaps-and-cpu_hwcap.patch new file mode 100644 index 0000000..85d2312 --- /dev/null +++ b/patches.suse/0008-kabi-arm64-reserve-space-in-cpu_hwcaps-and-cpu_hwcap.patch @@ -0,0 +1,28 @@ +From ec9addc74beaf0632a29b0e0be8135c937ac15d7 Mon Sep 17 00:00:00 2001 +From: Mian Yousaf Kaukab +Date: Wed, 11 Apr 2018 14:02:08 +0200 +Subject: [PATCH] kabi: arm64: reserve space in cpu_hwcaps and cpu_hwcap_keys + arrays + +Patch-mainline: Never, applied to keep kabi preserved +References: bsc#1089086 + +Since cpu_hwcaps and cpu_hwcap_keys are exported symbols, reserve +space in them for any future cpu capabilities or erratas. + +Signed-off-by: Mian Yousaf Kaukab +--- + arch/arm64/include/asm/cpucaps.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm64/include/asm/cpucaps.h ++++ b/arch/arm64/include/asm/cpucaps.h +@@ -48,6 +48,7 @@ + #define ARM64_SSBD 27 + #define ARM64_HAS_CNP 28 + +-#define ARM64_NCAPS 29 ++/* kabi: reserve 29 - 40 for future cpu capabilities */ ++#define ARM64_NCAPS 40 + + #endif /* __ASM_CPUCAPS_H */ diff --git a/patches.suse/0009-PCI-mobiveil-use-the-1st-inbound-window-for-MEM-inbo.patch b/patches.suse/0009-PCI-mobiveil-use-the-1st-inbound-window-for-MEM-inbo.patch new file mode 100644 index 0000000..0821f63 --- /dev/null +++ b/patches.suse/0009-PCI-mobiveil-use-the-1st-inbound-window-for-MEM-inbo.patch @@ -0,0 +1,36 @@ +From bcc82e8be586cd2f9ea2d1ba2700f35aa9a44d97 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:19 +0000 +Subject: [PATCH 09/26] PCI: mobiveil: use the 1st inbound window for MEM + inbound transactions + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +The inbound windows have different register set with outbound windows. +This patch change the MEM inbound window to the first one. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 3d1372f2167f..67132da187f7 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -623,7 +623,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); + + /* memory inbound translation window */ +- program_ib_windows(pcie, WIN_NUM_1, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); ++ program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + + /* Get the I/O and memory ranges from DT */ + resource_list_for_each_entry(win, &pcie->resources) { +-- +2.11.0 + diff --git a/patches.suse/0009-PM-hibernate-prevent-EFI-secret-key-to-be-regenerate.patch b/patches.suse/0009-PM-hibernate-prevent-EFI-secret-key-to-be-regenerate.patch new file mode 100644 index 0000000..dcc7465 --- /dev/null +++ b/patches.suse/0009-PM-hibernate-prevent-EFI-secret-key-to-be-regenerate.patch @@ -0,0 +1,54 @@ +From 7878b466ced5cd807db8cc12eb580220890c220f Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Tue, 12 Dec 2017 18:01:42 +0800 +Subject: [PATCH 09/11] PM / hibernate: prevent EFI secret key to be + regenerated +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +Because hibernation verification relies on EFI secret key. Which means +that the secret key can not be changed when system runs into hibernation. +So, the EFI secret key regenerate flag must be removed when hibernation. + +Signed-off-by: Lee, Chun-Yi +--- + kernel/power/hibernate.c | 1 + + kernel/power/user.c | 3 +++ + 2 files changed, 4 insertions(+) + +--- a/kernel/power/hibernate.c ++++ b/kernel/power/hibernate.c +@@ -694,6 +694,7 @@ int hibernate(void) + pr_debug("Hibernation not available.\n"); + return -EPERM; + } ++ efi_skey_stop_regen(); + + error = snapshot_create_trampoline(); + if (error) +--- a/kernel/power/user.c ++++ b/kernel/power/user.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + + #include + +@@ -347,6 +348,7 @@ static long snapshot_ioctl(struct file * + error = -EPERM; + break; + } ++ efi_skey_stop_regen(); + /* + * Tasks are frozen and the notifiers have been called with + * PM_HIBERNATION_PREPARE +@@ -360,6 +362,7 @@ static long snapshot_ioctl(struct file * + break; + + case SNAPSHOT_POWER_OFF: ++ efi_skey_stop_regen(); + if (data->platform_support) + error = hibernation_platform_enter(); + break; diff --git a/patches.suse/0010-PCI-mobiveil-correct-inbound-outbound-window-setup-r.patch b/patches.suse/0010-PCI-mobiveil-correct-inbound-outbound-window-setup-r.patch new file mode 100644 index 0000000..e7f2bde --- /dev/null +++ b/patches.suse/0010-PCI-mobiveil-correct-inbound-outbound-window-setup-r.patch @@ -0,0 +1,198 @@ +From 7fd77a61f10a39fa99771896b035919db97d3357 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:25 +0000 +Subject: [PATCH 10/26] PCI: mobiveil: correct inbound/outbound window setup + routines + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Outbound window routine: + - Removed unused var definition and register read operations. + - Added the upper 32-bit cpu address setup of the window. + - Instead of blindly write, only change the fields specified. + - Masked the lower bits of window size in case override the + control bits. + - Check if the passing window number is available, instead of + the total number of the initialized windows. + +Inbound window routine: + - Added parameter 'u64 cpu_addr' to specify the cpu address + of the window instead of using 'pci_addr'. + - Changed 'int pci_addr' to 'u64 pci_addr', and added setup + of the upper 32-bit pci address of the window. + - Moved the PCIe PIO master enablement to mobiveil_host_init(). + - Instead of blindly write, only change the fields specified. + - Masked the lower bits of window size in case override the + control bits. + - Check if the passing window number is available, instead of + the total number of the initialized windows. + - And added the statistic of initialized inbound windows. + +Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host +Bridge IP driver") +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa + +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 70 ++++++++++++++++++++++++---------------- + 1 file changed, 42 insertions(+), 28 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 67132da187f7..fd121e7780da 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -65,9 +65,13 @@ + #define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) + #define WIN_ENABLE_SHIFT 0 + #define WIN_TYPE_SHIFT 1 ++#define WIN_TYPE_MASK 0x3 ++#define WIN_SIZE_SHIFT 10 ++#define WIN_SIZE_MASK 0x3fffff + + #define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) + ++#define PAB_EXT_AXI_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0x80a0, win) + #define PAB_AXI_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x0ba4, win) + #define AXI_WINDOW_ALIGN_MASK 3 + +@@ -82,8 +86,10 @@ + #define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) + #define AMAP_CTRL_EN_SHIFT 0 + #define AMAP_CTRL_TYPE_SHIFT 1 ++#define AMAP_CTRL_TYPE_MASK 3 + + #define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) ++#define PAB_EXT_PEX_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0xb4a0, win) + #define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) + #define PAB_PEX_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x4ba8, win) + #define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) +@@ -462,49 +468,51 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) + } + + static void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, +- int pci_addr, u32 type, u64 size) ++ u64 cpu_addr, u64 pci_addr, u32 type, u64 size) + { +- int pio_ctrl_val; +- int amap_ctrl_dw; ++ u32 value; + u64 size64 = ~(size - 1); + +- if ((pcie->ib_wins_configured + 1) > pcie->ppio_wins) { ++ if (win_num >= pcie->ppio_wins) { + dev_err(&pcie->pdev->dev, + "ERROR: max inbound windows reached !\n"); + return; + } + +- pio_ctrl_val = csr_readl(pcie, PAB_PEX_PIO_CTRL); +- pio_ctrl_val |= 1 << PIO_ENABLE_SHIFT; +- csr_writel(pcie, pio_ctrl_val, PAB_PEX_PIO_CTRL); +- +- amap_ctrl_dw = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); +- amap_ctrl_dw |= (type << AMAP_CTRL_TYPE_SHIFT) | +- (1 << AMAP_CTRL_EN_SHIFT) | +- lower_32_bits(size64); +- csr_writel(pcie, amap_ctrl_dw, PAB_PEX_AMAP_CTRL(win_num)); ++ value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); ++ value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT | ++ WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ value |= (type << AMAP_CTRL_TYPE_SHIFT) | (1 << AMAP_CTRL_EN_SHIFT) | ++ (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num)); + + csr_writel(pcie, upper_32_bits(size64), + PAB_EXT_PEX_AMAP_SIZEN(win_num)); + +- csr_writel(pcie, pci_addr, PAB_PEX_AMAP_AXI_WIN(win_num)); ++ csr_writel(pcie, lower_32_bits(cpu_addr), ++ PAB_PEX_AMAP_AXI_WIN(win_num)); ++ csr_writel(pcie, upper_32_bits(cpu_addr), ++ PAB_EXT_PEX_AMAP_AXI_WIN(win_num)); ++ ++ csr_writel(pcie, lower_32_bits(pci_addr), ++ PAB_PEX_AMAP_PEX_WIN_L(win_num)); ++ csr_writel(pcie, upper_32_bits(pci_addr), ++ PAB_PEX_AMAP_PEX_WIN_H(win_num)); + +- csr_writel(pcie, pci_addr, PAB_PEX_AMAP_PEX_WIN_L(win_num)); +- csr_writel(pcie, 0, PAB_PEX_AMAP_PEX_WIN_H(win_num)); ++ pcie->ib_wins_configured++; + } + + /* + * routine to program the outbound windows + */ + static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, +- u64 cpu_addr, u64 pci_addr, +- u32 config_io_bit, u64 size) ++ u64 cpu_addr, u64 pci_addr, u32 type, u64 size) + { + +- u32 value, type; ++ u32 value; + u64 size64 = ~(size - 1); + +- if ((pcie->ob_wins_configured + 1) > pcie->apio_wins) { ++ if (win_num >= pcie->apio_wins) { + dev_err(&pcie->pdev->dev, + "ERROR: max outbound windows reached !\n"); + return; +@@ -514,10 +522,12 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, + * program Enable Bit to 1, Type Bit to (00) base 2, AXI Window Size Bit + * to 4 KB in PAB_AXI_AMAP_CTRL register + */ +- type = config_io_bit; + value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); +- csr_writel(pcie, 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | +- lower_32_bits(size64), PAB_AXI_AMAP_CTRL(win_num)); ++ value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | ++ WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | ++ (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num)); + + csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); + +@@ -525,11 +535,10 @@ static void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, + * program AXI window base with appropriate value in + * PAB_AXI_AMAP_AXI_WIN0 register + */ +- value = csr_readl(pcie, PAB_AXI_AMAP_AXI_WIN(win_num)); +- csr_writel(pcie, cpu_addr & (~AXI_WINDOW_ALIGN_MASK), ++ csr_writel(pcie, lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), + PAB_AXI_AMAP_AXI_WIN(win_num)); +- +- value = csr_readl(pcie, PAB_AXI_AMAP_PEX_WIN_H(win_num)); ++ csr_writel(pcie, upper_32_bits(cpu_addr), ++ PAB_EXT_AXI_AMAP_AXI_WIN(win_num)); + + csr_writel(pcie, lower_32_bits(pci_addr), + PAB_AXI_AMAP_PEX_WIN_L(win_num)); +@@ -611,6 +620,11 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + value |= APIO_EN_MASK; + csr_writel(pcie, value, PAB_AXI_PIO_CTRL); + ++ /* Enable PCIe PIO master */ ++ value = csr_readl(pcie, PAB_PEX_PIO_CTRL); ++ value |= 1 << PIO_ENABLE_SHIFT; ++ csr_writel(pcie, value, PAB_PEX_PIO_CTRL); ++ + /* + * we'll program one outbound window for config reads and + * another default inbound window for all the upstream traffic +@@ -623,7 +637,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + CFG_WINDOW_TYPE, resource_size(pcie->ob_io_res)); + + /* memory inbound translation window */ +- program_ib_windows(pcie, WIN_NUM_0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); ++ program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + + /* Get the I/O and memory ranges from DT */ + resource_list_for_each_entry(win, &pcie->resources) { +-- +2.11.0 + diff --git a/patches.suse/0010-PM-hibernate-a-option-to-request-that-snapshot-image.patch b/patches.suse/0010-PM-hibernate-a-option-to-request-that-snapshot-image.patch new file mode 100644 index 0000000..9d8f66c --- /dev/null +++ b/patches.suse/0010-PM-hibernate-a-option-to-request-that-snapshot-image.patch @@ -0,0 +1,209 @@ +From 1a74e5117717cdfae3c674e0d498b6c93f0e30c8 Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Tue, 12 Dec 2017 20:23:17 +0800 +Subject: [PATCH 10/11] PM / hibernate: a option to request that snapshot image + must be validly signed +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +This kernel option is similar with the option for kernel module signature +verification. When the option is unselected, kernel will be tainted by +restoring from a unsigned snapshot image or the image was signed by a +wrong key. + +When the option is selected, kernel will refuse the system to be resumed +if the signature verification did not pass. The hibernation resume +process will be stopped and whole system just boots as normal. + +Signed-off-by: Lee, Chun-Yi +--- + Documentation/admin-guide/kernel-parameters.txt | 4 ++ + include/linux/kernel.h | 3 + + kernel/panic.c | 2 + + kernel/power/Kconfig | 9 +++++ + kernel/power/hibernate.c | 2 + + kernel/power/power.h | 4 ++ + kernel/power/snapshot.c | 39 ++++++++++++++++++++++-- + 7 files changed, 59 insertions(+), 4 deletions(-) + +--- a/Documentation/admin-guide/kernel-parameters.txt ++++ b/Documentation/admin-guide/kernel-parameters.txt +@@ -3612,6 +3612,10 @@ + protect_image Turn on image protection during restoration + (that will set all pages holding image data + during restoration read-only). ++ sigenforce Refuse the system to be resumed from a snapshot ++ image which is unsigned or signed by a wrong key. ++ This option equals to ++ CONFIG_HIBERNATE_VERIFICATION_FORCE=y + + retain_initrd [RAM] Keep initrd memory after extraction + +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -527,6 +527,7 @@ extern enum system_states { + #define TAINT_UNSIGNED_MODULE 13 + #define TAINT_SOFTLOCKUP 14 + #define TAINT_LIVEPATCH 15 ++#define TAINT_UNSAFE_HIBERNATE 16 + /* !!! Keep TAINT_FLAGS_COUNT in sync !!! */ + + #ifdef CONFIG_SUSE_KERNEL_SUPPORTED +@@ -538,7 +539,7 @@ extern enum system_states { + #define TAINT_EXTERNAL_SUPPORT 31 + #define TAINT_FLAGS_COUNT 32 + #else +-#define TAINT_FLAGS_COUNT 16 ++#define TAINT_FLAGS_COUNT 17 + #endif + + struct taint_flag { +--- a/kernel/panic.c ++++ b/kernel/panic.c +@@ -321,6 +321,7 @@ const struct taint_flag taint_flags[TAIN + { 'E', ' ', true }, /* TAINT_UNSIGNED_MODULE */ + { 'L', ' ', false }, /* TAINT_SOFTLOCKUP */ + { 'K', ' ', true }, /* TAINT_LIVEPATCH */ ++ { 'H', ' ', false }, /* TAINT_UNSAFE_HIBERNATE */ + #ifdef CONFIG_SUSE_KERNEL_SUPPORTED + { 'N', ' ', true }, /* TAINT_NO_SUPPORT */ + { 'X', ' ', true }, /* TAINT_EXTERNAL_SUPPORT */ +@@ -346,6 +347,7 @@ const struct taint_flag taint_flags[TAIN + * 'E' - Unsigned module has been loaded. + * 'L' - A soft lockup has previously occurred. + * 'K' - Kernel has been live patched. ++ * 'H' - System restored from unsafe hibernate snapshot image. + * 'N' - Unsuported modules loaded. + * 'X' - Modules with external support loaded. + * +--- a/kernel/power/Kconfig ++++ b/kernel/power/Kconfig +@@ -89,6 +89,15 @@ config HIBERNATE_VERIFICATION + key for hibernate verification. This function will be bypassed on + legacy BIOS. + ++config HIBERNATE_VERIFICATION_FORCE ++ bool "Require hibernate snapshot image to be validly signed" ++ depends on HIBERNATE_VERIFICATION ++ help ++ Refuse the system to be resumed from a snapshot image which is ++ unsigned or signed by a wrong key. If this option is not enabled, ++ the system can be resumed by unsigned snapshot image and kernel ++ will be tainted. ++ + config ARCH_SAVE_PAGE_KEYS + bool + +--- a/kernel/power/hibernate.c ++++ b/kernel/power/hibernate.c +@@ -1182,6 +1182,8 @@ static int __init hibernate_setup(char * + } else if (IS_ENABLED(CONFIG_STRICT_KERNEL_RWX) + && !strncmp(str, "protect_image", 13)) { + enable_restore_image_protection(); ++ } else if (!strncmp(str, "sigenforce", 10)) { ++ snapshot_set_enforce_verify(); + } + return 1; + } +--- a/kernel/power/power.h ++++ b/kernel/power/power.h +@@ -171,10 +171,14 @@ extern void snapshot_free_trampoline(voi + extern int snapshot_image_verify(void); + extern int swsusp_prepare_hash(bool may_sleep); + extern void swsusp_finish_hash(void); ++extern void snapshot_set_enforce_verify(void); ++extern int snapshot_is_enforce_verify(void); + #else + static inline int snapshot_image_verify(void) { return 0; } + static inline int swsusp_prepare_hash(bool may_sleep) { return 0; } + static inline void swsusp_finish_hash(void) {} ++static inline void snapshot_set_enforce_verify(void) {} ++static inline int snapshot_is_enforce_verify(void) {return 0;} + #endif + + /* If unset, the snapshot device cannot be open. */ +--- a/kernel/power/snapshot.c ++++ b/kernel/power/snapshot.c +@@ -90,6 +90,7 @@ static inline void hibernate_restore_unp + * to image kernel. + */ + struct trampoline { ++ int sig_enforce; + int sig_verify_ret; + bool secret_key_valid; + u8 secret_key[SECRET_KEY_SIZE]; +@@ -1438,6 +1439,23 @@ static u8 signature[SNAPSHOT_DIGEST_SIZE + /* Keep the signature verification result for trampoline */ + static int sig_verify_ret; + ++/* enforce the snapshot must be signed */ ++#ifdef CONFIG_HIBERNATE_VERIFICATION_FORCE ++static bool sig_enforce = true; ++#else ++static bool sig_enforce; ++#endif ++ ++void snapshot_set_enforce_verify(void) ++{ ++ sig_enforce = true; ++} ++ ++int snapshot_is_enforce_verify(void) ++{ ++ return sig_enforce; ++} ++ + static u8 *s4_verify_digest; + static struct shash_desc *s4_verify_desc; + +@@ -1451,7 +1469,7 @@ int swsusp_prepare_hash(bool may_sleep) + key = get_efi_secret_key(); + if (!key) { + pr_warn_once("PM: secret key is invalid\n"); +- return -EINVAL; ++ return (sig_enforce) ? -EINVAL : 0; + } + + tfm = crypto_alloc_shash(SNAPSHOT_HMAC, 0, 0); +@@ -1546,6 +1564,8 @@ int snapshot_image_verify(void) + pr_warn("PM: Signature verification failed: %d\n", ret); + error: + sig_verify_ret = ret; ++ if (!sig_enforce) ++ ret = 0; + return ret; + } + +@@ -1619,17 +1639,30 @@ static void load_signature(struct swsusp + + static void init_sig_verify(struct trampoline *t) + { ++ t->sig_enforce = sig_enforce; + t->sig_verify_ret = sig_verify_ret; + sig_verify_ret = 0; + } + + static void handle_sig_verify(struct trampoline *t) + { +- if (t->sig_verify_ret) ++ sig_enforce = t->sig_enforce; ++ if (sig_enforce) ++ pr_info("PM: Enforce the snapshot to be validly signed\n"); ++ ++ if (t->sig_verify_ret) { + pr_warn("PM: Signature verification failed: %d\n", + t->sig_verify_ret); +- else if (t->secret_key_valid) ++ /* taint kernel */ ++ if (!sig_enforce) { ++ pr_warn("PM: System resumed from unsafe snapshot - " ++ "tainting kernel\n"); ++ add_taint(TAINT_UNSAFE_HIBERNATE, LOCKDEP_STILL_OK); ++ pr_info("%s\n", print_tainted()); ++ } ++ } else if (t->secret_key_valid) { + pr_info("PM: Signature verification passed.\n"); ++ } + } + #else + static int diff --git a/patches.suse/0011-PCI-mobiveil-fix-the-INTx-process-error.patch b/patches.suse/0011-PCI-mobiveil-fix-the-INTx-process-error.patch new file mode 100644 index 0000000..ee05ca1 --- /dev/null +++ b/patches.suse/0011-PCI-mobiveil-fix-the-INTx-process-error.patch @@ -0,0 +1,63 @@ +From 0e57c2cbf580d6461005a293adeacebf7265d8f6 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:32 +0000 +Subject: [PATCH 11/26] PCI: mobiveil: fix the INTx process error + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +In the loop block, there is not code change the loop key, +this patch updated the loop key by re-read the INTx status +register. + +This patch also change to clear the handled INTx status. + +Note: Need MV to test this fix. + +Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host +Bridge IP driver") +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa + +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index fd121e7780da..597c620a6f58 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) + /* Handle INTx */ + if (intr_status & PAB_INTP_INTX_MASK) { + shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); ++ shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + do { + for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { +@@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) + dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", + bit); + +- /* clear interrupt */ +- csr_writel(pcie, +- shifted_status << PAB_INTX_START, ++ /* clear interrupt handled */ ++ csr_writel(pcie, 1 << (PAB_INTX_START + bit), + PAB_INTP_AMBA_MISC_STAT); + } +- } while ((shifted_status >> PAB_INTX_START) != 0); ++ ++ shifted_status = csr_readl(pcie, ++ PAB_INTP_AMBA_MISC_STAT); ++ shifted_status &= PAB_INTP_INTX_MASK; ++ shifted_status >>= PAB_INTX_START; ++ } while (shifted_status != 0); + } + + /* read extra MSI status register */ +-- +2.11.0 + diff --git a/patches.suse/0011-PM-hibernate-require-hibernate-snapshot-image-to-be-.patch b/patches.suse/0011-PM-hibernate-require-hibernate-snapshot-image-to-be-.patch new file mode 100644 index 0000000..f3004b3 --- /dev/null +++ b/patches.suse/0011-PM-hibernate-require-hibernate-snapshot-image-to-be-.patch @@ -0,0 +1,42 @@ +From ba4074484d792ae861f7a0133951ad299c16d56c Mon Sep 17 00:00:00 2001 +From: "Lee, Chun-Yi" +Date: Wed, 13 Dec 2017 18:34:58 +0800 +Subject: [PATCH 11/11] PM / hibernate: require hibernate snapshot image to be + validly signed when kernel is locked down +Patch-mainline: No, will be submitted to upstream +References: fate#316350 + +When the kernel is locked down, the snapshot must be signed by secret +key. Kernel should stops whole resuming process when the snapshot is +unsigned or signed by wrong key. If the efi secret key is invalid +(when secure boot is disabled), the hibernation function will be locked +down. + +Signed-off-by: Lee, Chun-Yi +--- + kernel/power/hibernate.c | 14 +++++++++++++- + 1 file changed, 13 insertions(+), 1 deletion(-) + +--- a/kernel/power/hibernate.c ++++ b/kernel/power/hibernate.c +@@ -72,7 +72,19 @@ static const struct platform_hibernation + + bool hibernation_available(void) + { +- return nohibernate == 0 && !kernel_is_locked_down(); ++ if (nohibernate != 0) ++ return false; ++ ++ if (kernel_is_locked_down() || snapshot_is_enforce_verify()) { ++ snapshot_set_enforce_verify(); ++ if (get_efi_secret_key()) ++ return true; ++ else ++ pr_warn("the secret key is invalid\n"); ++ return false; ++ } else { ++ return true; ++ } + } + + /** diff --git a/patches.suse/0012-PCI-mobiveil-only-fix-up-the-Class-Code-field.patch b/patches.suse/0012-PCI-mobiveil-only-fix-up-the-Class-Code-field.patch new file mode 100644 index 0000000..8df9329 --- /dev/null +++ b/patches.suse/0012-PCI-mobiveil-only-fix-up-the-Class-Code-field.patch @@ -0,0 +1,52 @@ +From bd3e63980932fe9f5dd6ddfcc609093d47023c1d Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:38 +0000 +Subject: [PATCH 12/26] PCI: mobiveil: only fix up the Class Code field + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Fix up the Class Code to PCI bridge, do not change the Revision ID. +And move the fixup to mobiveil_host_init function. + +Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge +IP driver") +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa + +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 597c620a6f58..818446a81041 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -660,6 +660,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + type, resource_size(win->res)); + } + ++ /* fixup for PCIe class register */ ++ value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS); ++ value &= 0xff; ++ value |= (PCI_CLASS_BRIDGE_PCI << 16); ++ csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); ++ + /* setup MSI hardware registers */ + mobiveil_pcie_enable_msi(pcie); + +@@ -904,9 +910,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) + goto error; + } + +- /* fixup for PCIe class register */ +- csr_writel(pcie, 0x060402ab, PAB_INTP_AXI_PIO_CLASS); +- + /* initialize the IRQ domains */ + ret = mobiveil_pcie_init_irq_domain(pcie); + if (ret) { +-- +2.11.0 + diff --git a/patches.suse/0013-PCI-mobiveil-move-out-the-link-up-waiting-from-mobiv.patch b/patches.suse/0013-PCI-mobiveil-move-out-the-link-up-waiting-from-mobiv.patch new file mode 100644 index 0000000..d05a49e --- /dev/null +++ b/patches.suse/0013-PCI-mobiveil-move-out-the-link-up-waiting-from-mobiv.patch @@ -0,0 +1,65 @@ +From 19380a51b8174e1551428e760bfacb115c2e7dee Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:44 +0000 +Subject: [PATCH 13/26] PCI: mobiveil: move out the link up waiting from + mobiveil_host_init + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Host initial sequence does not depend on PCIe link up, so move it +to the place just before the enumeration. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 15 +++++++-------- + 1 file changed, 7 insertions(+), 8 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 818446a81041..b44ade7eadd3 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -589,15 +589,8 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) + static int mobiveil_host_init(struct mobiveil_pcie *pcie) + { + u32 value, pab_ctrl, type; +- int err; + struct resource_entry *win; + +- err = mobiveil_bringup_link(pcie); +- if (err) { +- dev_info(&pcie->pdev->dev, "link bring-up failed\n"); +- return err; +- } +- + /* + * program Bus Master Enable Bit in Command Register in PAB Config + * Space +@@ -669,7 +662,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + /* setup MSI hardware registers */ + mobiveil_pcie_enable_msi(pcie); + +- return err; ++ return 0; + } + + static void mobiveil_mask_intx_irq(struct irq_data *data) +@@ -930,6 +923,12 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) + bridge->map_irq = of_irq_parse_and_map_pci; + bridge->swizzle_irq = pci_common_swizzle; + ++ ret = mobiveil_bringup_link(pcie); ++ if (ret) { ++ dev_info(dev, "link bring-up failed\n"); ++ goto error; ++ } ++ + /* setup the kernel resources for the newly added PCIe root bus */ + ret = pci_scan_root_bus_bridge(bridge); + if (ret) +-- +2.11.0 + diff --git a/patches.suse/0013-ahci-thunderx2-Fix-for-errata-that-affects-stop-engi.patch b/patches.suse/0013-ahci-thunderx2-Fix-for-errata-that-affects-stop-engi.patch new file mode 100644 index 0000000..c4bca79 --- /dev/null +++ b/patches.suse/0013-ahci-thunderx2-Fix-for-errata-that-affects-stop-engi.patch @@ -0,0 +1,68 @@ +From a3e0f3ca4fd69380fa12cdcff9d060d04ac8714f Mon Sep 17 00:00:00 2001 +From: Jayachandran C +Date: Fri, 10 Mar 2017 10:04:52 +0000 +Subject: [PATCH 13/22] ahci: thunderx2: Fix for errata that affects stop + engine + +Patch-mainline: Never, Early silicon errata +References: bsc#1035000 + +Apply workaround for this errata: + Synopsis: Resetting PxCMD.ST may hang the SATA device + + Description: An internal ping-pong buffer state is not reset + correctly for an PxCMD.ST=0 command for a SATA channel. This + may cause the SATA interface to hang when a PxCMD.ST=0 command + is received. + + Workaround: A SATA_BIU_CORE_ENABLE.sw_init_bsi must be asserted + by the driver whenever the PxCMD.ST needs to be de-asserted. This + will reset both the ports. So, it may not always work in a 2 + channel SATA system. + + Resolution: Fix in B0. + +Add the code to ahci_stop_engine() to do this. It is not easy to +stop the other "port" since it is associated with a different AHCI +interface. Please note that with this fix, SATA reset does not +hang any more, but it can cause failures on the other interface +if that is in active use. + +Unfortunately, we have nothing other the the CPU ID to check if the +SATA block has this issue. + +Signed-off-by: Jayachandran C +Signed-off-by: Robert Richter +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/ata/libahci.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c +index ee7db3119b18..fe4aa8b87504 100644 +--- a/drivers/ata/libahci.c ++++ b/drivers/ata/libahci.c +@@ -664,6 +664,20 @@ int ahci_stop_engine(struct ata_port *ap) + tmp &= ~PORT_CMD_START; + writel(tmp, port_mmio + PORT_CMD); + ++#ifdef CONFIG_ARM64 ++ /* Rev Ax of Cavium CN99XX needs a hack for port stop */ ++ if (MIDR_IS_CPU_MODEL_RANGE(read_cpuid_id(), ++ MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN), ++ MIDR_CPU_VAR_REV(0, 0), ++ MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) { ++ tmp = readl(hpriv->mmio + 0x8000); ++ writel(tmp | (1 << 26), hpriv->mmio + 0x8000); ++ udelay(1); ++ writel(tmp & ~(1 << 26), hpriv->mmio + 0x8000); ++ dev_warn(ap->host->dev, "CN99XX stop engine fix applied!\n"); ++ } ++#endif ++ + /* wait for engine to stop. This could be as long as 500 msec */ + tmp = ata_wait_register(ap, port_mmio + PORT_CMD, + PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500); +-- +2.11.0 + diff --git a/patches.suse/0014-PCI-mobiveil-move-irq-chained-handler-setup-out-of-D.patch b/patches.suse/0014-PCI-mobiveil-move-irq-chained-handler-setup-out-of-D.patch new file mode 100644 index 0000000..17058db --- /dev/null +++ b/patches.suse/0014-PCI-mobiveil-move-irq-chained-handler-setup-out-of-D.patch @@ -0,0 +1,44 @@ +From 6f483e98a12b759317310dbd2b9bd5a681fa30ff Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:51 +0000 +Subject: [PATCH 14/26] PCI: mobiveil: move irq chained handler setup out of DT + parse + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Move irq_set_chained_handler_and_data() out of DT parse function. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index b44ade7eadd3..9c21ea4be278 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -467,8 +467,6 @@ static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) + return -ENODEV; + } + +- irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie); +- + return 0; + } + +@@ -910,6 +908,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev) + goto error; + } + ++ irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie); ++ + ret = devm_request_pci_bus_resources(dev, &pcie->resources); + if (ret) + goto error; +-- +2.11.0 + diff --git a/patches.suse/0015-PCI-mobiveil-initialize-Primary-Secondary-Subordinat.patch b/patches.suse/0015-PCI-mobiveil-initialize-Primary-Secondary-Subordinat.patch new file mode 100644 index 0000000..28f4723 --- /dev/null +++ b/patches.suse/0015-PCI-mobiveil-initialize-Primary-Secondary-Subordinat.patch @@ -0,0 +1,40 @@ +From 699fe9bc3f15346f22957cbc43e775e55a99f5cb Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:09:58 +0000 +Subject: [PATCH 15/26] PCI: mobiveil: initialize Primary/Secondary/Subordinate + bus number + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +The reset value is all zero, so set a workable value for Primary, +Secondary and Subordinate bus numbers. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/pcie-mobiveil.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/pci/host/pcie-mobiveil.c b/drivers/pci/host/pcie-mobiveil.c +index 9c21ea4be278..ce2954a169bb 100644 +--- a/drivers/pci/host/pcie-mobiveil.c ++++ b/drivers/pci/host/pcie-mobiveil.c +@@ -589,6 +589,12 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + u32 value, pab_ctrl, type; + struct resource_entry *win; + ++ /* setup bus numbers */ ++ value = csr_readl(pcie, PCI_PRIMARY_BUS); ++ value &= 0xff000000; ++ value |= 0x00ff0100; ++ csr_writel(pcie, value, PCI_PRIMARY_BUS); ++ + /* + * program Bus Master Enable Bit in Command Register in PAB Config + * Space +-- +2.11.0 + diff --git a/patches.suse/0016-dt-bindings-pci-mobiveil-change-gpio_slave-and-apb_c.patch b/patches.suse/0016-dt-bindings-pci-mobiveil-change-gpio_slave-and-apb_c.patch new file mode 100644 index 0000000..91dca17 --- /dev/null +++ b/patches.suse/0016-dt-bindings-pci-mobiveil-change-gpio_slave-and-apb_c.patch @@ -0,0 +1,41 @@ +From 3a713694614c920c954c2ae19071e2503c5b1da4 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:04 +0000 +Subject: [PATCH 16/26] dt-bindings: pci: mobiveil: change gpio_slave and + apb_csr to optional + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave" +is not used in current code, and "apb_csr" is not used by some +platforms. + +Signed-off-by: Hou Zhiqiang +Acked-by: Subrahmanya Lingappa +Acked-by: Rob Herring +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + Documentation/devicetree/bindings/pci/mobiveil-pcie.txt | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt +index 65038aa642e5..fd4769dc3eac 100644 +--- a/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt ++++ b/Documentation/devicetree/bindings/pci/mobiveil-pcie.txt +@@ -10,8 +10,10 @@ Required properties: + interrupt source. The value must be 1. + - compatible: Should contain "mbvl,gpex40-pcie" + - reg: Should contain PCIe registers location and length ++ Mandatory: + "config_axi_slave": PCIe controller registers + "csr_axi_slave" : Bridge config registers ++ Optional: + "gpio_slave" : GPIO registers to control slot power + "apb_csr" : MSI registers + +-- +2.11.0 + diff --git a/patches.suse/0017-PCI-mobiveil-refactor-Mobiveil-PCIe-Host-Bridge-IP-d.patch b/patches.suse/0017-PCI-mobiveil-refactor-Mobiveil-PCIe-Host-Bridge-IP-d.patch new file mode 100644 index 0000000..5cb44ea --- /dev/null +++ b/patches.suse/0017-PCI-mobiveil-refactor-Mobiveil-PCIe-Host-Bridge-IP-d.patch @@ -0,0 +1,1242 @@ +From f168cc364bc09247ceeb469f3a3d7f9a5352cb5a Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:11 +0000 +Subject: [PATCH 17/26] PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP + driver + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +As the Mobiveil PCIe controller support RC&EP DAUL mode, and to +make platforms which integrated the Mobiveil PCIe IP more easy +to add their drivers, this patch moved the Mobiveil driver to +a new directory 'drivers/pci/host/mobiveil' and refactored +it according to the abstraction of RC&EP (EP driver will be added +later). + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + MAINTAINERS | 2 +- + drivers/pci/host/Kconfig | 11 +- + drivers/pci/host/Makefile | 2 +- + drivers/pci/host/mobiveil/Kconfig | 24 + + drivers/pci/host/mobiveil/Makefile | 4 + + drivers/pci/host/mobiveil/pcie-mobiveil-host.c | 614 +++++++++++++++++++++++++ + drivers/pci/host/mobiveil/pcie-mobiveil-plat.c | 54 +++ + drivers/pci/host/mobiveil/pcie-mobiveil.c | 228 +++++++++ + drivers/pci/host/mobiveil/pcie-mobiveil.h | 187 ++++++++ + 9 files changed, 1114 insertions(+), 12 deletions(-) + create mode 100644 drivers/pci/host/mobiveil/Kconfig + create mode 100644 drivers/pci/host/mobiveil/Makefile + create mode 100644 drivers/pci/host/mobiveil/pcie-mobiveil-host.c + create mode 100644 drivers/pci/host/mobiveil/pcie-mobiveil-plat.c + create mode 100644 drivers/pci/host/mobiveil/pcie-mobiveil.c + create mode 100644 drivers/pci/host/mobiveil/pcie-mobiveil.h + +diff --git a/MAINTAINERS b/MAINTAINERS +index 00fcfa67069f..ed81cf1c6e7f 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -10002,7 +10002,7 @@ M: Subrahmanya Lingappa + L: linux-pci@vger.kernel.org + S: Supported + F: Documentation/devicetree/bindings/pci/mobiveil-pcie.txt +-F: drivers/pci/controller/pcie-mobiveil.c ++F: drivers/pci/host/mobiveil/pcie-mobiveil* + + PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support) + M: Thomas Petazzoni +diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig +index dfefe4212647..b5f904dbcc2d 100644 +--- a/drivers/pci/host/Kconfig ++++ b/drivers/pci/host/Kconfig +@@ -180,16 +180,6 @@ config PCIE_ROCKCHIP + There is 1 internal PCIe port available to support GEN2 with + 4 slots. + +-config PCIE_MOBIVEIL +- bool "Mobiveil AXI PCIe controller" +- depends on ARCH_ZYNQMP || COMPILE_TEST +- depends on OF +- depends on PCI_MSI_IRQ_DOMAIN +- help +- Say Y here if you want to enable support for the Mobiveil AXI PCIe +- Soft IP. It has up to 8 outbound and inbound windows +- for address translation and it is a PCIe Gen4 IP. +- + config VMD + depends on PCI_MSI && X86_64 && SRCU + tristate "Intel Volume Management Device Driver" +@@ -206,4 +196,5 @@ config VMD + To compile this driver as a module, choose M here: the + module will be called vmd. + ++source "drivers/pci/host/mobiveil/Kconfig" + endmenu +diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile +index 7c14e80b14b6..f433c16d1940 100644 +--- a/drivers/pci/host/Makefile ++++ b/drivers/pci/host/Makefile +@@ -18,8 +18,8 @@ obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o + obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o + obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o + obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o +-obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o + obj-$(CONFIG_VMD) += vmd.o ++obj-y += mobiveil/ + + # The following drivers are for devices that use the generic ACPI + # pci_root.c driver but don't support standard ECAM config access. +diff --git a/drivers/pci/host/mobiveil/Kconfig b/drivers/pci/host/mobiveil/Kconfig +new file mode 100644 +index 000000000000..64343c07bfed +--- /dev/null ++++ b/drivers/pci/host/mobiveil/Kconfig +@@ -0,0 +1,24 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++menu "Mobiveil PCIe Core Support" ++ depends on PCI ++ ++config PCIE_MOBIVEIL ++ bool ++ ++config PCIE_MOBIVEIL_HOST ++ bool ++ depends on PCI_MSI_IRQ_DOMAIN ++ select PCIE_MOBIVEIL ++ ++config PCIE_MOBIVEIL_PLAT ++ bool "Mobiveil AXI PCIe controller" ++ depends on ARCH_ZYNQMP || COMPILE_TEST ++ depends on OF ++ select PCIE_MOBIVEIL_HOST ++ help ++ Say Y here if you want to enable support for the Mobiveil AXI PCIe ++ Soft IP. It has up to 8 outbound and inbound windows ++ for address translation and it is a PCIe Gen4 IP. ++ ++endmenu +diff --git a/drivers/pci/host/mobiveil/Makefile b/drivers/pci/host/mobiveil/Makefile +new file mode 100644 +index 000000000000..9fb6d1c6504d +--- /dev/null ++++ b/drivers/pci/host/mobiveil/Makefile +@@ -0,0 +1,4 @@ ++# SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o ++obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o ++obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +new file mode 100644 +index 000000000000..dc5324d94466 +--- /dev/null ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +@@ -0,0 +1,614 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * PCIe host controller driver for Mobiveil PCIe Host controller ++ * ++ * Copyright (c) 2018 Mobiveil Inc. ++ * Author: Subrahmanya Lingappa ++ * Refactor: Zhiqiang Hou ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "pcie-mobiveil.h" ++ ++static bool mobiveil_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) ++{ ++ struct mobiveil_pcie *pcie = bus->sysdata; ++ ++ /* Only one device down on each root port */ ++ if ((bus->number == pcie->rp.root_bus_nr) && (devfn > 0)) ++ return false; ++ ++ /* ++ * Do not read more than one device on the bus directly ++ * attached to RC ++ */ ++ if ((bus->primary == pcie->rp.root_bus_nr) && (devfn > 0)) ++ return false; ++ ++ return true; ++} ++ ++/* ++ * mobiveil_pcie_map_bus - routine to get the configuration base of either ++ * root port or endpoint ++ */ ++static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, ++ unsigned int devfn, int where) ++{ ++ struct mobiveil_pcie *pcie = bus->sysdata; ++ u32 value; ++ ++ if (!mobiveil_pcie_valid_device(bus, devfn)) ++ return NULL; ++ ++ /* RC config access */ ++ if (bus->number == pcie->rp.root_bus_nr) ++ return pcie->csr_axi_slave_base + where; ++ ++ /* ++ * EP config access (in Config/APIO space) ++ * Program PEX Address base (31..16 bits) with appropriate value ++ * (BDF) in PAB_AXI_AMAP_PEX_WIN_L0 Register. ++ * Relies on pci_lock serialization ++ */ ++ value = bus->number << PAB_BUS_SHIFT | ++ PCI_SLOT(devfn) << PAB_DEVICE_SHIFT | ++ PCI_FUNC(devfn) << PAB_FUNCTION_SHIFT; ++ ++ csr_writel(pcie, value, PAB_AXI_AMAP_PEX_WIN_L(WIN_NUM_0)); ++ ++ return pcie->rp.config_axi_slave_base + where; ++} ++ ++static struct pci_ops mobiveil_pcie_ops = { ++ .map_bus = mobiveil_pcie_map_bus, ++ .read = pci_generic_config_read, ++ .write = pci_generic_config_write, ++}; ++ ++static void mobiveil_pcie_isr(struct irq_desc *desc) ++{ ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct mobiveil_pcie *pcie = irq_desc_get_handler_data(desc); ++ struct device *dev = &pcie->pdev->dev; ++ struct mobiveil_msi *msi = &pcie->rp.msi; ++ u32 msi_data, msi_addr_lo, msi_addr_hi; ++ u32 intr_status, msi_status; ++ unsigned long shifted_status; ++ u32 bit, virq, val, mask; ++ ++ /* ++ * The core provides a single interrupt for both INTx/MSI messages. ++ * So we'll read both INTx and MSI status ++ */ ++ ++ chained_irq_enter(chip, desc); ++ ++ /* read INTx status */ ++ val = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); ++ mask = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); ++ intr_status = val & mask; ++ ++ /* Handle INTx */ ++ if (intr_status & PAB_INTP_INTX_MASK) { ++ shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); ++ shifted_status &= PAB_INTP_INTX_MASK; ++ shifted_status >>= PAB_INTX_START; ++ do { ++ for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { ++ virq = irq_find_mapping(pcie->rp.intx_domain, ++ bit + 1); ++ if (virq) ++ generic_handle_irq(virq); ++ else ++ dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", ++ bit); ++ ++ /* clear interrupt handled */ ++ csr_writel(pcie, 1 << (PAB_INTX_START + bit), ++ PAB_INTP_AMBA_MISC_STAT); ++ } ++ ++ shifted_status = csr_readl(pcie, ++ PAB_INTP_AMBA_MISC_STAT); ++ shifted_status &= PAB_INTP_INTX_MASK; ++ shifted_status >>= PAB_INTX_START; ++ } while (shifted_status != 0); ++ } ++ ++ /* read extra MSI status register */ ++ msi_status = readl_relaxed(pcie->apb_csr_base + MSI_STATUS_OFFSET); ++ ++ /* handle MSI interrupts */ ++ while (msi_status & 1) { ++ msi_data = readl_relaxed(pcie->apb_csr_base + MSI_DATA_OFFSET); ++ ++ /* ++ * MSI_STATUS_OFFSET register gets updated to zero ++ * once we pop not only the MSI data but also address ++ * from MSI hardware FIFO. So keeping these following ++ * two dummy reads. ++ */ ++ msi_addr_lo = readl_relaxed(pcie->apb_csr_base + ++ MSI_ADDR_L_OFFSET); ++ msi_addr_hi = readl_relaxed(pcie->apb_csr_base + ++ MSI_ADDR_H_OFFSET); ++ dev_dbg(dev, "MSI registers, data: %08x, addr: %08x:%08x\n", ++ msi_data, msi_addr_hi, msi_addr_lo); ++ ++ virq = irq_find_mapping(msi->dev_domain, msi_data); ++ if (virq) ++ generic_handle_irq(virq); ++ ++ msi_status = readl_relaxed(pcie->apb_csr_base + ++ MSI_STATUS_OFFSET); ++ } ++ ++ /* Clear the interrupt status */ ++ csr_writel(pcie, intr_status, PAB_INTP_AMBA_MISC_STAT); ++ chained_irq_exit(chip, desc); ++} ++ ++static int mobiveil_pcie_parse_dt(struct mobiveil_pcie *pcie) ++{ ++ struct device *dev = &pcie->pdev->dev; ++ struct platform_device *pdev = pcie->pdev; ++ struct device_node *node = dev->of_node; ++ struct resource *res; ++ ++ /* map config resource */ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "config_axi_slave"); ++ pcie->rp.config_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); ++ if (IS_ERR(pcie->rp.config_axi_slave_base)) ++ return PTR_ERR(pcie->rp.config_axi_slave_base); ++ pcie->rp.ob_io_res = res; ++ ++ /* map csr resource */ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "csr_axi_slave"); ++ pcie->csr_axi_slave_base = devm_pci_remap_cfg_resource(dev, res); ++ if (IS_ERR(pcie->csr_axi_slave_base)) ++ return PTR_ERR(pcie->csr_axi_slave_base); ++ pcie->pcie_reg_base = res->start; ++ ++ /* read the number of windows requested */ ++ if (of_property_read_u32(node, "apio-wins", &pcie->apio_wins)) ++ pcie->apio_wins = MAX_PIO_WINDOWS; ++ ++ if (of_property_read_u32(node, "ppio-wins", &pcie->ppio_wins)) ++ pcie->ppio_wins = MAX_PIO_WINDOWS; ++ ++ return 0; ++} ++ ++static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) ++{ ++ phys_addr_t msg_addr = pcie->pcie_reg_base; ++ struct mobiveil_msi *msi = &pcie->rp.msi; ++ ++ msi->num_of_vectors = PCI_NUM_MSI; ++ msi->msi_pages_phys = (phys_addr_t)msg_addr; ++ ++ writel_relaxed(lower_32_bits(msg_addr), ++ pcie->apb_csr_base + MSI_BASE_LO_OFFSET); ++ writel_relaxed(upper_32_bits(msg_addr), ++ pcie->apb_csr_base + MSI_BASE_HI_OFFSET); ++ writel_relaxed(4096, pcie->apb_csr_base + MSI_SIZE_OFFSET); ++ writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET); ++} ++ ++static int mobiveil_host_init(struct mobiveil_pcie *pcie) ++{ ++ u32 value, pab_ctrl, type; ++ struct resource_entry *win; ++ ++ /* setup bus numbers */ ++ value = csr_readl(pcie, PCI_PRIMARY_BUS); ++ value &= 0xff000000; ++ value |= 0x00ff0100; ++ csr_writel(pcie, value, PCI_PRIMARY_BUS); ++ ++ /* ++ * program Bus Master Enable Bit in Command Register in PAB Config ++ * Space ++ */ ++ value = csr_readl(pcie, PCI_COMMAND); ++ value |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; ++ csr_writel(pcie, value, PCI_COMMAND); ++ ++ /* ++ * program PIO Enable Bit to 1 (and PEX PIO Enable to 1) in PAB_CTRL ++ * register ++ */ ++ pab_ctrl = csr_readl(pcie, PAB_CTRL); ++ pab_ctrl |= (1 << AMBA_PIO_ENABLE_SHIFT) | (1 << PEX_PIO_ENABLE_SHIFT); ++ csr_writel(pcie, pab_ctrl, PAB_CTRL); ++ ++ /* ++ * program PIO Enable Bit to 1 and Config Window Enable Bit to 1 in ++ * PAB_AXI_PIO_CTRL Register ++ */ ++ value = csr_readl(pcie, PAB_AXI_PIO_CTRL); ++ value |= APIO_EN_MASK; ++ csr_writel(pcie, value, PAB_AXI_PIO_CTRL); ++ ++ /* Enable PCIe PIO master */ ++ value = csr_readl(pcie, PAB_PEX_PIO_CTRL); ++ value |= 1 << PIO_ENABLE_SHIFT; ++ csr_writel(pcie, value, PAB_PEX_PIO_CTRL); ++ ++ /* ++ * we'll program one outbound window for config reads and ++ * another default inbound window for all the upstream traffic ++ * rest of the outbound windows will be configured according to ++ * the "ranges" field defined in device tree ++ */ ++ ++ /* config outbound translation window */ ++ program_ob_windows(pcie, WIN_NUM_0, pcie->rp.ob_io_res->start, 0, ++ CFG_WINDOW_TYPE, resource_size(pcie->rp.ob_io_res)); ++ ++ /* memory inbound translation window */ ++ program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); ++ ++ /* Get the I/O and memory ranges from DT */ ++ resource_list_for_each_entry(win, &pcie->resources) { ++ if (resource_type(win->res) == IORESOURCE_MEM) { ++ type = MEM_WINDOW_TYPE; ++ } else if (resource_type(win->res) == IORESOURCE_IO) { ++ type = IO_WINDOW_TYPE; ++ } else if (resource_type(win->res) == IORESOURCE_BUS) { ++ pcie->rp.root_bus_nr = win->res->start; ++ continue; ++ } else { ++ continue; ++ } ++ ++ /* configure outbound translation window */ ++ program_ob_windows(pcie, pcie->ob_wins_configured, ++ win->res->start, ++ win->res->start - win->offset, ++ type, resource_size(win->res)); ++ } ++ ++ /* fixup for PCIe class register */ ++ value = csr_readl(pcie, PAB_INTP_AXI_PIO_CLASS); ++ value &= 0xff; ++ value |= (PCI_CLASS_BRIDGE_PCI << 16); ++ csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); ++ ++ return 0; ++} ++ ++static void mobiveil_mask_intx_irq(struct irq_data *data) ++{ ++ struct irq_desc *desc = irq_to_desc(data->irq); ++ struct mobiveil_pcie *pcie; ++ unsigned long flags; ++ u32 mask, shifted_val; ++ ++ pcie = irq_desc_get_chip_data(desc); ++ mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); ++ raw_spin_lock_irqsave(&pcie->rp.intx_mask_lock, flags); ++ shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); ++ shifted_val &= ~mask; ++ csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); ++ raw_spin_unlock_irqrestore(&pcie->rp.intx_mask_lock, flags); ++} ++ ++static void mobiveil_unmask_intx_irq(struct irq_data *data) ++{ ++ struct irq_desc *desc = irq_to_desc(data->irq); ++ struct mobiveil_pcie *pcie; ++ unsigned long flags; ++ u32 shifted_val, mask; ++ ++ pcie = irq_desc_get_chip_data(desc); ++ mask = 1 << ((data->hwirq + PAB_INTX_START) - 1); ++ raw_spin_lock_irqsave(&pcie->rp.intx_mask_lock, flags); ++ shifted_val = csr_readl(pcie, PAB_INTP_AMBA_MISC_ENB); ++ shifted_val |= mask; ++ csr_writel(pcie, shifted_val, PAB_INTP_AMBA_MISC_ENB); ++ raw_spin_unlock_irqrestore(&pcie->rp.intx_mask_lock, flags); ++} ++ ++static struct irq_chip intx_irq_chip = { ++ .name = "mobiveil_pcie:intx", ++ .irq_enable = mobiveil_unmask_intx_irq, ++ .irq_disable = mobiveil_mask_intx_irq, ++ .irq_mask = mobiveil_mask_intx_irq, ++ .irq_unmask = mobiveil_unmask_intx_irq, ++}; ++ ++/* routine to setup the INTx related data */ ++static int mobiveil_pcie_intx_map(struct irq_domain *domain, unsigned int irq, ++ irq_hw_number_t hwirq) ++{ ++ irq_set_chip_and_handler(irq, &intx_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, domain->host_data); ++ ++ return 0; ++} ++ ++/* INTx domain operations structure */ ++static const struct irq_domain_ops intx_domain_ops = { ++ .map = mobiveil_pcie_intx_map, ++}; ++ ++static struct irq_chip mobiveil_msi_irq_chip = { ++ .name = "Mobiveil PCIe MSI", ++ .irq_mask = pci_msi_mask_irq, ++ .irq_unmask = pci_msi_unmask_irq, ++}; ++ ++static struct msi_domain_info mobiveil_msi_domain_info = { ++ .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | ++ MSI_FLAG_PCI_MSIX), ++ .chip = &mobiveil_msi_irq_chip, ++}; ++ ++static void mobiveil_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ++{ ++ struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(data); ++ phys_addr_t addr = pcie->pcie_reg_base + (data->hwirq * sizeof(int)); ++ ++ msg->address_lo = lower_32_bits(addr); ++ msg->address_hi = upper_32_bits(addr); ++ msg->data = data->hwirq; ++ ++ dev_dbg(&pcie->pdev->dev, "msi#%d address_hi %#x address_lo %#x\n", ++ (int)data->hwirq, msg->address_hi, msg->address_lo); ++} ++ ++static int mobiveil_msi_set_affinity(struct irq_data *irq_data, ++ const struct cpumask *mask, bool force) ++{ ++ return -EINVAL; ++} ++ ++static struct irq_chip mobiveil_msi_bottom_irq_chip = { ++ .name = "Mobiveil MSI", ++ .irq_compose_msi_msg = mobiveil_compose_msi_msg, ++ .irq_set_affinity = mobiveil_msi_set_affinity, ++}; ++ ++static int mobiveil_irq_msi_domain_alloc(struct irq_domain *domain, ++ unsigned int virq, ++ unsigned int nr_irqs, void *args) ++{ ++ struct mobiveil_pcie *pcie = domain->host_data; ++ struct mobiveil_msi *msi = &pcie->rp.msi; ++ unsigned long bit; ++ ++ WARN_ON(nr_irqs != 1); ++ mutex_lock(&msi->lock); ++ ++ bit = find_first_zero_bit(msi->msi_irq_in_use, msi->num_of_vectors); ++ if (bit >= msi->num_of_vectors) { ++ mutex_unlock(&msi->lock); ++ return -ENOSPC; ++ } ++ ++ set_bit(bit, msi->msi_irq_in_use); ++ ++ mutex_unlock(&msi->lock); ++ ++ irq_domain_set_info(domain, virq, bit, &mobiveil_msi_bottom_irq_chip, ++ domain->host_data, handle_level_irq, NULL, NULL); ++ return 0; ++} ++ ++static void mobiveil_irq_msi_domain_free(struct irq_domain *domain, ++ unsigned int virq, ++ unsigned int nr_irqs) ++{ ++ struct irq_data *d = irq_domain_get_irq_data(domain, virq); ++ struct mobiveil_pcie *pcie = irq_data_get_irq_chip_data(d); ++ struct mobiveil_msi *msi = &pcie->rp.msi; ++ ++ mutex_lock(&msi->lock); ++ ++ if (!test_bit(d->hwirq, msi->msi_irq_in_use)) ++ dev_err(&pcie->pdev->dev, "trying to free unused MSI#%lu\n", ++ d->hwirq); ++ else ++ __clear_bit(d->hwirq, msi->msi_irq_in_use); ++ ++ mutex_unlock(&msi->lock); ++} ++static const struct irq_domain_ops msi_domain_ops = { ++ .alloc = mobiveil_irq_msi_domain_alloc, ++ .free = mobiveil_irq_msi_domain_free, ++}; ++ ++static int mobiveil_allocate_msi_domains(struct mobiveil_pcie *pcie) ++{ ++ struct device *dev = &pcie->pdev->dev; ++ struct fwnode_handle *fwnode = of_node_to_fwnode(dev->of_node); ++ struct mobiveil_msi *msi = &pcie->rp.msi; ++ ++ mutex_init(&msi->lock); ++ msi->dev_domain = irq_domain_add_linear(NULL, msi->num_of_vectors, ++ &msi_domain_ops, pcie); ++ if (!msi->dev_domain) { ++ dev_err(dev, "failed to create IRQ domain\n"); ++ return -ENOMEM; ++ } ++ ++ msi->msi_domain = pci_msi_create_irq_domain(fwnode, ++ &mobiveil_msi_domain_info, ++ msi->dev_domain); ++ if (!msi->msi_domain) { ++ dev_err(dev, "failed to create MSI domain\n"); ++ irq_domain_remove(msi->dev_domain); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie) ++{ ++ struct device *dev = &pcie->pdev->dev; ++ struct device_node *node = dev->of_node; ++ int ret; ++ ++ /* setup INTx */ ++ pcie->rp.intx_domain = irq_domain_add_linear(node, PCI_NUM_INTX, ++ &intx_domain_ops, pcie); ++ ++ if (!pcie->rp.intx_domain) { ++ dev_err(dev, "Failed to get a INTx IRQ domain\n"); ++ return -ENOMEM; ++ } ++ ++ raw_spin_lock_init(&pcie->rp.intx_mask_lock); ++ ++ /* setup MSI */ ++ ret = mobiveil_allocate_msi_domains(pcie); ++ if (ret) ++ return ret; ++ ++ return 0; ++} ++ ++static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) ++{ ++ struct device *dev = &pcie->pdev->dev; ++ struct resource *res; ++ int ret; ++ ++ if (pcie->rp.ops->interrupt_init) ++ return pcie->rp.ops->interrupt_init(pcie); ++ ++ /* map MSI config resource */ ++ res = platform_get_resource_byname(pcie->pdev, IORESOURCE_MEM, ++ "apb_csr"); ++ pcie->apb_csr_base = devm_pci_remap_cfg_resource(dev, res); ++ if (IS_ERR(pcie->apb_csr_base)) ++ return PTR_ERR(pcie->apb_csr_base); ++ ++ /* setup MSI hardware registers */ ++ mobiveil_pcie_enable_msi(pcie); ++ ++ pcie->rp.irq = platform_get_irq(pcie->pdev, 0); ++ if (pcie->rp.irq <= 0) { ++ dev_err(dev, "failed to map IRQ: %d\n", pcie->rp.irq); ++ return -ENODEV; ++ } ++ ++ /* initialize the IRQ domains */ ++ ret = mobiveil_pcie_init_irq_domain(pcie); ++ if (ret) { ++ dev_err(dev, "Failed creating IRQ Domain\n"); ++ return ret; ++ } ++ ++ irq_set_chained_handler_and_data(pcie->rp.irq, ++ mobiveil_pcie_isr, pcie); ++ ++ /* Enable interrupts */ ++ csr_writel(pcie, (PAB_INTP_INTX_MASK | PAB_INTP_MSI_MASK), ++ PAB_INTP_AMBA_MISC_ENB); ++ ++ return 0; ++} ++ ++int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) ++{ ++ struct pci_bus *bus; ++ struct pci_bus *child; ++ struct pci_host_bridge *bridge; ++ struct device *dev = &pcie->pdev->dev; ++ resource_size_t iobase; ++ int ret; ++ ++ INIT_LIST_HEAD(&pcie->resources); ++ ++ ret = mobiveil_pcie_parse_dt(pcie); ++ if (ret) { ++ dev_err(dev, "Parsing DT failed, ret: %x\n", ret); ++ return ret; ++ } ++ ++ /* allocate the PCIe port */ ++ bridge = devm_pci_alloc_host_bridge(dev, 0); ++ if (!bridge) ++ return -ENOMEM; ++ ++ /* parse the host bridge base addresses from the device tree file */ ++ ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, ++ &pcie->resources, &iobase); ++ if (ret) { ++ dev_err(dev, "Getting bridge resources failed\n"); ++ return ret; ++ } ++ ++ /* ++ * configure all inbound and outbound windows and prepare the RC for ++ * config access ++ */ ++ ret = mobiveil_host_init(pcie); ++ if (ret) { ++ dev_err(dev, "Failed to initialize host\n"); ++ goto error; ++ } ++ ++ ret = mobiveil_pcie_interrupt_init(pcie); ++ if (ret) { ++ dev_err(dev, "Interrupt init failed\n"); ++ goto error; ++ } ++ ++ ret = devm_request_pci_bus_resources(dev, &pcie->resources); ++ if (ret) ++ goto error; ++ ++ /* Initialize bridge */ ++ list_splice_init(&pcie->resources, &bridge->windows); ++ bridge->dev.parent = dev; ++ bridge->sysdata = pcie; ++ bridge->busnr = pcie->rp.root_bus_nr; ++ bridge->ops = &mobiveil_pcie_ops; ++ bridge->map_irq = of_irq_parse_and_map_pci; ++ bridge->swizzle_irq = pci_common_swizzle; ++ ++ ret = mobiveil_bringup_link(pcie); ++ if (ret) { ++ dev_info(dev, "link bring-up failed\n"); ++ goto error; ++ } ++ ++ /* setup the kernel resources for the newly added PCIe root bus */ ++ ret = pci_scan_root_bus_bridge(bridge); ++ if (ret) ++ goto error; ++ ++ bus = bridge->bus; ++ ++ pci_assign_unassigned_bus_resources(bus); ++ list_for_each_entry(child, &bus->children, node) ++ pcie_bus_configure_settings(child); ++ pci_bus_add_devices(bus); ++ ++ return 0; ++error: ++ pci_free_resource_list(&pcie->resources); ++ return ret; ++} +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-plat.c b/drivers/pci/host/mobiveil/pcie-mobiveil-plat.c +new file mode 100644 +index 000000000000..216c62f35568 +--- /dev/null ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-plat.c +@@ -0,0 +1,54 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * PCIe host controller driver for Mobiveil PCIe Host controller ++ * ++ * Copyright (c) 2018 Mobiveil Inc. ++ * Author: Subrahmanya Lingappa ++ * Refactor: Zhiqiang Hou ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "pcie-mobiveil.h" ++ ++static int mobiveil_pcie_probe(struct platform_device *pdev) ++{ ++ struct mobiveil_pcie *pcie; ++ struct device *dev = &pdev->dev; ++ ++ pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); ++ if (!pcie) ++ return -ENOMEM; ++ ++ pcie->pdev = pdev; ++ ++ return mobiveil_pcie_host_probe(pcie); ++} ++ ++static const struct of_device_id mobiveil_pcie_of_match[] = { ++ {.compatible = "mbvl,gpex40-pcie",}, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, mobiveil_pcie_of_match); ++ ++static struct platform_driver mobiveil_pcie_driver = { ++ .probe = mobiveil_pcie_probe, ++ .driver = { ++ .name = "mobiveil-pcie", ++ .of_match_table = mobiveil_pcie_of_match, ++ .suppress_bind_attrs = true, ++ }, ++}; ++ ++builtin_platform_driver(mobiveil_pcie_driver); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("Mobiveil PCIe host controller driver"); ++MODULE_AUTHOR("Subrahmanya Lingappa "); +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.c b/drivers/pci/host/mobiveil/pcie-mobiveil.c +new file mode 100644 +index 000000000000..ee678a60825d +--- /dev/null ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.c +@@ -0,0 +1,228 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * PCIe host controller driver for Mobiveil PCIe Host controller ++ * ++ * Copyright (c) 2018 Mobiveil Inc. ++ * Author: Subrahmanya Lingappa ++ * Refactor: Zhiqiang Hou ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "pcie-mobiveil.h" ++ ++/* ++ * mobiveil_pcie_sel_page - routine to access paged register ++ * ++ * Registers whose address greater than PAGED_ADDR_BNDRY (0xc00) are paged, ++ * for this scheme to work extracted higher 6 bits of the offset will be ++ * written to pg_sel field of PAB_CTRL register and rest of the lower 10 ++ * bits enabled with PAGED_ADDR_BNDRY are used as offset of the register. ++ */ ++static void mobiveil_pcie_sel_page(struct mobiveil_pcie *pcie, u8 pg_idx) ++{ ++ u32 val; ++ ++ val = readl(pcie->csr_axi_slave_base + PAB_CTRL); ++ val &= ~(PAGE_SEL_MASK << PAGE_SEL_SHIFT); ++ val |= (pg_idx & PAGE_SEL_MASK) << PAGE_SEL_SHIFT; ++ ++ writel(val, pcie->csr_axi_slave_base + PAB_CTRL); ++} ++ ++static void *mobiveil_pcie_comp_addr(struct mobiveil_pcie *pcie, u32 off) ++{ ++ if (off < PAGED_ADDR_BNDRY) { ++ /* For directly accessed registers, clear the pg_sel field */ ++ mobiveil_pcie_sel_page(pcie, 0); ++ return pcie->csr_axi_slave_base + off; ++ } ++ ++ mobiveil_pcie_sel_page(pcie, OFFSET_TO_PAGE_IDX(off)); ++ return pcie->csr_axi_slave_base + OFFSET_TO_PAGE_ADDR(off); ++} ++ ++static int mobiveil_pcie_read(void __iomem *addr, int size, u32 *val) ++{ ++ if ((uintptr_t)addr & (size - 1)) { ++ *val = 0; ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ } ++ ++ switch (size) { ++ case 4: ++ *val = readl(addr); ++ break; ++ case 2: ++ *val = readw(addr); ++ break; ++ case 1: ++ *val = readb(addr); ++ break; ++ default: ++ *val = 0; ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ } ++ ++ return PCIBIOS_SUCCESSFUL; ++} ++ ++static int mobiveil_pcie_write(void __iomem *addr, int size, u32 val) ++{ ++ if ((uintptr_t)addr & (size - 1)) ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ ++ switch (size) { ++ case 4: ++ writel(val, addr); ++ break; ++ case 2: ++ writew(val, addr); ++ break; ++ case 1: ++ writeb(val, addr); ++ break; ++ default: ++ return PCIBIOS_BAD_REGISTER_NUMBER; ++ } ++ ++ return PCIBIOS_SUCCESSFUL; ++} ++ ++u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size) ++{ ++ void *addr; ++ u32 val; ++ int ret; ++ ++ addr = mobiveil_pcie_comp_addr(pcie, off); ++ ++ ret = mobiveil_pcie_read(addr, size, &val); ++ if (ret) ++ dev_err(&pcie->pdev->dev, "read CSR address failed\n"); ++ ++ return val; ++} ++ ++void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size) ++{ ++ void *addr; ++ int ret; ++ ++ addr = mobiveil_pcie_comp_addr(pcie, off); ++ ++ ret = mobiveil_pcie_write(addr, size, val); ++ if (ret) ++ dev_err(&pcie->pdev->dev, "write CSR address failed\n"); ++} ++ ++bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie) ++{ ++ if (pcie->ops->link_up) ++ return pcie->ops->link_up(pcie); ++ ++ return (csr_readl(pcie, LTSSM_STATUS) & ++ LTSSM_STATUS_L0_MASK) == LTSSM_STATUS_L0; ++} ++ ++void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, ++ u64 pci_addr, u32 type, u64 size) ++{ ++ u32 value; ++ u64 size64 = ~(size - 1); ++ ++ if (win_num >= pcie->ppio_wins) { ++ dev_err(&pcie->pdev->dev, ++ "ERROR: max inbound windows reached !\n"); ++ return; ++ } ++ ++ value = csr_readl(pcie, PAB_PEX_AMAP_CTRL(win_num)); ++ value &= ~(AMAP_CTRL_TYPE_MASK << AMAP_CTRL_TYPE_SHIFT | ++ WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ value |= (type << AMAP_CTRL_TYPE_SHIFT) | (1 << AMAP_CTRL_EN_SHIFT) | ++ (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ csr_writel(pcie, value, PAB_PEX_AMAP_CTRL(win_num)); ++ ++ csr_writel(pcie, upper_32_bits(size64), ++ PAB_EXT_PEX_AMAP_SIZEN(win_num)); ++ ++ csr_writel(pcie, lower_32_bits(cpu_addr), ++ PAB_PEX_AMAP_AXI_WIN(win_num)); ++ csr_writel(pcie, upper_32_bits(cpu_addr), ++ PAB_EXT_PEX_AMAP_AXI_WIN(win_num)); ++ ++ csr_writel(pcie, lower_32_bits(pci_addr), ++ PAB_PEX_AMAP_PEX_WIN_L(win_num)); ++ csr_writel(pcie, upper_32_bits(pci_addr), ++ PAB_PEX_AMAP_PEX_WIN_H(win_num)); ++ ++ pcie->ib_wins_configured++; ++} ++ ++/* ++ * routine to program the outbound windows ++ */ ++void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, ++ u64 pci_addr, u32 type, u64 size) ++{ ++ ++ u32 value; ++ u64 size64 = ~(size - 1); ++ ++ if (win_num >= pcie->apio_wins) { ++ dev_err(&pcie->pdev->dev, ++ "ERROR: max outbound windows reached !\n"); ++ return; ++ } ++ ++ /* ++ * program Enable Bit to 1, Type Bit to (00) base 2, AXI Window Size Bit ++ * to 4 KB in PAB_AXI_AMAP_CTRL register ++ */ ++ value = csr_readl(pcie, PAB_AXI_AMAP_CTRL(win_num)); ++ value &= ~(WIN_TYPE_MASK << WIN_TYPE_SHIFT | ++ WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ value |= 1 << WIN_ENABLE_SHIFT | type << WIN_TYPE_SHIFT | ++ (lower_32_bits(size64) & WIN_SIZE_MASK << WIN_SIZE_SHIFT); ++ csr_writel(pcie, value, PAB_AXI_AMAP_CTRL(win_num)); ++ ++ csr_writel(pcie, upper_32_bits(size64), PAB_EXT_AXI_AMAP_SIZE(win_num)); ++ ++ /* ++ * program AXI window base with appropriate value in ++ * PAB_AXI_AMAP_AXI_WIN0 register ++ */ ++ csr_writel(pcie, lower_32_bits(cpu_addr) & (~AXI_WINDOW_ALIGN_MASK), ++ PAB_AXI_AMAP_AXI_WIN(win_num)); ++ csr_writel(pcie, upper_32_bits(cpu_addr), ++ PAB_EXT_AXI_AMAP_AXI_WIN(win_num)); ++ ++ csr_writel(pcie, lower_32_bits(pci_addr), ++ PAB_AXI_AMAP_PEX_WIN_L(win_num)); ++ csr_writel(pcie, upper_32_bits(pci_addr), ++ PAB_AXI_AMAP_PEX_WIN_H(win_num)); ++ ++ pcie->ob_wins_configured++; ++} ++ ++int mobiveil_bringup_link(struct mobiveil_pcie *pcie) ++{ ++ int retries; ++ ++ /* check if the link is up or not */ ++ for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) { ++ if (mobiveil_pcie_link_up(pcie)) ++ return 0; ++ ++ usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); ++ } ++ ++ dev_err(&pcie->pdev->dev, "link never came up\n"); ++ ++ return -ETIMEDOUT; ++} +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +new file mode 100644 +index 000000000000..eb4cb61291a8 +--- /dev/null ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -0,0 +1,187 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * PCIe host controller driver for Mobiveil PCIe Host controller ++ * ++ * Copyright (c) 2018 Mobiveil Inc. ++ * Author: Subrahmanya Lingappa ++ * Refactor: Zhiqiang Hou ++ */ ++ ++#ifndef _PCIE_MOBIVEIL_H ++#define _PCIE_MOBIVEIL_H ++ ++#include ++#include ++#include ++#include "../../pci.h" ++ ++/* register offsets and bit positions */ ++ ++/* ++ * translation tables are grouped into windows, each window registers are ++ * grouped into blocks of 4 or 16 registers each ++ */ ++#define PAB_REG_BLOCK_SIZE 16 ++#define PAB_EXT_REG_BLOCK_SIZE 4 ++ ++#define PAB_REG_ADDR(offset, win) \ ++ (offset + (win * PAB_REG_BLOCK_SIZE)) ++#define PAB_EXT_REG_ADDR(offset, win) \ ++ (offset + (win * PAB_EXT_REG_BLOCK_SIZE)) ++ ++#define LTSSM_STATUS 0x0404 ++#define LTSSM_STATUS_L0_MASK 0x3f ++#define LTSSM_STATUS_L0 0x2d ++ ++#define PAB_CTRL 0x0808 ++#define AMBA_PIO_ENABLE_SHIFT 0 ++#define PEX_PIO_ENABLE_SHIFT 1 ++#define PAGE_SEL_SHIFT 13 ++#define PAGE_SEL_MASK 0x3f ++#define PAGE_LO_MASK 0x3ff ++#define PAGE_SEL_OFFSET_SHIFT 10 ++ ++#define PAB_AXI_PIO_CTRL 0x0840 ++#define APIO_EN_MASK 0xf ++ ++#define PAB_PEX_PIO_CTRL 0x08c0 ++#define PIO_ENABLE_SHIFT 0 ++ ++#define PAB_INTP_AMBA_MISC_ENB 0x0b0c ++#define PAB_INTP_AMBA_MISC_STAT 0x0b1c ++#define PAB_INTP_INTX_MASK 0x01e0 ++#define PAB_INTP_MSI_MASK 0x8 ++ ++#define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) ++#define WIN_ENABLE_SHIFT 0 ++#define WIN_TYPE_SHIFT 1 ++#define WIN_TYPE_MASK 0x3 ++#define WIN_SIZE_SHIFT 10 ++#define WIN_SIZE_MASK 0x3fffff ++ ++#define PAB_EXT_AXI_AMAP_SIZE(win) PAB_EXT_REG_ADDR(0xbaf0, win) ++ ++#define PAB_EXT_AXI_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0x80a0, win) ++#define PAB_AXI_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x0ba4, win) ++#define AXI_WINDOW_ALIGN_MASK 3 ++ ++#define PAB_AXI_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x0ba8, win) ++#define PAB_BUS_SHIFT 24 ++#define PAB_DEVICE_SHIFT 19 ++#define PAB_FUNCTION_SHIFT 16 ++ ++#define PAB_AXI_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x0bac, win) ++#define PAB_INTP_AXI_PIO_CLASS 0x474 ++ ++#define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) ++#define AMAP_CTRL_EN_SHIFT 0 ++#define AMAP_CTRL_TYPE_SHIFT 1 ++#define AMAP_CTRL_TYPE_MASK 3 ++ ++#define PAB_EXT_PEX_AMAP_SIZEN(win) PAB_EXT_REG_ADDR(0xbef0, win) ++#define PAB_EXT_PEX_AMAP_AXI_WIN(win) PAB_EXT_REG_ADDR(0xb4a0, win) ++#define PAB_PEX_AMAP_AXI_WIN(win) PAB_REG_ADDR(0x4ba4, win) ++#define PAB_PEX_AMAP_PEX_WIN_L(win) PAB_REG_ADDR(0x4ba8, win) ++#define PAB_PEX_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x4bac, win) ++ ++/* starting offset of INTX bits in status register */ ++#define PAB_INTX_START 5 ++ ++/* supported number of MSI interrupts */ ++#define PCI_NUM_MSI 16 ++ ++/* MSI registers */ ++#define MSI_BASE_LO_OFFSET 0x04 ++#define MSI_BASE_HI_OFFSET 0x08 ++#define MSI_SIZE_OFFSET 0x0c ++#define MSI_ENABLE_OFFSET 0x14 ++#define MSI_STATUS_OFFSET 0x18 ++#define MSI_DATA_OFFSET 0x20 ++#define MSI_ADDR_L_OFFSET 0x24 ++#define MSI_ADDR_H_OFFSET 0x28 ++ ++/* outbound and inbound window definitions */ ++#define WIN_NUM_0 0 ++#define WIN_NUM_1 1 ++#define CFG_WINDOW_TYPE 0 ++#define IO_WINDOW_TYPE 1 ++#define MEM_WINDOW_TYPE 2 ++#define IB_WIN_SIZE ((u64)256 * 1024 * 1024 * 1024) ++#define MAX_PIO_WINDOWS 8 ++ ++/* Parameters for the waiting for link up routine */ ++#define LINK_WAIT_MAX_RETRIES 10 ++#define LINK_WAIT_MIN 90000 ++#define LINK_WAIT_MAX 100000 ++ ++#define PAGED_ADDR_BNDRY 0xc00 ++#define OFFSET_TO_PAGE_ADDR(off) \ ++ ((off & PAGE_LO_MASK) | PAGED_ADDR_BNDRY) ++#define OFFSET_TO_PAGE_IDX(off) \ ++ ((off >> PAGE_SEL_OFFSET_SHIFT) & PAGE_SEL_MASK) ++ ++struct mobiveil_pcie; ++ ++struct mobiveil_msi { /* MSI information */ ++ struct mutex lock; /* protect bitmap variable */ ++ struct irq_domain *msi_domain; ++ struct irq_domain *dev_domain; ++ phys_addr_t msi_pages_phys; ++ int num_of_vectors; ++ DECLARE_BITMAP(msi_irq_in_use, PCI_NUM_MSI); ++}; ++ ++struct mobiveil_rp_ops { ++ int (*interrupt_init)(struct mobiveil_pcie *pcie); ++}; ++ ++struct root_port { ++ u8 root_bus_nr; ++ void __iomem *config_axi_slave_base; /* endpoint config base */ ++ struct resource *ob_io_res; ++ struct mobiveil_rp_ops *ops; ++ int irq; ++ raw_spinlock_t intx_mask_lock; ++ struct irq_domain *intx_domain; ++ struct mobiveil_msi msi; ++}; ++ ++struct mobiveil_pab_ops { ++ int (*link_up)(struct mobiveil_pcie *pcie); ++}; ++ ++struct mobiveil_pcie { ++ struct platform_device *pdev; ++ struct list_head resources; ++ void __iomem *csr_axi_slave_base; /* PAB registers base */ ++ phys_addr_t pcie_reg_base; /* Physical PCIe Controller Base */ ++ void __iomem *apb_csr_base; /* MSI register base */ ++ u32 apio_wins; ++ u32 ppio_wins; ++ u32 ob_wins_configured; /* configured outbound windows */ ++ u32 ib_wins_configured; /* configured inbound windows */ ++ const struct mobiveil_pab_ops *ops; ++ struct root_port rp; ++}; ++ ++int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie); ++bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie); ++int mobiveil_bringup_link(struct mobiveil_pcie *pcie); ++void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, ++ u64 pci_addr, u32 type, u64 size); ++void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, ++ u64 pci_addr, u32 type, u64 size); ++u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size); ++void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size); ++ ++static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) ++{ ++ return csr_read(pcie, off, 0x4); ++} ++ ++static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) ++{ ++ csr_write(pcie, val, off, 0x4); ++} ++ ++#endif /* _PCIE_MOBIVEIL_H */ +-- +2.11.0 + diff --git a/patches.suse/0018-PCI-mobiveil-fix-the-checking-of-valid-device.patch b/patches.suse/0018-PCI-mobiveil-fix-the-checking-of-valid-device.patch new file mode 100644 index 0000000..7fa5927 --- /dev/null +++ b/patches.suse/0018-PCI-mobiveil-fix-the-checking-of-valid-device.patch @@ -0,0 +1,50 @@ +From 88a279e3fa2f61dc8f9f6ba56db4bc452d5cc3b0 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:17 +0000 +Subject: [PATCH 18/26] PCI: mobiveil: fix the checking of valid device + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Avoid to issue CFG transactions to link partner when the PCIe +link is not up. And allow CFG transactions to all functions of +Endpoint implemented multiple functions. + +Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host +Bridge IP driver") +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian + +[Yousaf]: Fix according to comments from Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pcie-mobiveil-host.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +index dc5324d94466..7cc3fb56dbb9 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +@@ -29,6 +29,10 @@ static bool mobiveil_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) + { + struct mobiveil_pcie *pcie = bus->sysdata; + ++ /* If there is no link, then there is no device */ ++ if (bus->number > pcie->rp.root_bus_nr && !mobiveil_pcie_link_up(pcie)) ++ return false; ++ + /* Only one device down on each root port */ + if ((bus->number == pcie->rp.root_bus_nr) && (devfn > 0)) + return false; +@@ -37,7 +41,7 @@ static bool mobiveil_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) + * Do not read more than one device on the bus directly + * attached to RC + */ +- if ((bus->primary == pcie->rp.root_bus_nr) && (devfn > 0)) ++ if ((bus->number == pcie->rp.root_bus_nr) && (PCI_SLOT(devfn) > 0)) + return false; + + return true; +-- +2.11.0 + diff --git a/patches.suse/0019-PCI-mobiveil-continue-to-initialize-the-host-upon-no.patch b/patches.suse/0019-PCI-mobiveil-continue-to-initialize-the-host-upon-no.patch new file mode 100644 index 0000000..bd89ad1 --- /dev/null +++ b/patches.suse/0019-PCI-mobiveil-continue-to-initialize-the-host-upon-no.patch @@ -0,0 +1,50 @@ +From b78d7f44e408246085391ec76403848f009fa07c Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:23 +0000 +Subject: [PATCH 19/26] PCI: mobiveil: continue to initialize the host upon no + PCIe link + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Sometimes there is not a PCIe Endpoint in the PCIe slot, so do +not exit when the PCIe link is not up. And degrade the print +level of link up info. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pcie-mobiveil-host.c | 1 - + drivers/pci/host/mobiveil/pcie-mobiveil.c | 2 +- + 2 files changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +index 7cc3fb56dbb9..beb823b35cee 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +@@ -596,7 +596,6 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) + ret = mobiveil_bringup_link(pcie); + if (ret) { + dev_info(dev, "link bring-up failed\n"); +- goto error; + } + + /* setup the kernel resources for the newly added PCIe root bus */ +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.c b/drivers/pci/host/mobiveil/pcie-mobiveil.c +index ee678a60825d..370658d6546d 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.c +@@ -222,7 +222,7 @@ int mobiveil_bringup_link(struct mobiveil_pcie *pcie) + usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX); + } + +- dev_err(&pcie->pdev->dev, "link never came up\n"); ++ dev_info(&pcie->pdev->dev, "link never came up\n"); + + return -ETIMEDOUT; + } +-- +2.11.0 + diff --git a/patches.suse/0020-PCI-mobiveil-disabled-IB-and-OB-windows-set-by-bootl.patch b/patches.suse/0020-PCI-mobiveil-disabled-IB-and-OB-windows-set-by-bootl.patch new file mode 100644 index 0000000..dc8b3a8 --- /dev/null +++ b/patches.suse/0020-PCI-mobiveil-disabled-IB-and-OB-windows-set-by-bootl.patch @@ -0,0 +1,82 @@ +From 051dd766c01e9746170e07c243907242692680b5 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:30 +0000 +Subject: [PATCH 20/26] PCI: mobiveil: disabled IB and OB windows set by + bootloader + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Disabled all inbound and outbound windows before set up the windows +in kernel, in case transactions match the window set by bootloader. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pcie-mobiveil-host.c | 7 +++++++ + drivers/pci/host/mobiveil/pcie-mobiveil.c | 18 ++++++++++++++++++ + drivers/pci/host/mobiveil/pcie-mobiveil.h | 2 ++ + 3 files changed, 27 insertions(+) + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +index beb823b35cee..a42ff86e800c 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +@@ -221,6 +221,13 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + { + u32 value, pab_ctrl, type; + struct resource_entry *win; ++ int i; ++ ++ /* Disable all inbound/outbound windows */ ++ for (i = 0; i < pcie->apio_wins; i++) ++ mobiveil_pcie_disable_ob_win(pcie, i); ++ for (i = 0; i < pcie->ppio_wins; i++) ++ mobiveil_pcie_disable_ib_win(pcie, i); + + /* setup bus numbers */ + value = csr_readl(pcie, PCI_PRIMARY_BUS); +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.c b/drivers/pci/host/mobiveil/pcie-mobiveil.c +index 370658d6546d..49d471b75925 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.c +@@ -226,3 +226,21 @@ int mobiveil_bringup_link(struct mobiveil_pcie *pcie) + + return -ETIMEDOUT; + } ++ ++void mobiveil_pcie_disable_ib_win(struct mobiveil_pcie *pci, int win_num) ++{ ++ u32 val; ++ ++ val = csr_readl(pci, PAB_PEX_AMAP_CTRL(win_num)); ++ val &= ~(1 << AMAP_CTRL_EN_SHIFT); ++ csr_writel(pci, val, PAB_PEX_AMAP_CTRL(win_num)); ++} ++ ++void mobiveil_pcie_disable_ob_win(struct mobiveil_pcie *pci, int win_num) ++{ ++ u32 val; ++ ++ val = csr_readl(pci, PAB_AXI_AMAP_CTRL(win_num)); ++ val &= ~(1 << WIN_ENABLE_SHIFT); ++ csr_writel(pci, val, PAB_AXI_AMAP_CTRL(win_num)); ++} +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +index eb4cb61291a8..81685840b378 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.h ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -171,6 +171,8 @@ void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, + u64 pci_addr, u32 type, u64 size); + void program_ib_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, + u64 pci_addr, u32 type, u64 size); ++void mobiveil_pcie_disable_ob_win(struct mobiveil_pcie *pci, int win_num); ++void mobiveil_pcie_disable_ib_win(struct mobiveil_pcie *pci, int win_num); + u32 csr_read(struct mobiveil_pcie *pcie, u32 off, size_t size); + void csr_write(struct mobiveil_pcie *pcie, u32 val, u32 off, size_t size); + +-- +2.11.0 + diff --git a/patches.suse/0021-PCI-mobiveil-add-Byte-and-Half-Word-width-register-a.patch b/patches.suse/0021-PCI-mobiveil-add-Byte-and-Half-Word-width-register-a.patch new file mode 100644 index 0000000..ff0200c --- /dev/null +++ b/patches.suse/0021-PCI-mobiveil-add-Byte-and-Half-Word-width-register-a.patch @@ -0,0 +1,58 @@ +From 2d79eed9dabe1d9f1ceaf736d70ee9725c9794a2 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:36 +0000 +Subject: [PATCH 21/26] PCI: mobiveil: add Byte and Half-Word width register + accessors + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +As there are some Byte and Half-Work width registers in PCIe +configuration space, add Byte and Half-Word width register +accessors. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pcie-mobiveil.h | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +index 81685840b378..933c2f34bc52 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.h ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -181,9 +181,29 @@ static inline u32 csr_readl(struct mobiveil_pcie *pcie, u32 off) + return csr_read(pcie, off, 0x4); + } + ++static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off) ++{ ++ return csr_read(pcie, off, 0x2); ++} ++ ++static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off) ++{ ++ return csr_read(pcie, off, 0x1); ++} ++ + static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) + { + csr_write(pcie, val, off, 0x4); + } + ++static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off) ++{ ++ csr_write(pcie, val, off, 0x2); ++} ++ ++static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off) ++{ ++ csr_write(pcie, val, off, 0x1); ++} ++ + #endif /* _PCIE_MOBIVEIL_H */ +-- +2.11.0 + diff --git a/patches.suse/0022-PCI-mobiveil-make-mobiveil_host_init-can-be-used-to-.patch b/patches.suse/0022-PCI-mobiveil-make-mobiveil_host_init-can-be-used-to-.patch new file mode 100644 index 0000000..334db22 --- /dev/null +++ b/patches.suse/0022-PCI-mobiveil-make-mobiveil_host_init-can-be-used-to-.patch @@ -0,0 +1,159 @@ +From 12dadc46951d067f258db07bc15fc25bb570d7ea Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:42 +0000 +Subject: [PATCH 22/26] PCI: mobiveil: make mobiveil_host_init can be used to + re-init host + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Make the mobiveil_host_init function can be used to re-init +host controller's PAB and GPEX CSR register block, as NXP +integrated Mobiveil IP has to reset and then re-init the PAB +and GPEX CSR registers upon Hot-reset. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Subrahmanya Lingappa +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pcie-mobiveil-host.c | 41 +++++++++++++------------- + drivers/pci/host/mobiveil/pcie-mobiveil.h | 3 +- + 2 files changed, 23 insertions(+), 21 deletions(-) + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +index a42ff86e800c..bc3c49e695fa 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +@@ -217,7 +217,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie) + writel_relaxed(1, pcie->apb_csr_base + MSI_ENABLE_OFFSET); + } + +-static int mobiveil_host_init(struct mobiveil_pcie *pcie) ++int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit) + { + u32 value, pab_ctrl, type; + struct resource_entry *win; +@@ -229,11 +229,16 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + for (i = 0; i < pcie->ppio_wins; i++) + mobiveil_pcie_disable_ib_win(pcie, i); + +- /* setup bus numbers */ +- value = csr_readl(pcie, PCI_PRIMARY_BUS); +- value &= 0xff000000; +- value |= 0x00ff0100; +- csr_writel(pcie, value, PCI_PRIMARY_BUS); ++ pcie->ib_wins_configured = 0; ++ pcie->ob_wins_configured = 0; ++ ++ if (!reinit) { ++ /* setup bus numbers */ ++ value = csr_readl(pcie, PCI_PRIMARY_BUS); ++ value &= 0xff000000; ++ value |= 0x00ff0100; ++ csr_writel(pcie, value, PCI_PRIMARY_BUS); ++ } + + /* + * program Bus Master Enable Bit in Command Register in PAB Config +@@ -279,7 +284,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie) + program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE); + + /* Get the I/O and memory ranges from DT */ +- resource_list_for_each_entry(win, &pcie->resources) { ++ resource_list_for_each_entry(win, pcie->resources) { + if (resource_type(win->res) == IORESOURCE_MEM) { + type = MEM_WINDOW_TYPE; + } else if (resource_type(win->res) == IORESOURCE_IO) { +@@ -550,8 +555,6 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) + resource_size_t iobase; + int ret; + +- INIT_LIST_HEAD(&pcie->resources); +- + ret = mobiveil_pcie_parse_dt(pcie); + if (ret) { + dev_err(dev, "Parsing DT failed, ret: %x\n", ret); +@@ -565,34 +568,35 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) + + /* parse the host bridge base addresses from the device tree file */ + ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, +- &pcie->resources, &iobase); ++ &bridge->windows, &iobase); + if (ret) { + dev_err(dev, "Getting bridge resources failed\n"); + return ret; + } + ++ pcie->resources = &bridge->windows; ++ + /* + * configure all inbound and outbound windows and prepare the RC for + * config access + */ +- ret = mobiveil_host_init(pcie); ++ ret = mobiveil_host_init(pcie, false); + if (ret) { + dev_err(dev, "Failed to initialize host\n"); +- goto error; ++ return ret; + } + + ret = mobiveil_pcie_interrupt_init(pcie); + if (ret) { + dev_err(dev, "Interrupt init failed\n"); +- goto error; ++ return ret; + } + +- ret = devm_request_pci_bus_resources(dev, &pcie->resources); ++ ret = devm_request_pci_bus_resources(dev, pcie->resources); + if (ret) +- goto error; ++ return ret; + + /* Initialize bridge */ +- list_splice_init(&pcie->resources, &bridge->windows); + bridge->dev.parent = dev; + bridge->sysdata = pcie; + bridge->busnr = pcie->rp.root_bus_nr; +@@ -608,7 +612,7 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) + /* setup the kernel resources for the newly added PCIe root bus */ + ret = pci_scan_root_bus_bridge(bridge); + if (ret) +- goto error; ++ return ret; + + bus = bridge->bus; + +@@ -618,7 +622,4 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) + pci_bus_add_devices(bus); + + return 0; +-error: +- pci_free_resource_list(&pcie->resources); +- return ret; + } +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +index 933c2f34bc52..0f5303962e88 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.h ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -152,7 +152,7 @@ struct mobiveil_pab_ops { + + struct mobiveil_pcie { + struct platform_device *pdev; +- struct list_head resources; ++ struct list_head *resources; + void __iomem *csr_axi_slave_base; /* PAB registers base */ + phys_addr_t pcie_reg_base; /* Physical PCIe Controller Base */ + void __iomem *apb_csr_base; /* MSI register base */ +@@ -165,6 +165,7 @@ struct mobiveil_pcie { + }; + + int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie); ++int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit); + bool mobiveil_pcie_link_up(struct mobiveil_pcie *pcie); + int mobiveil_bringup_link(struct mobiveil_pcie *pcie); + void program_ob_windows(struct mobiveil_pcie *pcie, int win_num, u64 cpu_addr, +-- +2.11.0 + diff --git a/patches.suse/0023-dt-bindings-pci-Add-NXP-Layerscape-SoCs-PCIe-Gen4-co.patch b/patches.suse/0023-dt-bindings-pci-Add-NXP-Layerscape-SoCs-PCIe-Gen4-co.patch new file mode 100644 index 0000000..5cc9d0e --- /dev/null +++ b/patches.suse/0023-dt-bindings-pci-Add-NXP-Layerscape-SoCs-PCIe-Gen4-co.patch @@ -0,0 +1,100 @@ +From 43d94668ca82c10d722e4a55b2ba2ecc8649285f Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:49 +0000 +Subject: [PATCH 23/26] dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 + controller + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +Add PCIe Gen4 controller DT bindings of NXP Layerscape SoCs. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Rob Herring +Signed-off-by: Mian Yousaf Kaukab +--- + .../bindings/pci/layerscape-pci-gen4.txt | 52 ++++++++++++++++++++++ + MAINTAINERS | 8 ++++ + 2 files changed, 60 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt + +diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt b/Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt +new file mode 100644 +index 000000000000..b40fb5d15d3d +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt +@@ -0,0 +1,52 @@ ++NXP Layerscape PCIe Gen4 controller ++ ++This PCIe controller is based on the Mobiveil PCIe IP and thus inherits all ++the common properties defined in mobiveil-pcie.txt. ++ ++Required properties: ++- compatible: should contain the platform identifier such as: ++ "fsl,lx2160a-pcie" ++- reg: base addresses and lengths of the PCIe controller register blocks. ++ "csr_axi_slave": Bridge config registers ++ "config_axi_slave": PCIe controller registers ++- interrupts: A list of interrupt outputs of the controller. Must contain an ++ entry for each entry in the interrupt-names property. ++- interrupt-names: It could include the following entries: ++ "intr": The interrupt that is asserted for controller interrupts ++ "aer": Asserted for aer interrupt when chip support the aer interrupt with ++ none MSI/MSI-X/INTx mode,but there is interrupt line for aer. ++ "pme": Asserted for pme interrupt when chip support the pme interrupt with ++ none MSI/MSI-X/INTx mode,but there is interrupt line for pme. ++- dma-coherent: Indicates that the hardware IP block can ensure the coherency ++ of the data transferred from/to the IP block. This can avoid the software ++ cache flush/invalid actions, and improve the performance significantly. ++- msi-parent : See the generic MSI binding described in ++ Documentation/devicetree/bindings/interrupt-controller/msi.txt. ++ ++Example: ++ ++ pcie@3400000 { ++ compatible = "fsl,lx2160a-pcie"; ++ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ ++ 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ ++ reg-names = "csr_axi_slave", "config_axi_slave"; ++ interrupts = , /* AER interrupt */ ++ , /* PME interrupt */ ++ ; /* controller interrupt */ ++ interrupt-names = "aer", "pme", "intr"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ apio-wins = <8>; ++ ppio-wins = <8>; ++ dma-coherent; ++ bus-range = <0x0 0xff>; ++ msi-parent = <&its>; ++ ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 7>; ++ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, ++ <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; ++ }; +diff --git a/MAINTAINERS b/MAINTAINERS +index ed81cf1c6e7f..3cae0cdb3a51 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -9981,6 +9981,14 @@ L: linux-arm-kernel@lists.infradead.org + S: Maintained + F: drivers/pci/dwc/*layerscape* + ++PCI DRIVER FOR NXP LAYERSCAPE GEN4 CONTROLLER ++M: Hou Zhiqiang ++L: linux-pci@vger.kernel.org ++L: linux-arm-kernel@lists.viinfradead.org ++S: Maintained ++F: Documentation/devicetree/bindings/pci/layerscape-pci-gen4.txt ++F: drivers/pci/host/mobibeil/pci-layerscape-gen4.c ++ + PCI DRIVER FOR IMX6 + M: Richard Zhu + M: Lucas Stach +-- +2.11.0 + diff --git a/patches.suse/0024-PCI-mobiveil-add-PCIe-Gen4-RC-driver-for-NXP-Layersc.patch b/patches.suse/0024-PCI-mobiveil-add-PCIe-Gen4-RC-driver-for-NXP-Layersc.patch new file mode 100644 index 0000000..c13ae07 --- /dev/null +++ b/patches.suse/0024-PCI-mobiveil-add-PCIe-Gen4-RC-driver-for-NXP-Layersc.patch @@ -0,0 +1,351 @@ +From 7bded81e007e73cf519da680ae668540ca7a6528 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:10:55 +0000 +Subject: [PATCH 24/26] PCI: mobiveil: add PCIe Gen4 RC driver for NXP + Layerscape SoCs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +This PCIe controller is based on the Mobiveil GPEX IP, which is +compatible with the PCI Express™ Base Specification, Revision 4.0. + +Signed-off-by: Hou Zhiqiang +Reviewed-by: Minghuan Lian +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/Kconfig | 10 + + drivers/pci/host/mobiveil/Makefile | 1 + + drivers/pci/host/mobiveil/pci-layerscape-gen4.c | 254 ++++++++++++++++++++++++ + drivers/pci/host/mobiveil/pcie-mobiveil.h | 16 +- + 4 files changed, 279 insertions(+), 2 deletions(-) + create mode 100644 drivers/pci/host/mobiveil/pci-layerscape-gen4.c + +diff --git a/drivers/pci/host/mobiveil/Kconfig b/drivers/pci/host/mobiveil/Kconfig +index 64343c07bfed..3ddb7d6163a9 100644 +--- a/drivers/pci/host/mobiveil/Kconfig ++++ b/drivers/pci/host/mobiveil/Kconfig +@@ -21,4 +21,14 @@ config PCIE_MOBIVEIL_PLAT + Soft IP. It has up to 8 outbound and inbound windows + for address translation and it is a PCIe Gen4 IP. + ++config PCI_LAYERSCAPE_GEN4 ++ bool "Freescale Layerscpe PCIe Gen4 controller" ++ depends on PCI ++ depends on OF && (ARM64 || ARCH_LAYERSCAPE) ++ depends on PCI_MSI_IRQ_DOMAIN ++ select PCIE_MOBIVEIL_HOST ++ help ++ Say Y here if you want PCIe Gen4 controller support on ++ Layerscape SoCs. The PCIe controller can work in RC or ++ EP mode according to RCW[HOST_AGT_PEX] setting. + endmenu +diff --git a/drivers/pci/host/mobiveil/Makefile b/drivers/pci/host/mobiveil/Makefile +index 9fb6d1c6504d..ff66774ccac4 100644 +--- a/drivers/pci/host/mobiveil/Makefile ++++ b/drivers/pci/host/mobiveil/Makefile +@@ -2,3 +2,4 @@ + obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o + obj-$(CONFIG_PCIE_MOBIVEIL_HOST) += pcie-mobiveil-host.o + obj-$(CONFIG_PCIE_MOBIVEIL_PLAT) += pcie-mobiveil-plat.o ++obj-$(CONFIG_PCI_LAYERSCAPE_GEN4) += pci-layerscape-gen4.o +diff --git a/drivers/pci/host/mobiveil/pci-layerscape-gen4.c b/drivers/pci/host/mobiveil/pci-layerscape-gen4.c +new file mode 100644 +index 000000000000..174cbcac4059 +--- /dev/null ++++ b/drivers/pci/host/mobiveil/pci-layerscape-gen4.c +@@ -0,0 +1,254 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * PCIe host controller driver for NXP Layerscape SoCs ++ * ++ * Copyright 2018 NXP ++ * ++ * Author: Zhiqiang Hou ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "pcie-mobiveil.h" ++ ++/* LUT and PF control registers */ ++#define PCIE_LUT_OFF (0x80000) ++#define PCIE_PF_OFF (0xc0000) ++#define PCIE_PF_INT_STAT (0x18) ++#define PF_INT_STAT_PABRST (31) ++ ++#define PCIE_PF_DBG (0x7fc) ++#define PF_DBG_LTSSM_MASK (0x3f) ++#define PF_DBG_WE (31) ++#define PF_DBG_PABR (27) ++ ++#define LS_PCIE_G4_LTSSM_L0 0x2d /* L0 state */ ++ ++#define to_ls_pcie_g4(x) platform_get_drvdata((x)->pdev) ++ ++struct ls_pcie_g4 { ++ struct mobiveil_pcie *pci; ++ struct delayed_work dwork; ++ int irq; ++}; ++ ++static inline u32 ls_pcie_g4_lut_readl(struct ls_pcie_g4 *pcie, u32 off) ++{ ++ return ioread32(pcie->pci->csr_axi_slave_base + PCIE_LUT_OFF + off); ++} ++ ++static inline void ls_pcie_g4_lut_writel(struct ls_pcie_g4 *pcie, ++ u32 off, u32 val) ++{ ++ iowrite32(val, pcie->pci->csr_axi_slave_base + PCIE_LUT_OFF + off); ++} ++ ++static inline u32 ls_pcie_g4_pf_readl(struct ls_pcie_g4 *pcie, u32 off) ++{ ++ return ioread32(pcie->pci->csr_axi_slave_base + PCIE_PF_OFF + off); ++} ++ ++static inline void ls_pcie_g4_pf_writel(struct ls_pcie_g4 *pcie, ++ u32 off, u32 val) ++{ ++ iowrite32(val, pcie->pci->csr_axi_slave_base + PCIE_PF_OFF + off); ++} ++ ++static bool ls_pcie_g4_is_bridge(struct ls_pcie_g4 *pcie) ++{ ++ struct mobiveil_pcie *mv_pci = pcie->pci; ++ u32 header_type; ++ ++ header_type = csr_readb(mv_pci, PCI_HEADER_TYPE); ++ header_type &= 0x7f; ++ ++ return header_type == PCI_HEADER_TYPE_BRIDGE; ++} ++ ++static int ls_pcie_g4_link_up(struct mobiveil_pcie *pci) ++{ ++ struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci); ++ u32 state; ++ ++ state = ls_pcie_g4_pf_readl(pcie, PCIE_PF_DBG); ++ state = state & PF_DBG_LTSSM_MASK; ++ ++ if (state == LS_PCIE_G4_LTSSM_L0) ++ return 1; ++ ++ return 0; ++} ++ ++static void ls_pcie_g4_reinit_hw(struct ls_pcie_g4 *pcie) ++{ ++ struct mobiveil_pcie *mv_pci = pcie->pci; ++ u32 val, act_stat; ++ int to = 100; ++ ++ /* Poll for pab_csb_reset to set and PAB activity to clear */ ++ do { ++ usleep_range(10, 15); ++ val = ls_pcie_g4_pf_readl(pcie, PCIE_PF_INT_STAT); ++ act_stat = csr_readl(mv_pci, PAB_ACTIVITY_STAT); ++ } while (((val & 1 << PF_INT_STAT_PABRST) == 0 || act_stat) && to--); ++ if (to < 0) { ++ dev_err(&mv_pci->pdev->dev, "poll PABRST&PABACT timeout\n"); ++ return; ++ } ++ ++ /* clear PEX_RESET bit in PEX_PF0_DBG register */ ++ val = ls_pcie_g4_pf_readl(pcie, PCIE_PF_DBG); ++ val |= 1 << PF_DBG_WE; ++ ls_pcie_g4_pf_writel(pcie, PCIE_PF_DBG, val); ++ ++ val = ls_pcie_g4_pf_readl(pcie, PCIE_PF_DBG); ++ val |= 1 << PF_DBG_PABR; ++ ls_pcie_g4_pf_writel(pcie, PCIE_PF_DBG, val); ++ ++ val = ls_pcie_g4_pf_readl(pcie, PCIE_PF_DBG); ++ val &= ~(1 << PF_DBG_WE); ++ ls_pcie_g4_pf_writel(pcie, PCIE_PF_DBG, val); ++ ++ mobiveil_host_init(mv_pci, true); ++ ++ to = 100; ++ while (!ls_pcie_g4_link_up(mv_pci) && to--) ++ usleep_range(200, 250); ++ if (to < 0) ++ dev_err(&mv_pci->pdev->dev, "PCIe link trainning timeout\n"); ++} ++ ++static irqreturn_t ls_pcie_g4_handler(int irq, void *dev_id) ++{ ++ struct ls_pcie_g4 *pcie = (struct ls_pcie_g4 *)dev_id; ++ struct mobiveil_pcie *mv_pci = pcie->pci; ++ u32 val; ++ ++ val = csr_readl(mv_pci, PAB_INTP_AMBA_MISC_STAT); ++ if (!val) ++ return IRQ_NONE; ++ ++ if (val & PAB_INTP_RESET) ++ schedule_delayed_work(&pcie->dwork, msecs_to_jiffies(1)); ++ ++ csr_writel(mv_pci, val, PAB_INTP_AMBA_MISC_STAT); ++ ++ return IRQ_HANDLED; ++} ++ ++static int ls_pcie_g4_interrupt_init(struct mobiveil_pcie *mv_pci) ++{ ++ struct ls_pcie_g4 *pcie = to_ls_pcie_g4(mv_pci); ++ u32 val; ++ int ret; ++ ++ pcie->irq = platform_get_irq_byname(mv_pci->pdev, "intr"); ++ if (pcie->irq < 0) { ++ dev_err(&mv_pci->pdev->dev, "Can't get 'intr' irq.\n"); ++ return pcie->irq; ++ } ++ ret = devm_request_irq(&mv_pci->pdev->dev, pcie->irq, ++ ls_pcie_g4_handler, IRQF_SHARED, ++ mv_pci->pdev->name, pcie); ++ if (ret) { ++ dev_err(&mv_pci->pdev->dev, "Can't register PCIe IRQ.\n"); ++ return ret; ++ } ++ ++ /* Enable interrupts */ ++ val = PAB_INTP_INTX_MASK | PAB_INTP_MSI | PAB_INTP_RESET | ++ PAB_INTP_PCIE_UE | PAB_INTP_IE_PMREDI | PAB_INTP_IE_EC; ++ csr_writel(mv_pci, val, PAB_INTP_AMBA_MISC_ENB); ++ ++ return 0; ++} ++ ++static void ls_pcie_g4_reset(struct work_struct *work) ++{ ++ struct delayed_work *dwork = container_of(work, struct delayed_work, ++ work); ++ struct ls_pcie_g4 *pcie = container_of(dwork, struct ls_pcie_g4, dwork); ++ struct mobiveil_pcie *mv_pci = pcie->pci; ++ u16 ctrl; ++ ++ ctrl = csr_readw(mv_pci, PCI_BRIDGE_CONTROL); ++ ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; ++ csr_writew(mv_pci, ctrl, PCI_BRIDGE_CONTROL); ++ ls_pcie_g4_reinit_hw(pcie); ++} ++ ++static struct mobiveil_rp_ops ls_pcie_g4_rp_ops = { ++ .interrupt_init = ls_pcie_g4_interrupt_init, ++}; ++ ++static const struct mobiveil_pab_ops ls_pcie_g4_pab_ops = { ++ .link_up = ls_pcie_g4_link_up, ++}; ++ ++static int __init ls_pcie_g4_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct mobiveil_pcie *mv_pci; ++ struct ls_pcie_g4 *pcie; ++ struct device_node *np = dev->of_node; ++ int ret; ++ ++ if (!of_parse_phandle(np, "msi-parent", 0)) { ++ dev_err(dev, "failed to find msi-parent\n"); ++ return -EINVAL; ++ } ++ ++ pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); ++ if (!pcie) ++ return -ENOMEM; ++ ++ mv_pci = devm_kzalloc(dev, sizeof(*mv_pci), GFP_KERNEL); ++ if (!mv_pci) ++ return -ENOMEM; ++ ++ mv_pci->pdev = pdev; ++ mv_pci->ops = &ls_pcie_g4_pab_ops; ++ mv_pci->rp.ops = &ls_pcie_g4_rp_ops; ++ pcie->pci = mv_pci; ++ ++ platform_set_drvdata(pdev, pcie); ++ ++ INIT_DELAYED_WORK(&pcie->dwork, ls_pcie_g4_reset); ++ ++ ret = mobiveil_pcie_host_probe(mv_pci); ++ if (ret) { ++ dev_err(dev, "fail to probe!\n"); ++ return ret; ++ } ++ ++ if (!ls_pcie_g4_is_bridge(pcie)) ++ return -ENODEV; ++ ++ return 0; ++} ++ ++static const struct of_device_id ls_pcie_g4_of_match[] = { ++ { .compatible = "fsl,lx2160a-pcie", }, ++ { }, ++}; ++ ++static struct platform_driver ls_pcie_g4_driver = { ++ .driver = { ++ .name = "layerscape-pcie-gen4", ++ .of_match_table = ls_pcie_g4_of_match, ++ .suppress_bind_attrs = true, ++ }, ++}; ++ ++builtin_platform_driver_probe(ls_pcie_g4_driver, ls_pcie_g4_probe); +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +index 0f5303962e88..0ccd6cee5f8f 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.h ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -41,6 +41,8 @@ + #define PAGE_LO_MASK 0x3ff + #define PAGE_SEL_OFFSET_SHIFT 10 + ++#define PAB_ACTIVITY_STAT 0x81c ++ + #define PAB_AXI_PIO_CTRL 0x0840 + #define APIO_EN_MASK 0xf + +@@ -49,8 +51,18 @@ + + #define PAB_INTP_AMBA_MISC_ENB 0x0b0c + #define PAB_INTP_AMBA_MISC_STAT 0x0b1c +-#define PAB_INTP_INTX_MASK 0x01e0 +-#define PAB_INTP_MSI_MASK 0x8 ++#define PAB_INTP_RESET (0x1 << 1) ++#define PAB_INTP_MSI (0x1 << 3) ++#define PAB_INTP_INTA (0x1 << 5) ++#define PAB_INTP_INTB (0x1 << 6) ++#define PAB_INTP_INTC (0x1 << 7) ++#define PAB_INTP_INTD (0x1 << 8) ++#define PAB_INTP_PCIE_UE (0x1 << 9) ++#define PAB_INTP_IE_PMREDI (0x1 << 29) ++#define PAB_INTP_IE_EC (0x1 << 30) ++#define PAB_INTP_MSI_MASK PAB_INTP_MSI ++#define PAB_INTP_INTX_MASK (PAB_INTP_INTA | PAB_INTP_INTB |\ ++ PAB_INTP_INTC | PAB_INTP_INTD) + + #define PAB_AXI_AMAP_CTRL(win) PAB_REG_ADDR(0x0ba0, win) + #define WIN_ENABLE_SHIFT 0 +-- +2.11.0 + diff --git a/patches.suse/0025-PCI-mobiveil-ls_pcie_g4-add-Workaround-for-A-011577.patch b/patches.suse/0025-PCI-mobiveil-ls_pcie_g4-add-Workaround-for-A-011577.patch new file mode 100644 index 0000000..24a902c --- /dev/null +++ b/patches.suse/0025-PCI-mobiveil-ls_pcie_g4-add-Workaround-for-A-011577.patch @@ -0,0 +1,164 @@ +From ff853c0507cb10c0ef7d3c5116805147aeddc386 Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:11:01 +0000 +Subject: [PATCH 25/26] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +PCIe configuration access to non-existent function triggered +SERROR interrupt exception. + +Workaround: +Disable error reporting on AXI bus during the Vendor ID read +transactions in enumeration. + +This ERRATA is only for LX2160A Rev1.0, and it will be fixed +in Rev2.0. + +Signed-off-by: Hou Zhiqiang +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pci-layerscape-gen4.c | 37 +++++++++++++++++++++++++ + drivers/pci/host/mobiveil/pcie-mobiveil-host.c | 17 +++++++++++- + drivers/pci/host/mobiveil/pcie-mobiveil.h | 3 ++ + 3 files changed, 56 insertions(+), 1 deletion(-) + +diff --git a/drivers/pci/host/mobiveil/pci-layerscape-gen4.c b/drivers/pci/host/mobiveil/pci-layerscape-gen4.c +index 174cbcac4059..d2c5dbbd5e3c 100644 +--- a/drivers/pci/host/mobiveil/pci-layerscape-gen4.c ++++ b/drivers/pci/host/mobiveil/pci-layerscape-gen4.c +@@ -22,8 +22,13 @@ + + #include "pcie-mobiveil.h" + ++#define REV_1_0 (0x10) ++ + /* LUT and PF control registers */ + #define PCIE_LUT_OFF (0x80000) ++#define PCIE_LUT_GCR (0x28) ++#define PCIE_LUT_GCR_RRE (0) ++ + #define PCIE_PF_OFF (0xc0000) + #define PCIE_PF_INT_STAT (0x18) + #define PF_INT_STAT_PABRST (31) +@@ -41,6 +46,7 @@ struct ls_pcie_g4 { + struct mobiveil_pcie *pci; + struct delayed_work dwork; + int irq; ++ u8 rev; + }; + + static inline u32 ls_pcie_g4_lut_readl(struct ls_pcie_g4 *pcie, u32 off) +@@ -76,6 +82,15 @@ static bool ls_pcie_g4_is_bridge(struct ls_pcie_g4 *pcie) + return header_type == PCI_HEADER_TYPE_BRIDGE; + } + ++static int ls_pcie_g4_host_init(struct mobiveil_pcie *pci) ++{ ++ struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci); ++ ++ pcie->rev = csr_readb(pci, PCI_REVISION_ID); ++ ++ return 0; ++} ++ + static int ls_pcie_g4_link_up(struct mobiveil_pcie *pci) + { + struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci); +@@ -188,12 +203,34 @@ static void ls_pcie_g4_reset(struct work_struct *work) + ls_pcie_g4_reinit_hw(pcie); + } + ++static int ls_pcie_g4_read_other_conf(struct pci_bus *bus, unsigned int devfn, ++ int where, int size, u32 *val) ++{ ++ struct mobiveil_pcie *pci = bus->sysdata; ++ struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci); ++ int ret; ++ ++ if (pcie->rev == REV_1_0 && where == PCI_VENDOR_ID) ++ ls_pcie_g4_lut_writel(pcie, PCIE_LUT_GCR, ++ 0 << PCIE_LUT_GCR_RRE); ++ ++ ret = pci_generic_config_read(bus, devfn, where, size, val); ++ ++ if (pcie->rev == REV_1_0 && where == PCI_VENDOR_ID) ++ ls_pcie_g4_lut_writel(pcie, PCIE_LUT_GCR, ++ 1 << PCIE_LUT_GCR_RRE); ++ ++ return ret; ++} ++ + static struct mobiveil_rp_ops ls_pcie_g4_rp_ops = { + .interrupt_init = ls_pcie_g4_interrupt_init, ++ .read_other_conf = ls_pcie_g4_read_other_conf, + }; + + static const struct mobiveil_pab_ops ls_pcie_g4_pab_ops = { + .link_up = ls_pcie_g4_link_up, ++ .host_init = ls_pcie_g4_host_init, + }; + + static int __init ls_pcie_g4_probe(struct platform_device *pdev) +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +index bc3c49e695fa..ba8e7a1b8a0f 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil-host.c ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil-host.c +@@ -79,9 +79,20 @@ static void __iomem *mobiveil_pcie_map_bus(struct pci_bus *bus, + return pcie->rp.config_axi_slave_base + where; + } + ++static int mobiveil_pcie_config_read(struct pci_bus *bus, unsigned int devfn, ++ int where, int size, u32 *val) ++{ ++ struct mobiveil_pcie *pcie = bus->sysdata; ++ struct root_port *rp = &pcie->rp; ++ ++ if (bus->number > rp->root_bus_nr && rp->ops->read_other_conf) ++ return rp->ops->read_other_conf(bus, devfn, where, size, val); ++ ++ return pci_generic_config_read(bus, devfn, where, size, val); ++} + static struct pci_ops mobiveil_pcie_ops = { + .map_bus = mobiveil_pcie_map_bus, +- .read = pci_generic_config_read, ++ .read = mobiveil_pcie_config_read, + .write = pci_generic_config_write, + }; + +@@ -309,6 +320,10 @@ int mobiveil_host_init(struct mobiveil_pcie *pcie, bool reinit) + value |= (PCI_CLASS_BRIDGE_PCI << 16); + csr_writel(pcie, value, PAB_INTP_AXI_PIO_CLASS); + ++ /* Platform specific host init */ ++ if (pcie->ops->host_init) ++ return pcie->ops->host_init(pcie); ++ + return 0; + } + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +index 0ccd6cee5f8f..ab43de5e4b2b 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.h ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -145,6 +145,8 @@ struct mobiveil_msi { /* MSI information */ + + struct mobiveil_rp_ops { + int (*interrupt_init)(struct mobiveil_pcie *pcie); ++ int (*read_other_conf)(struct pci_bus *bus, unsigned int devfn, ++ int where, int size, u32 *val); + }; + + struct root_port { +@@ -160,6 +162,7 @@ struct root_port { + + struct mobiveil_pab_ops { + int (*link_up)(struct mobiveil_pcie *pcie); ++ int (*host_init)(struct mobiveil_pcie *pcie); + }; + + struct mobiveil_pcie { +-- +2.11.0 + diff --git a/patches.suse/0026-PCI-mobiveil-ls_pcie_g4-add-Workaround-for-A-011451.patch b/patches.suse/0026-PCI-mobiveil-ls_pcie_g4-add-Workaround-for-A-011451.patch new file mode 100644 index 0000000..34e481c --- /dev/null +++ b/patches.suse/0026-PCI-mobiveil-ls_pcie_g4-add-Workaround-for-A-011451.patch @@ -0,0 +1,84 @@ +From e741c4607843da92b1418e87268d09785f2f431b Mon Sep 17 00:00:00 2001 +From: Hou Zhiqiang +Date: Tue, 29 Jan 2019 08:11:07 +0000 +Subject: [PATCH 26/26] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 + +Patch-mainline: Submitted, https://patchwork.kernel.org/cover/10785657/ +References: fate#326572 + +When LX2 PCIe controller is sending multiple split completions and +ACK latency expires indicating that ACK should be send at priority. +But because of large number of split completions and FC update DLLP, +the controller does not give priority to ACK transmission. This +results into ACK latency timer timeout error at the link partner and +the pending TLPs are replayed by the link partner again. + +Workaround: +1. Reduce the ACK latency timeout value to a very small value. +2. Restrict the number of completions from the LX2 PCIe controller + to 1, by changing the Max Read Request Size (MRRS) of link partner + to the same value as Max Packet size (MPS). + +This patch implemented part 1, the part 2 can be set by kernel parameter +'pci=pcie_bus_perf' + +This ERRATA is only for LX2160A Rev1.0, and it will be fixed +in Rev2.0. + +Signed-off-by: Hou Zhiqiang +Signed-off-by: Mian Yousaf Kaukab +--- + drivers/pci/host/mobiveil/pci-layerscape-gen4.c | 15 +++++++++++++++ + drivers/pci/host/mobiveil/pcie-mobiveil.h | 4 ++++ + 2 files changed, 19 insertions(+) + +diff --git a/drivers/pci/host/mobiveil/pci-layerscape-gen4.c b/drivers/pci/host/mobiveil/pci-layerscape-gen4.c +index d2c5dbbd5e3c..20ce146788ca 100644 +--- a/drivers/pci/host/mobiveil/pci-layerscape-gen4.c ++++ b/drivers/pci/host/mobiveil/pci-layerscape-gen4.c +@@ -82,12 +82,27 @@ static bool ls_pcie_g4_is_bridge(struct ls_pcie_g4 *pcie) + return header_type == PCI_HEADER_TYPE_BRIDGE; + } + ++static void workaround_A011451(struct ls_pcie_g4 *pcie) ++{ ++ struct mobiveil_pcie *mv_pci = pcie->pci; ++ u32 val; ++ ++ /* Set ACK latency timeout */ ++ val = csr_readl(mv_pci, GPEX_ACK_REPLAY_TO); ++ val &= ~(ACK_LAT_TO_VAL_MASK << ACK_LAT_TO_VAL_SHIFT); ++ val |= (4 << ACK_LAT_TO_VAL_SHIFT); ++ csr_writel(mv_pci, val, GPEX_ACK_REPLAY_TO); ++} ++ + static int ls_pcie_g4_host_init(struct mobiveil_pcie *pci) + { + struct ls_pcie_g4 *pcie = to_ls_pcie_g4(pci); + + pcie->rev = csr_readb(pci, PCI_REVISION_ID); + ++ if (pcie->rev == REV_1_0) ++ workaround_A011451(pcie); ++ + return 0; + } + +diff --git a/drivers/pci/host/mobiveil/pcie-mobiveil.h b/drivers/pci/host/mobiveil/pcie-mobiveil.h +index ab43de5e4b2b..f0e2e4ae09b5 100644 +--- a/drivers/pci/host/mobiveil/pcie-mobiveil.h ++++ b/drivers/pci/host/mobiveil/pcie-mobiveil.h +@@ -85,6 +85,10 @@ + #define PAB_AXI_AMAP_PEX_WIN_H(win) PAB_REG_ADDR(0x0bac, win) + #define PAB_INTP_AXI_PIO_CLASS 0x474 + ++#define GPEX_ACK_REPLAY_TO 0x438 ++#define ACK_LAT_TO_VAL_MASK 0x1fff ++#define ACK_LAT_TO_VAL_SHIFT 0 ++ + #define PAB_PEX_AMAP_CTRL(win) PAB_REG_ADDR(0x4ba0, win) + #define AMAP_CTRL_EN_SHIFT 0 + #define AMAP_CTRL_TYPE_SHIFT 1 +-- +2.11.0 + diff --git a/patches.suse/0039-efi-Add-EFI_SECURE_BOOT-bit.patch b/patches.suse/0039-efi-Add-EFI_SECURE_BOOT-bit.patch new file mode 100644 index 0000000..cff5eb9 --- /dev/null +++ b/patches.suse/0039-efi-Add-EFI_SECURE_BOOT-bit.patch @@ -0,0 +1,49 @@ +From 7c121e1d97d6af4d25fb49bffb10571964f37ab1 Mon Sep 17 00:00:00 2001 +From: Josh Boyer +Date: Wed, 5 Apr 2017 17:40:29 +0100 +Subject: [PATCH 39/62] efi: Add EFI_SECURE_BOOT bit +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/9665587/ +References: fate#314486 + +UEFI machines can be booted in Secure Boot mode. Add a EFI_SECURE_BOOT bit +that can be passed to efi_enabled() to find out whether secure boot is +enabled. + +This will be used by the SysRq+x handler, registered by the x86 arch, to find +out whether secure boot mode is enabled so that it can be disabled. + +Signed-off-by: Josh Boyer +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + arch/x86/kernel/setup.c | 1 + + include/linux/efi.h | 1 + + 2 files changed, 2 insertions(+) + +diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c +index 4bf0c89..396285b 100644 +--- a/arch/x86/kernel/setup.c ++++ b/arch/x86/kernel/setup.c +@@ -1184,6 +1184,7 @@ void __init setup_arch(char **cmdline_p) + pr_info("Secure boot disabled\n"); + break; + case efi_secureboot_mode_enabled: ++ set_bit(EFI_SECURE_BOOT, &efi.flags); + pr_info("Secure boot enabled\n"); + break; + default: +diff --git a/include/linux/efi.h b/include/linux/efi.h +index 94d34e0..6049600 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -1069,6 +1069,7 @@ extern int __init efi_setup_pcdp_console(char *); + #define EFI_DBG 8 /* Print additional debug info at runtime */ + #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ + #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ ++#define EFI_SECURE_BOOT 11 /* Are we in Secure Boot mode? */ + + #ifdef CONFIG_EFI + /* +-- +2.10.2 + diff --git a/patches.suse/0040-Add-the-ability-to-lock-down-access-to-the-running-k.patch b/patches.suse/0040-Add-the-ability-to-lock-down-access-to-the-running-k.patch new file mode 100644 index 0000000..bb74fe7 --- /dev/null +++ b/patches.suse/0040-Add-the-ability-to-lock-down-access-to-the-running-k.patch @@ -0,0 +1,152 @@ +From 4e038dfc742f11bcd02e5a3fba5718cefbf06d70 Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Wed, 5 Apr 2017 17:40:29 +0100 +Subject: [PATCH 40/62] Add the ability to lock down access to the running + kernel image +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/9665591/ +References: fate#314486 + +Provide a single call to allow kernel code to determine whether the system +should be locked down, thereby disallowing various accesses that might +allow the running kernel image to be changed including the loading of +modules that aren't validly signed with a key we recognise, fiddling with +MSR registers and disallowing hibernation, + +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + include/linux/kernel.h | 9 +++++++++ + include/linux/security.h | 11 +++++++++++ + security/Kconfig | 15 +++++++++++++++ + security/Makefile | 3 +++ + security/lock_down.c | 40 ++++++++++++++++++++++++++++++++++++++++ + 5 files changed, 78 insertions(+) + create mode 100644 security/lock_down.c + +diff --git a/include/linux/kernel.h b/include/linux/kernel.h +index 4c26dc3..b820a80 100644 +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -275,6 +275,15 @@ extern int oops_may_print(void); + void do_exit(long error_code) __noreturn; + void complete_and_exit(struct completion *, long) __noreturn; + ++#ifdef CONFIG_LOCK_DOWN_KERNEL ++extern bool kernel_is_locked_down(void); ++#else ++static inline bool kernel_is_locked_down(void) ++{ ++ return false; ++} ++#endif ++ + /* Internal, do not use. */ + int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res); + int __must_check _kstrtol(const char *s, unsigned int base, long *res); +diff --git a/include/linux/security.h b/include/linux/security.h +index af675b5..68bab18 100644 +--- a/include/linux/security.h ++++ b/include/linux/security.h +@@ -1698,5 +1698,16 @@ static inline void free_secdata(void *secdata) + { } + #endif /* CONFIG_SECURITY */ + ++#ifdef CONFIG_LOCK_DOWN_KERNEL ++extern void lock_kernel_down(void); ++#ifdef CONFIG_ALLOW_LOCKDOWN_LIFT ++extern void lift_kernel_lockdown(void); ++#endif ++#else ++static inline void lock_kernel_down(void) ++{ ++} ++#endif ++ + #endif /* ! __LINUX_SECURITY_H */ + +diff --git a/security/Kconfig b/security/Kconfig +index 3ff1bf9..e383017 100644 +--- a/security/Kconfig ++++ b/security/Kconfig +@@ -198,6 +198,21 @@ config STATIC_USERMODEHELPER_PATH + If you wish for all usermode helper programs to be disabled, + specify an empty string here (i.e. ""). + ++config LOCK_DOWN_KERNEL ++ bool "Allow the kernel to be 'locked down'" ++ help ++ Allow the kernel to be locked down under certain circumstances, for ++ instance if UEFI secure boot is enabled. Locking down the kernel ++ turns off various features that might otherwise allow access to the ++ kernel image (eg. setting MSR registers). ++ ++config ALLOW_LOCKDOWN_LIFT ++ bool ++ help ++ Allow the lockdown on a kernel to be lifted, thereby restoring the ++ ability of userspace to access the kernel image (eg. by SysRq+x under ++ x86). ++ + source security/selinux/Kconfig + source security/smack/Kconfig + source security/tomoyo/Kconfig +diff --git a/security/Makefile b/security/Makefile +index f2d71cd..8c4a43e 100644 +--- a/security/Makefile ++++ b/security/Makefile +@@ -29,3 +29,6 @@ obj-$(CONFIG_CGROUP_DEVICE) += device_cgroup.o + # Object integrity file lists + subdir-$(CONFIG_INTEGRITY) += integrity + obj-$(CONFIG_INTEGRITY) += integrity/ ++ ++# Allow the kernel to be locked down ++obj-$(CONFIG_LOCK_DOWN_KERNEL) += lock_down.o +diff --git a/security/lock_down.c b/security/lock_down.c +new file mode 100644 +index 0000000..5788c60 +--- /dev/null ++++ b/security/lock_down.c +@@ -0,0 +1,40 @@ ++/* Lock down the kernel ++ * ++ * Copyright (C) 2016 Red Hat, Inc. All Rights Reserved. ++ * Written by David Howells (dhowells@redhat.com) ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public Licence ++ * as published by the Free Software Foundation; either version ++ * 2 of the Licence, or (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++static __read_mostly bool kernel_locked_down; ++ ++/* ++ * Put the kernel into lock-down mode. ++ */ ++void lock_kernel_down(void) ++{ ++ kernel_locked_down = true; ++} ++ ++/* ++ * Take the kernel out of lockdown mode. ++ */ ++void lift_kernel_lockdown(void) ++{ ++ kernel_locked_down = false; ++} ++ ++/** ++ * kernel_is_locked_down - Find out if the kernel is locked down ++ */ ++bool kernel_is_locked_down(void) ++{ ++ return kernel_locked_down; ++} ++EXPORT_SYMBOL(kernel_is_locked_down); +-- +2.10.2 + diff --git a/patches.suse/0041-efi-Lock-down-the-kernel-if-booted-in-secure-boot-mo.patch b/patches.suse/0041-efi-Lock-down-the-kernel-if-booted-in-secure-boot-mo.patch new file mode 100644 index 0000000..36d86ce --- /dev/null +++ b/patches.suse/0041-efi-Lock-down-the-kernel-if-booted-in-secure-boot-mo.patch @@ -0,0 +1,66 @@ +From 48f943a855fa850977db9071250db2b9e12287ce Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Wed, 5 Apr 2017 17:40:29 +0100 +Subject: [PATCH 41/62] efi: Lock down the kernel if booted in secure boot mode + +Patch-mainline: No, submitted https://patchwork.kernel.org/patch/9665015/ +References: fate#314486 + +UEFI Secure Boot provides a mechanism for ensuring that the firmware will +only load signed bootloaders and kernels. Certain use cases may also +require that all kernel modules also be signed. Add a configuration option +that to lock down the kernel - which includes requiring validly signed +modules - if the kernel is secure-booted. + +Signed-off-by: David Howells +Acked-by: Lee, Chun-Yi +--- + arch/x86/Kconfig | 12 ++++++++++++ + arch/x86/kernel/setup.c | 8 +++++++- + 2 files changed, 19 insertions(+), 1 deletion(-) + +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -1858,6 +1858,18 @@ config EFI_MIXED + + If unsure, say N. + ++config EFI_SECURE_BOOT_LOCK_DOWN ++ def_bool n ++ depends on EFI ++ prompt "Lock down the kernel when UEFI Secure Boot is enabled" ++ ---help--- ++ UEFI Secure Boot provides a mechanism for ensuring that the firmware ++ will only load signed bootloaders and kernels. Certain use cases may ++ also require that all kernel modules also be signed and that ++ userspace is prevented from directly changing the running kernel ++ image. Say Y here to automatically lock down the kernel when a ++ system boots with UEFI Secure Boot enabled. ++ + config SECCOMP + def_bool y + prompt "Enable seccomp to safely compute untrusted bytecode" +--- a/arch/x86/kernel/setup.c ++++ b/arch/x86/kernel/setup.c +@@ -70,6 +70,7 @@ + #include + #include + #include ++#include + + #include + #include