From: Oscar Mateo Date: Mon, 16 Apr 2018 14:57:01 -0700 Subject: drm/i915/selftests: Handle a potential failure of intel_ring_begin Git-commit: 94f8dfc6cdfc3c48c3aea59ce528fa93cb54a69f Patch-mainline: v4.18-rc1 References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166 Silence smatch over: drivers/gpu/drm/i915/selftests/intel_workarounds.c:58 read_nonprivs() error: 'cs' dereferencing possible ERR_PTR() by handling a potential (but unlikely) failure of intel_ring_begin. Fixes: f4ecfbfc32ed ("drm/i915: Check whitelist registers across resets") Signed-off-by: Oscar Mateo Cc: Chris Wilson Reviewed-by: Chris Wilson Signed-off-by: Chris Wilson Link: https://patchwork.freedesktop.org/patch/msgid/1523915821-30624-1-git-send-email-oscar.mateo@intel.com Acked-by: Petr Tesarik --- drivers/gpu/drm/i915/selftests/intel_workarounds.c | 7 +++++++ 1 file changed, 7 insertions(+) --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c @@ -54,6 +54,11 @@ read_nonprivs(struct i915_gem_context *c srm++; cs = intel_ring_begin(rq, 4 * RING_MAX_NONPRIV_SLOTS); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + goto err_req; + } + for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) { *cs++ = srm; *cs++ = i915_mmio_reg_offset(RING_FORCE_TO_NONPRIV(base, i)); @@ -75,6 +80,8 @@ read_nonprivs(struct i915_gem_context *c return result; +err_req: + i915_request_add(rq); err_pin: i915_vma_unpin(vma); err_obj: