Blob Blame History Raw
<revisionlist>
  <revision rev="1" vrev="1">
    <srcmd5>cf8fb9d96d0e48c858a031f87ec6e089</srcmd5>
    <version>0.4.0</version>
    <time>1485040672</time>
    <user>dimstar_suse</user>
    <comment>new package</comment>
    <requestid>442683</requestid>
  </revision>
  <revision rev="2" vrev="2">
    <srcmd5>f4f9a2156d9a82031c3e85fd14c8c3dd</srcmd5>
    <version>0.4.0</version>
    <time>1497016645</time>
    <user>dimstar_suse</user>
    <comment>- Enable internal tests</comment>
    <requestid>502377</requestid>
  </revision>
  <revision rev="3" vrev="1">
    <srcmd5>b64fbc2e6d5fe238a82a3e0a4c8b94a4</srcmd5>
    <version>0.4.1</version>
    <time>1551284905</time>
    <user>dimstar_suse</user>
    <comment></comment>
    <requestid>676929</requestid>
  </revision>
  <revision rev="4" vrev="1">
    <srcmd5>d8d6dd49da2fd172cefdf21f84d44d04</srcmd5>
    <version>0.4.1+git.20200102</version>
    <time>1579791329</time>
    <user>dimstar_suse</user>
    <comment>- Update to version 0.4.1+git.20200102:
  * DB: Add Threadripper (Castle Peak)
  * Fix compilation on non-x86/ARM architectures.
  * Add support for get_total_cpus on Haiku.
  * Some typo fixes in human readable text.
  * Add Xeon CLX (Cascade lake-based) using data from PR #129
  * add support to feature intel avx512_vnni
  * AARCH64 stub
  * Ignore convert_instlatx64 binary
  * add Hygon Dhyana C86 7seris test file
  * Add Hygon Dhyana detect support
- Switch to _service</comment>
    <requestid>766548</requestid>
  </revision>
  <revision rev="5" vrev="1">
    <srcmd5>ae548e4201de5ab77809ba74bd800fc1</srcmd5>
    <version>0.5.0+git.20200526</version>
    <time>1590650007</time>
    <user>maxlin_factory</user>
    <comment>- Update to version v0.5.0+git.20200526:
  * CI: remove 'v' prefix in assets
  * CI: checkout sources before making release
  * Release version 0.5.0 (#146)
  * Add GitHub workflows for CI/CD - CI: it will check code consistency and run tests for all events (except for tags) - CD: it will build all assets and create a draft Close #122
  * check-consistency: return error count
  * Fix code consistency Result before this patch:
  * CMake: fix include directory
  * CMake: fix build on Windows
  * CMake: fix install target's export
  * tests: fix unused-result warning in convert_instlatx64 tool
  * Update .gitignore
  * CMake: fix Unix install and format
  * Add config file for cmake-format It formats CMakeLists.txt files See https://github.com/cheshirekow/cmake_format
  * Doxygen: upgrade Doxyfile to avoid warnings warning: Tag 'PERL_PATH' at line 1032 of file '/libcpuid/build/libcpuid/Doxyfile' has become obsolete. To avoid this warning please remove this line from your configuration file or upgrade it using &quot;doxygen -u&quot; warning: argument 'a4wide' for option PAPER_TYPE is not a valid enum value Using the default: a4!
  * Doxygen: turn on quiet mode It is too noisy with CMake
  * Detect AVX512VBMI and AVX512VBMI2 features on Intel CPUs More information: https://en.wikichip.org/wiki/x86/avx-512 Resolve #134
  * Detect ABM feature on Intel CPUs Resolve #144
  * Detect RDSEED/ADX/SHA_NI features on AMD CPUs These x86 instruction set extensions are present since Zen micro-architecture Resolve #145
  * Update cpuid_main.c
  * DB: add Ivy Bridge-E (Xeon)
  * Tests: update all tests to add fields for L1I
  * Tests: update to add L1I information Related to 25d0614811991c855ce7db0d898dbc6200dfa840 Dump of Core i5 520m from CPU-X#119
  * Add L1 Instruction Cache information Some CPUs does not have the same associativity for L1D and L1I, as reported in X0rg/CPU-X#119 It adds l1_instruction_assoc and l1_instruction_cacheline in cpu_id_t To avoid confusing, also adds l1_data_assoc and l1_data_cacheline l1_assoc and l1_cacheline are leave untouched for backward compatibility
  * Ignore .vscode directory Yes, 0b05f45e03b0aa39a65eba9451b59c9381e8474c was about VS Code
  * Tests: add amd_fn8000001dh subleaf See e562798cecf4af852fdfef4b0e7bf159a5d9b4de
  * Tests: parse subleafs in convert_instlatx64 Also, it adds 0xffffffff when data is not available, so all lines are presents
  * Re-fix L3 cache associativity detection on AMD Zen 2 CPUs Previous commit: 848394ee460c70298f91569d33f2c156bddb0f6c
  * Applied a patch from @tavplubix
  * Use constant for registers name It helps when reading technical documentation and it avoids 'magic values'</comment>
    <requestid>809020</requestid>
  </revision>
  <revision rev="6" vrev="1">
    <srcmd5>fc2da9f889787d9fa3d70dbd9a00183a</srcmd5>
    <version>0.5.0+git.20200528</version>
    <time>1597390397</time>
    <user>dimstar_suse</user>
    <comment>- Update to version 0.5.0+git.20200528:
  * Related to c2645d0. Convert all python scripts to Python 3.
  * Add Downloads section on Readme.md Close #140
  * Add I-Nex to the users list</comment>
    <requestid>826264</requestid>
  </revision>
  <revision rev="7" vrev="1">
    <srcmd5>a33a799d73ff01df9046f65e6307b435</srcmd5>
    <version>0.5.0+git.20201019</version>
    <time>1604609725</time>
    <user>dimstar_suse</user>
    <comment>- Update to version 0.5.0+git.20201019:
  * Fixes issue #148: CMake build script not in 0.5.0 tarball release</comment>
    <requestid>846147</requestid>
  </revision>
  <revision rev="8" vrev="1">
    <srcmd5>16c666788b395aa4e8896c800f28ebaa</srcmd5>
    <version>0.5.0+git.20201114</version>
    <time>1606252461</time>
    <user>dimstar_suse</user>
    <comment>- Update to version 0.5.0+git.20201114:
  * Tests: fix path for cpuid_tool When we use CMake, the 'cpuid_tool' binary is in the 'build' directory
  * DB: add Vermeer https://en.wikichip.org/wiki/amd/cores/vermeer Test file converted from http://users.atw.hu/instlatx64/AuthenticAMD/AuthenticAMD0A20F10_K19_Vermeer_CPUID1.txt
  * DB: add Gemini Lake https://en.wikichip.org/wiki/intel/cores/gemini_lake Reported in X0rg/CPU-X#164
  * DB: add Comet Lake-U https://en.wikipedia.org/wiki/Comet_Lake_(microprocessor)#U-series_(Medium_power) Reported in X0rg/CPU-X#162
  * DB: add Kaby Lake-G https://en.wikichip.org/wiki/intel/cores/kaby_lake_g Test file converted from http://users.atw.hu/instlatx64/GenuineIntel/GenuineIntel00906E9_KabylakeG_CPUID.txt
  * DB: add Kaby Lake Refresh https://en.wikichip.org/wiki/intel/cores/kaby_lake_r Core i5 8250U was detected as Coffee Lake wrongly. Reported in X0rg/CPU-X#161</comment>
    <requestid>850394</requestid>
  </revision>
  <revision rev="9" vrev="1">
    <srcmd5>b25d8e8c05ac8714c5b1d331d4b054bb</srcmd5>
    <version>0.5.1+git.1616323866</version>
    <time>1617723004</time>
    <user>RBrownSUSE</user>
    <comment>Automatic submission by obs-autosubmit</comment>
    <requestid>882705</requestid>
  </revision>
  <revision rev="10" vrev="1">
    <srcmd5>1c8900d47f6a8c2d15b5efc9f1793925</srcmd5>
    <version>0.5.1+git.1626502835</version>
    <time>1630093436</time>
    <user>dimstar_suse</user>
    <comment>- Update to version 0.5.1+git.1626502835:
  * CMake: reduce min cmake requirement 3.14 -&gt; 3.13
  * Fix failing CI builds introduced by cb5fdd1
  * Use popcount64 from libc when available (#152)
  * allow to build either static or shared (#156)
  * cmake: allow libcpuid to be added as a CMake subproject (#155)
  * fix installation of BUNDLE if iOS (#154)
  * cmake: add an option to build tests (#153)
  * Fix #150: CPU Family/Model is used as Ext.Family/Model
  * DB: add Tiger Lake</comment>
    <requestid>914539</requestid>
  </revision>
  <revision rev="11" vrev="1">
    <srcmd5>8de687773e7eb4b6b707c8134764829b</srcmd5>
    <version>0.5.1+git.1644144775</version>
    <time>1644435586</time>
    <user>dimstar_suse</user>
    <comment>- Update to version 0.5.1+git.1644144775:
  * Tests: add more Zen2 tests from InstLatx64
  * DB: add Lucienne
  * Report memory allocation failures without segfaulting. (#160)
  * Don't link with msrdriver.c on non-Windows platform. (#159)</comment>
    <requestid>952939</requestid>
  </revision>
</revisionlist>