From: Ken Chalmers <ken.chalmers@amd.com>
Date: Thu, 4 May 2017 13:34:55 -0400
Subject: drm/amd/display: Continue with stream enable if DP link training
fails.
Git-commit: c0ba5ec70eff5cf0e4337b3864c94fa6b128c8d7
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Not necessarily a fatal problem - some monitors will recover and show
the stream anyway if link training fails.
Signed-off-by: Ken Chalmers <ken.chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 21 +++++++++++++++++----
drivers/gpu/drm/amd/display/dc/inc/core_status.h | 1 +
2 files changed, 18 insertions(+), 4 deletions(-)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1225,7 +1225,7 @@ static enum dc_status enable_link_dp(str
status = DC_OK;
}
else
- status = DC_ERROR_UNEXPECTED;
+ status = DC_FAIL_DP_LINK_TRAINING;
enable_stream_features(pipe_ctx);
@@ -1833,9 +1833,22 @@ void core_link_enable_stream(struct pipe
{
struct core_dc *core_dc = DC_TO_CORE(pipe_ctx->stream->ctx->dc);
- if (DC_OK != enable_link(pipe_ctx)) {
- BREAK_TO_DEBUGGER();
- return;
+ enum dc_status status = enable_link(pipe_ctx);
+
+ if (status != DC_OK) {
+ dm_logger_write(pipe_ctx->stream->ctx->logger,
+ LOG_WARNING, "enabling link %u failed: %d\n",
+ pipe_ctx->stream->sink->link->public.link_index,
+ status);
+
+ /* Abort stream enable *unless* the failure was due to
+ * DP link training - some DP monitors will recover and
+ * show the stream anyway.
+ */
+ if (status != DC_FAIL_DP_LINK_TRAINING) {
+ BREAK_TO_DEBUGGER();
+ return;
+ }
}
/* turn off otg test pattern if enable */
--- a/drivers/gpu/drm/amd/display/dc/inc/core_status.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_status.h
@@ -41,6 +41,7 @@ enum dc_status {
DC_SURFACE_PIXEL_FORMAT_UNSUPPORTED = 11,
DC_FAIL_BANDWIDTH_VALIDATE = 12, /* BW and Watermark validation */
DC_FAIL_SCALING = 13,
+ DC_FAIL_DP_LINK_TRAINING = 14,
DC_ERROR_UNEXPECTED = -1
};