From: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Date: Fri, 28 Jul 2017 18:21:22 -0400
Subject: drm/amd/display: fix >340 Mhz with deep color pipe split no display
Git-commit: b701542d29d61c3514f51496168831c8476a8e2a
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
the input to HW formula needs to take care the deep color.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 13 ++++++++++++-
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 --
2 files changed, 12 insertions(+), 3 deletions(-)
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -856,7 +856,18 @@ bool dcn_validate_bandwidth(
- pipe->stream->timing.v_front_porch;
v->vactive[input_idx] = pipe->stream->timing.v_addressable;
v->pixel_clock[input_idx] = pipe->stream->timing.pix_clk_khz / 1000.0f;
-
+ if (pipe->stream->sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) {
+ switch (pipe->stream->timing.display_color_depth) {
+ case COLOR_DEPTH_101010:
+ v->pixel_clock[input_idx] = (v->pixel_clock[input_idx] * 30) / 24;
+ break;
+ case COLOR_DEPTH_121212:
+ v->pixel_clock[input_idx] = (v->pixel_clock[input_idx] * 36) / 24;
+ break;
+ default:
+ break;
+ }
+ }
if (!pipe->surface){
v->dcc_enable[input_idx] = dcn_bw_yes;
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1657,8 +1657,6 @@ static void set_avi_info_frame(
color_space == COLOR_SPACE_YCBCR601_LIMITED)
hdmi_info->bits.C0_C1 = COLORIMETRY_ITU601;
else {
- if (stream->timing.pixel_encoding != PIXEL_ENCODING_RGB)
- BREAK_TO_DEBUGGER();
hdmi_info->bits.C0_C1 = COLORIMETRY_NO_DATA;
}
if (color_space == COLOR_SPACE_2020_RGB_FULLRANGE ||