From d31fd43c0f9a41e2678a1e78c0f22f0384c6edd3 Mon Sep 17 00:00:00 2001
From: Carlo Caione <carlo@endlessm.com>
Date: Fri, 14 Jul 2017 10:23:56 +0200
Subject: [PATCH] clk: x86: Do not gate clocks enabled by the firmware
Git-commit: d31fd43c0f9a41e2678a1e78c0f22f0384c6edd3
Patch-mainline: v4.13-rc4
References: bsc#1051510
Read the enable register to determine if the clock is already in use by
the firmware. In this case avoid gating the clock.
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Darren Hart (VMware) <dvhart@infradead.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Fixes: 282a4e4ce5f9 ("platform/x86: Enable Atom PMC platform clocks")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/clk/x86/clk-pmc-atom.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-atom.c
index f99abc1106f0..08ef69945ffb 100644
--- a/drivers/clk/x86/clk-pmc-atom.c
+++ b/drivers/clk/x86/clk-pmc-atom.c
@@ -186,6 +186,13 @@ static struct clk_plt *plt_clk_register(struct platform_device *pdev, int id,
pclk->reg = base + PMC_CLK_CTL_OFFSET + id * PMC_CLK_CTL_SIZE;
spin_lock_init(&pclk->lock);
+ /*
+ * If the clock was already enabled by the firmware mark it as critical
+ * to avoid it being gated by the clock framework if no driver owns it.
+ */
+ if (plt_clk_is_enabled(&pclk->hw))
+ init.flags |= CLK_IS_CRITICAL;
+
ret = devm_clk_hw_register(&pdev->dev, &pclk->hw);
if (ret) {
pclk = ERR_PTR(ret);
--
2.18.0