From 6171e58b1ff5c41632d8fb87f0e6bd003ed34c13 Mon Sep 17 00:00:00 2001
From: Clinton A Taylor <clinton.a.taylor@intel.com>
Date: Fri, 20 Sep 2019 13:58:05 -0700
Subject: drm/i915/tgl: Add missing ddi clock select during DP init sequence
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Git-commit: 6171e58b1ff5c41632d8fb87f0e6bd003ed34c13
Patch-mainline: v5.5-rc1
References: bsc#1152489
Step 4.b was complete missed because it is only required to TC and TBT.
Bspec: 49190
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Clinton A Taylor <clinton.a.taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190920205810.211048-2-jose.souza@intel.com
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 0c0da9f6c2e8..dfd6b064cbc3 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3230,11 +3230,14 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
intel_edp_panel_on(intel_dp);
/*
- * 1.b, 3. and 4. is done before tgl_ddi_pre_enable_dp() by:
+ * 1.b, 3. and 4.a is done before tgl_ddi_pre_enable_dp() by:
* haswell_crtc_enable()->intel_encoders_pre_pll_enable() and
* haswell_crtc_enable()->intel_enable_shared_dpll()
*/
+ /* 4.b */
+ intel_ddi_clk_select(encoder, crtc_state);
+
/* 5. */
if (!intel_phy_is_tc(dev_priv, phy) ||
dig_port->tc_mode != TC_PORT_TBT_ALT)
--
2.28.0