From 0e04ad7d1857670944786a8465930a049aaf995f Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@amd.com>
Date: Thu, 17 Oct 2019 11:57:45 -0400
Subject: drm/amdgpu/powerplay: use local renoir array sizes for clock fetching
Git-commit: 0e04ad7d1857670944786a8465930a049aaf995f
Patch-mainline: v5.5-rc1
References: bsc#1152472

To avoid walking past the end of the arrays since the PP_SMU
defines don't match the renoir defines.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
 drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 953e347633ec..57930c9e22ff 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -427,22 +427,22 @@ static int renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks
 	if (!clock_table || !table)
 		return -EINVAL;
 
-	for (i = 0; i < PP_SMU_NUM_DCFCLK_DPM_LEVELS; i++) {
+	for (i = 0; i < NUM_DCFCLK_DPM_LEVELS; i++) {
 		clock_table->DcfClocks[i].Freq = table->DcfClocks[i].Freq;
 		clock_table->DcfClocks[i].Vol = table->DcfClocks[i].Vol;
 	}
 
-	for (i = 0; i < PP_SMU_NUM_SOCCLK_DPM_LEVELS; i++) {
+	for (i = 0; i < NUM_SOCCLK_DPM_LEVELS; i++) {
 		clock_table->SocClocks[i].Freq = table->SocClocks[i].Freq;
 		clock_table->SocClocks[i].Vol = table->SocClocks[i].Vol;
 	}
 
-	for (i = 0; i < PP_SMU_NUM_FCLK_DPM_LEVELS; i++) {
+	for (i = 0; i < NUM_FCLK_DPM_LEVELS; i++) {
 		clock_table->FClocks[i].Freq = table->FClocks[i].Freq;
 		clock_table->FClocks[i].Vol = table->FClocks[i].Vol;
 	}
 
-	for (i = 0; i<  PP_SMU_NUM_MEMCLK_DPM_LEVELS; i++) {
+	for (i = 0; i<  NUM_MEMCLK_DPM_LEVELS; i++) {
 		clock_table->MemClocks[i].Freq = table->MemClocks[i].Freq;
 		clock_table->MemClocks[i].Vol = table->MemClocks[i].Vol;
 	}
-- 
2.28.0