From c6a5f8daff1179a443f3bf797c0400d84a8818a0 Mon Sep 17 00:00:00 2001
From: Bhanusree <bhanusreemahesh@gmail.com>
Date: Fri, 25 Oct 2019 11:57:38 +0530
Subject: drm/gpu: Fix Memory barrier without comment Issue
Git-commit: c6a5f8daff1179a443f3bf797c0400d84a8818a0
Patch-mainline: v5.5-rc1
References: bsc#1152472
-Issue found using checkpatch.pl
-Insert comments for memory barrier usage
Signed-off-by: Bhanusree <bhanusreemahesh@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1571984858-4644-1-git-send-email-bhanusreemahesh@gmail.com
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
---
drivers/gpu/drm/drm_cache.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c
index 12f8d1ba8653..03e01b000f7a 100644
--- a/drivers/gpu/drm/drm_cache.c
+++ b/drivers/gpu/drm/drm_cache.c
@@ -126,10 +126,10 @@ drm_clflush_sg(struct sg_table *st)
if (static_cpu_has(X86_FEATURE_CLFLUSH)) {
struct sg_page_iter sg_iter;
- mb();
+ mb(); /*CLFLUSH is ordered only by using memory barriers*/
for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
drm_clflush_page(sg_page_iter_page(&sg_iter));
- mb();
+ mb(); /*Make sure that all cache line entry is flushed*/
return;
}
@@ -160,11 +160,11 @@ drm_clflush_virt_range(void *addr, unsigned long length)
void *end = addr + length;
addr = (void *)(((unsigned long)addr) & -size);
- mb();
+ mb(); /*CLFLUSH is only ordered with a full memory barrier*/
for (; addr < end; addr += size)
clflushopt(addr);
clflushopt(end - 1); /* force serialisation */
- mb();
+ mb(); /*Ensure that evry data cache line entry is flushed*/
return;
}
--
2.28.0