From: Marc Kleine-Budde <mkl@pengutronix.de>
Date: Tue, 22 Sep 2020 16:44:12 +0200
Subject: can: flexcan: more register names
Git-commit: 4b702878afc375979be48c8da427455eb8496b15
Patch-mainline: v5.10-rc1
References: jsc#SLE-12251
This patch adds some new register names and tries to ensure with a
static_assert that the documented offset is correct.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20200922144429.2613631-4-mkl@pengutronix.de
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
---
drivers/net/can/flexcan.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 43fa38033383..c24d7b63e1b9 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -205,7 +205,7 @@ struct flexcan_regs {
u32 mcr; /* 0x00 */
u32 ctrl; /* 0x04 */
u32 timer; /* 0x08 */
- u32 _reserved1; /* 0x0c */
+ u32 tcr; /* 0x0c */
u32 rxgmask; /* 0x10 */
u32 rx14mask; /* 0x14 */
u32 rx15mask; /* 0x18 */
@@ -225,7 +225,11 @@ struct flexcan_regs {
u32 crcr; /* 0x44 */
u32 rxfgmask; /* 0x48 */
u32 rxfir; /* 0x4c */
- u32 _reserved3[12]; /* 0x50 */
+ u32 cbt; /* 0x50 */
+ u32 _reserved2; /* 0x54 */
+ u32 dbg1; /* 0x58 */
+ u32 dbg2; /* 0x5c */
+ u32 _reserved3[8]; /* 0x60 */
u8 mb[2][512]; /* 0x80 */
/* FIFO-mode:
* MB
@@ -250,8 +254,14 @@ struct flexcan_regs {
u32 rerrdr; /* 0xaf4 */
u32 rerrsynr; /* 0xaf8 */
u32 errsr; /* 0xafc */
+ u32 _reserved7[64]; /* 0xb00 */
+ u32 fdctrl; /* 0xc00 */
+ u32 fdcbt; /* 0xc04 */
+ u32 fdcrc; /* 0xc08 */
};
+static_assert(sizeof(struct flexcan_regs) == 0x4 + 0xc08);
+
struct flexcan_devtype_data {
u32 quirks; /* quirks needed for different IP cores */
};
--
2.26.2