From: Parav Pandit <parav@mellanox.com>
Date: Sun, 8 Mar 2020 21:41:22 -0500
Subject: net/mlx5: Read embedded cpu bit only once
Patch-mainline: v5.8-rc1
Git-commit: c89da067a2e4d0f94f0f314c2918dca50348789c
References: jsc#SLE-15172
Embedded CPU bit doesn't change with PCI resume/suspend.
Hence read it only once while probing the PCI device.
Signed-off-by: Parav Pandit <parav@mellanox.com>
Reviewed-by: Bodong Wang <bodong@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Acked-by: Thomas Bogendoerfer <tbogendoerfer@suse.de>
---
drivers/net/ethernet/mellanox/mlx5/core/main.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -782,7 +782,7 @@ static int mlx5_pci_init(struct mlx5_cor
}
mlx5_pci_vsc_init(dev);
-
+ dev->caps.embedded_cpu = mlx5_read_embedded_cpu(dev);
return 0;
err_clr_master:
@@ -1184,7 +1184,6 @@ int mlx5_load_one(struct mlx5_core_dev *
{
int err = 0;
- dev->caps.embedded_cpu = mlx5_read_embedded_cpu(dev);
mutex_lock(&dev->intf_state_mutex);
if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
mlx5_core_warn(dev, "interface is up, NOP\n");