From 1dc0766c33473d61fd85caa5031daf34f719cd3f Mon Sep 17 00:00:00 2001
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Tue, 6 Jun 2017 13:30:37 -0700
Subject: [PATCH] drm/i915/cnl: Cannonlake has same MOCS table than Skylake.
Git-commit: 1dc0766c33473d61fd85caa5031daf34f719cd3f
Patch-mainline: v4.13-rc1
References: FATE#322643 bsc#1055900
All registers and default configuration are the same for Skylake
and Cannonlake.
V2: Don't apply Wa for platforms without MOCS. (Paulo)
V3: Removed WaDisableSkipCaching that Joonas noticed that
according to spec it is not applicable to CNL.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-8-git-send-email-rodrigo.vivi@intel.com
Acked-by: Takashi Iwai <tiwai@suse.de>
---
drivers/gpu/drm/i915/intel_mocs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/gpu/drm/i915/intel_mocs.c
+++ b/drivers/gpu/drm/i915/intel_mocs.c
@@ -178,7 +178,7 @@ static bool get_mocs_settings(struct drm
{
bool result = false;
- if (IS_GEN9_BC(dev_priv)) {
+ if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {
table->size = ARRAY_SIZE(skylake_mocs_table);
table->table = skylake_mocs_table;
result = true;