From: Martin Fuzzey <martin.fuzzey@flowbird.group>
Date: Wed, 23 Oct 2019 11:44:24 +0200
Subject: net: phy: smsc: LAN8740: add PHY_RST_AFTER_CLK_EN flag
Git-commit: 76db2d466f6a929a04775f0f87d837e3bcba44e8
Patch-mainline: 5.4-rc6
References: bnc#1151927 5.3.11
The LAN8740, like the 8720, also requires a reset after enabling clock.
The datasheet [1] 3.8.5.1 says:
"During a Hardware reset, an external clock must be supplied
to the XTAL1/CLKIN signal."
I have observed this issue on a custom i.MX6 based board with
the LAN8740A.
[1] http://ww1.microchip.com/downloads/en/DeviceDoc/8740a.pdf
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
---
drivers/net/phy/smsc.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/net/phy/smsc.c
+++ b/drivers/net/phy/smsc.c
@@ -327,6 +327,7 @@ static struct phy_driver smsc_phy_driver
.name = "SMSC LAN8740",
/* PHY_BASIC_FEATURES */
+ .flags = PHY_RST_AFTER_CLK_EN,
.probe = smsc_phy_probe,