From: Rex Zhu <Rex.Zhu@amd.com>
Date: Fri, 9 Feb 2018 16:47:53 +0800
Subject: drm/amd/pp: Fix bug that dpm level was not really locked
Git-commit: a02497b73218f10f237d98fb10d34d0baed607a0
Patch-mainline: v4.17-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Lock the dpm levels when we use SW method to modify
the dpm tables directly to avoid a possible race
with the smu.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4643,20 +4643,26 @@ static int smu7_set_power_profile_state(
if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_AUTO)
return -EINVAL;
- tmp_result = smu7_freeze_sclk_mclk_dpm(hwmgr);
- PP_ASSERT_WITH_CODE(!tmp_result,
- "Failed to freeze SCLK MCLK DPM!",
- result = tmp_result);
+ if (smum_is_dpm_running(hwmgr)) {
+ if (!data->sclk_dpm_key_disabled)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel);
+
+ if (!data->mclk_dpm_key_disabled)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel);
+ }
tmp_result = smum_populate_requested_graphic_levels(hwmgr, request);
PP_ASSERT_WITH_CODE(!tmp_result,
"Failed to populate requested graphic levels!",
result = tmp_result);
- tmp_result = smu7_unfreeze_sclk_mclk_dpm(hwmgr);
- PP_ASSERT_WITH_CODE(!tmp_result,
- "Failed to unfreeze SCLK MCLK DPM!",
- result = tmp_result);
+ if (smum_is_dpm_running(hwmgr)) {
+ if (!data->sclk_dpm_key_disabled)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel);
+
+ if (!data->mclk_dpm_key_disabled)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel);
+ }
smu7_find_min_clock_masks(hwmgr, &sclk_mask, &mclk_mask,
request->min_sclk, request->min_mclk);