From: Kurt Kanzenbach <kurt@linutronix.de>
Date: Mon, 13 Aug 2018 09:18:45 +0200
Subject: mtd: rawnand: fsl_ifc: check result of SRAM initialization
Git-commit: 434655af6a187129d8114640443b27d2cecfb979
Patch-mainline: v4.20-rc1
References: fate#326530,fate#326531,fate#326535,fate#326538,fate#326539
The SRAM initialization might fail. If that happens further NAND operations
won't be successful. Therefore, the chip init routine should fail if the SRAM
initialization didn't work.
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
---
drivers/mtd/nand/fsl_ifc_nand.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -753,7 +753,7 @@ static int fsl_ifc_chip_init_tail(struct
return 0;
}
-static void fsl_ifc_sram_init(struct fsl_ifc_mtd *priv)
+static int fsl_ifc_sram_init(struct fsl_ifc_mtd *priv)
{
struct fsl_ifc_ctrl *ctrl = priv->ctrl;
struct fsl_ifc_runtime __iomem *ifc_runtime = ctrl->rregs;
@@ -797,12 +797,16 @@ static void fsl_ifc_sram_init(struct fsl
wait_event_timeout(ctrl->nand_wait, ctrl->nand_stat,
msecs_to_jiffies(IFC_TIMEOUT_MSECS));
- if (ctrl->nand_stat != IFC_NAND_EVTER_STAT_OPC)
+ if (ctrl->nand_stat != IFC_NAND_EVTER_STAT_OPC) {
printk(KERN_ERR "fsl-ifc: Failed to Initialise SRAM\n");
+ return -ETIMEDOUT;
+ }
/* Restore CSOR and CSOR_ext */
ifc_out32(csor, &ifc_global->csor_cs[cs].csor);
ifc_out32(csor_ext, &ifc_global->csor_cs[cs].csor_ext);
+
+ return 0;
}
static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
@@ -904,8 +908,13 @@ static int fsl_ifc_chip_init(struct fsl_
chip->ecc.algo = NAND_ECC_HAMMING;
}
- if (ctrl->version == FSL_IFC_VERSION_1_1_0)
- fsl_ifc_sram_init(priv);
+ if (ctrl->version >= FSL_IFC_VERSION_1_1_0) {
+ int ret;
+
+ ret = fsl_ifc_sram_init(priv);
+ if (ret)
+ return ret;
+ }
/*
* As IFC version 2.0.0 has 16KB of internal SRAM as compared to older