From: Huang Rui <ray.huang@amd.com>
Date: Thu, 20 Apr 2017 10:18:13 +0800
Subject: drm/amdgpu: enable sw clock gating for vcn
Git-commit: d2a33871b54cd4ec34e33e5560e34a6ef3a993bf
Patch-mainline: v4.13-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -501,7 +501,7 @@ static int vcn_v1_0_start(struct amdgpu_
vcn_v1_0_mc_resume(adev);
/* disable clock gating */
- vcn_v1_0_disable_clock_gating(adev, false);
+ vcn_v1_0_disable_clock_gating(adev, true);
/* disable interupt */
WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0,
@@ -682,7 +682,7 @@ static int vcn_v1_0_stop(struct amdgpu_d
~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
/* enable clock gating */
- vcn_v1_0_enable_clock_gating(adev, false);
+ vcn_v1_0_enable_clock_gating(adev, true);
return 0;
}