From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Date: Fri, 13 Oct 2017 12:53:38 -0400
Subject: drm/amd/display: change dml numdpp var to uint
Git-commit: f63d89066fb29a47ad3e9530214de7ea87e82e57
Patch-mainline: v4.15-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 14 +++++++-------
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 2 +-
2 files changed, 8 insertions(+), 8 deletions(-)
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -1158,7 +1158,7 @@ static bool CalculatePrefetchSchedule(
else if (PageTableLevels == 3)
*Tno_bw = UrgentExtraLatency;
else
- Tno_bw = 0;
+ *Tno_bw = 0;
} else if (DCCEnable)
*Tno_bw = LineTime;
else
@@ -4721,14 +4721,14 @@ static void ModeSupportAndSystemConfigur
&& mode_lib->vba.SwathWidthYSingleDPP[k]
<= mode_lib->vba.MaximumSwathWidth[k]
&& mode_lib->vba.ODMCombineEnablePerState[i][k] == false) {
- mode_lib->vba.NoOfDPP[i][k] = 1.0;
+ mode_lib->vba.NoOfDPP[i][k] = 1;
mode_lib->vba.RequiredDPPCLK[i][k] =
mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
* (1.0
+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
/ 100.0);
} else {
- mode_lib->vba.NoOfDPP[i][k] = 2.0;
+ mode_lib->vba.NoOfDPP[i][k] = 2;
mode_lib->vba.RequiredDPPCLK[i][k] =
mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
* (1.0
@@ -4790,14 +4790,14 @@ static void ModeSupportAndSystemConfigur
<= mode_lib->vba.MaximumSwathWidth[k]
&& mode_lib->vba.ODMCombineEnablePerState[i][k]
== false) {
- mode_lib->vba.NoOfDPP[i][k] = 1.0;
+ mode_lib->vba.NoOfDPP[i][k] = 1;
mode_lib->vba.RequiredDPPCLK[i][k] =
mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
* (1.0
+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
/ 100.0);
} else {
- mode_lib->vba.NoOfDPP[i][k] = 2.0;
+ mode_lib->vba.NoOfDPP[i][k] = 2;
mode_lib->vba.RequiredDPPCLK[i][k] =
mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
* (1.0
@@ -4833,14 +4833,14 @@ static void ModeSupportAndSystemConfigur
mode_lib->vba.ODMCombineEnablePerState[i][k] = false;
if (mode_lib->vba.SwathWidthYSingleDPP[k]
<= mode_lib->vba.MaximumSwathWidth[k]) {
- mode_lib->vba.NoOfDPP[i][k] = 1.0;
+ mode_lib->vba.NoOfDPP[i][k] = 1;
mode_lib->vba.RequiredDPPCLK[i][k] =
mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
* (1.0
+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading
/ 100.0);
} else {
- mode_lib->vba.NoOfDPP[i][k] = 2.0;
+ mode_lib->vba.NoOfDPP[i][k] = 2;
mode_lib->vba.RequiredDPPCLK[i][k] =
mode_lib->vba.MinDPPCLKUsingSingleDPP[k]
* (1.0
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -489,7 +489,7 @@ struct vba_vars_st {
double CursorBufferSize;
double CursorChunkSize;
unsigned int Mode;
- double NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
+ unsigned int NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double OutputLinkDPLanes[DC__NUM_DPP__MAX];
double SwathWidthYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double SwathHeightYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];