From: Ben Skeggs <bskeggs@redhat.com>
Date: Tue, 8 May 2018 20:39:46 +1000
Subject: drm/nouveau/disp/nv50-: fetch mask of available sors during oneinit
Git-commit: 9fe4e177045f4b5af25d25859e30450ff1f18be9
Patch-mainline: v4.18-rc1
References: FATE#326289 FATE#326079 FATE#326049 FATE#322398 FATE#326166
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Petr Tesarik <ptesarik@suse.com>
---
drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h | 10 ++++++++--
drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c | 7 +++++--
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h | 9 +++------
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg84.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c | 10 +++++++++-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c | 19 +++++++++----------
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp77.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c | 2 +-
drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c | 19 +++++++++----------
28 files changed, 65 insertions(+), 53 deletions(-)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c
@@ -34,7 +34,7 @@ g84_disp = {
.root = &g84_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 2, .new = g84_sor_new },
+ .sor = { .cnt = nv50_sor_cnt, .new = g84_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c
@@ -34,7 +34,7 @@ g94_disp = {
.root = &g94_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 4, .new = g94_sor_new },
+ .sor = { .cnt = g94_sor_cnt, .new = g94_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
@@ -173,7 +173,7 @@ gf119_disp = {
.root = &gf119_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
- .sor = { .nr = 4, .new = gf119_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gf119_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
@@ -35,7 +35,7 @@ gk104_disp = {
.root = &gk104_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
- .sor = { .nr = 4, .new = gk104_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c
@@ -35,7 +35,7 @@ gk110_disp = {
.root = &gk110_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
- .sor = { .nr = 4, .new = gk104_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
@@ -35,7 +35,7 @@ gm107_disp = {
.root = &gm107_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
- .sor = { .nr = 4, .new = gm107_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gm107_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
@@ -35,7 +35,7 @@ gm200_disp = {
.root = &gm200_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
.dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new },
- .sor = { .nr = 4, .new = gm200_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gm200_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
@@ -34,7 +34,7 @@ gp100_disp = {
.super = gf119_disp_super,
.root = &gp100_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
- .sor = { .nr = 4, .new = gm200_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gm200_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
@@ -60,7 +60,7 @@ gp102_disp = {
.super = gf119_disp_super,
.root = &gp102_disp_root_oclass,
.head = { .cnt = gf119_head_cnt, .new = gf119_head_new },
- .sor = { .nr = 4, .new = gm200_sor_new },
+ .sor = { .cnt = gf119_sor_cnt, .new = gm200_sor_new },
};
int
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c
@@ -34,7 +34,7 @@ gt200_disp = {
.root = >200_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 2, .new = g84_sor_new },
+ .sor = { .cnt = nv50_sor_cnt, .new = g84_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
@@ -34,7 +34,7 @@ gt215_disp = {
.root = >215_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 4, .new = gt215_sor_new },
+ .sor = { .cnt = g94_sor_cnt, .new = gt215_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h
@@ -105,7 +105,6 @@ nv50_sor_link(struct nvkm_ior *ior)
return nv50_ior_base(ior) + ((ior->asy.link == 2) * 0x80);
}
-int nv50_sor_new_(const struct nvkm_ior_func *, struct nvkm_disp *, int id);
void nv50_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
void nv50_sor_power(struct nvkm_ior *, bool, bool, bool, bool, bool);
void nv50_sor_clock(struct nvkm_ior *);
@@ -121,7 +120,6 @@ void g94_sor_dp_watermark(struct nvkm_io
void gt215_sor_dp_audio(struct nvkm_ior *, int, bool);
-int gf119_sor_new_(const struct nvkm_ior_func *, struct nvkm_disp *, int id);
void gf119_sor_state(struct nvkm_ior *, struct nvkm_ior_state *);
void gf119_sor_clock(struct nvkm_ior *);
int gf119_sor_dp_links(struct nvkm_ior *, struct nvkm_i2c_aux *);
@@ -160,13 +158,21 @@ int gf119_dac_new(struct nvkm_disp *, in
int nv50_pior_new(struct nvkm_disp *, int);
+int nv50_sor_cnt(struct nvkm_disp *, unsigned long *);
int nv50_sor_new(struct nvkm_disp *, int);
+
int g84_sor_new(struct nvkm_disp *, int);
+
+int g94_sor_cnt(struct nvkm_disp *, unsigned long *);
int g94_sor_new(struct nvkm_disp *, int);
+
int mcp77_sor_new(struct nvkm_disp *, int);
int gt215_sor_new(struct nvkm_disp *, int);
int mcp89_sor_new(struct nvkm_disp *, int);
+
+int gf119_sor_cnt(struct nvkm_disp *, unsigned long *);
int gf119_sor_new(struct nvkm_disp *, int);
+
int gk104_sor_new(struct nvkm_disp *, int);
int gm107_sor_new(struct nvkm_disp *, int);
int gm200_sor_new(struct nvkm_disp *, int);
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c
@@ -32,7 +32,7 @@ mcp77_disp = {
.root = &g94_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 4, .new = mcp77_sor_new },
+ .sor = { .cnt = g94_sor_cnt, .new = mcp77_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
@@ -32,7 +32,7 @@ mcp89_disp = {
.root = >215_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 4, .new = mcp89_sor_new },
+ .sor = { .cnt = g94_sor_cnt, .new = mcp89_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
@@ -93,7 +93,10 @@ nv50_disp_oneinit_(struct nvkm_disp *bas
return ret;
}
- for (i = 0; func->sor.new && i < func->sor.nr; i++) {
+ disp->sor.nr = func->sor.cnt(&disp->base, &disp->sor.mask);
+ nvkm_debug(subdev, " SOR(s): %d (%02lx)\n",
+ disp->sor.nr, disp->sor.mask);
+ for_each_set_bit(i, &disp->sor.mask, disp->sor.nr) {
ret = func->sor.new(&disp->base, i);
if (ret)
return ret;
@@ -643,7 +646,7 @@ nv50_disp = {
.root = &nv50_disp_root_oclass,
.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
- .sor = { .nr = 2, .new = nv50_sor_new },
+ .sor = { .cnt = nv50_sor_cnt, .new = nv50_sor_new },
.pior = { .nr = 3, .new = nv50_pior_new },
};
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
@@ -20,6 +20,8 @@ struct nv50_disp {
} head, dac;
struct {
+ unsigned long mask;
+ int nr;
u32 lvdsconf;
} sor;
@@ -52,12 +54,7 @@ struct nv50_disp_func {
struct {
int (*cnt)(struct nvkm_disp *, unsigned long *mask);
int (*new)(struct nvkm_disp *, int id);
- } head, dac;
-
- struct {
- int nr;
- int (*new)(struct nvkm_disp *, int id);
- } sor;
+ } head, dac, sor;
struct {
int nr;
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgf119.c
@@ -70,7 +70,7 @@ gf119_disp_root_init(struct nv50_disp_ro
}
/* ... SOR caps */
- for (i = 0; i < disp->func->sor.nr; i++) {
+ for (i = 0; i < disp->sor.nr; i++) {
tmp = nvkm_rd32(device, 0x61c000 + (i * 0x800));
nvkm_wr32(device, 0x6301c4 + (i * 0x800), tmp);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
@@ -433,7 +433,7 @@ nv50_disp_root_init(struct nv50_disp_roo
}
/* ... SOR caps */
- for (i = 0; i < disp->func->sor.nr; i++) {
+ for (i = 0; i < disp->sor.nr; i++) {
tmp = nvkm_rd32(device, 0x61c000 + (i * 0x800));
nvkm_wr32(device, 0x6101e0 + (i * 0x04), tmp);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg84.c
@@ -34,5 +34,5 @@ g84_sor = {
int
g84_sor_new(struct nvkm_disp *disp, int id)
{
- return nv50_sor_new_(&g84_sor, disp, id);
+ return nvkm_ior_new_(&g84_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorg94.c
@@ -279,5 +279,13 @@ g94_sor = {
int
g94_sor_new(struct nvkm_disp *disp, int id)
{
- return nv50_sor_new_(&g94_sor, disp, id);
+ return nvkm_ior_new_(&g94_sor, disp, SOR, id);
+}
+
+int
+g94_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
+{
+ struct nvkm_device *device = disp->engine.subdev.device;
+ *pmask = (nvkm_rd32(device, 0x610184) & 0x0f000000) >> 24;
+ return 4;
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c
@@ -152,15 +152,6 @@ gf119_sor_state(struct nvkm_ior *sor, st
state->head = ctrl & 0x0000000f;
}
-int
-gf119_sor_new_(const struct nvkm_ior_func *func, struct nvkm_disp *disp, int id)
-{
- struct nvkm_device *device = disp->engine.subdev.device;
- if (!(nvkm_rd32(device, 0x612004) & (0x00000100 << id)))
- return 0;
- return nvkm_ior_new_(func, disp, SOR, id);
-}
-
static const struct nvkm_ior_func
gf119_sor = {
.state = gf119_sor_state,
@@ -189,5 +180,13 @@ gf119_sor = {
int
gf119_sor_new(struct nvkm_disp *disp, int id)
{
- return gf119_sor_new_(&gf119_sor, disp, id);
+ return nvkm_ior_new_(&gf119_sor, disp, SOR, id);
+}
+
+int
+gf119_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
+{
+ struct nvkm_device *device = disp->engine.subdev.device;
+ *pmask = (nvkm_rd32(device, 0x612004) & 0x0000ff00) >> 8;
+ return 8;
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgk104.c
@@ -49,5 +49,5 @@ gk104_sor = {
int
gk104_sor_new(struct nvkm_disp *disp, int id)
{
- return gf119_sor_new_(&gk104_sor, disp, id);
+ return nvkm_ior_new_(&gk104_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c
@@ -63,5 +63,5 @@ gm107_sor = {
int
gm107_sor_new(struct nvkm_disp *disp, int id)
{
- return gf119_sor_new_(&gm107_sor, disp, id);
+ return nvkm_ior_new_(&gm107_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c
@@ -120,5 +120,5 @@ gm200_sor = {
int
gm200_sor_new(struct nvkm_disp *disp, int id)
{
- return gf119_sor_new_(&gm200_sor, disp, id);
+ return nvkm_ior_new_(&gm200_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgt215.c
@@ -65,5 +65,5 @@ gt215_sor = {
int
gt215_sor_new(struct nvkm_disp *disp, int id)
{
- return nv50_sor_new_(>215_sor, disp, id);
+ return nvkm_ior_new_(>215_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp77.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp77.c
@@ -44,5 +44,5 @@ mcp77_sor = {
int
mcp77_sor_new(struct nvkm_disp *disp, int id)
{
- return nv50_sor_new_(&mcp77_sor, disp, id);
+ return nvkm_ior_new_(&mcp77_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sormcp89.c
@@ -49,5 +49,5 @@ mcp89_sor = {
int
mcp89_sor_new(struct nvkm_disp *disp, int id)
{
- return nv50_sor_new_(&mcp89_sor, disp, id);
+ return nvkm_ior_new_(&mcp89_sor, disp, SOR, id);
}
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/sornv50.c
@@ -84,15 +84,6 @@ nv50_sor_state(struct nvkm_ior *sor, str
state->head = ctrl & 0x00000003;
}
-int
-nv50_sor_new_(const struct nvkm_ior_func *func, struct nvkm_disp *disp, int id)
-{
- struct nvkm_device *device = disp->engine.subdev.device;
- if (!(nvkm_rd32(device, 0x610184) & (0x01000000 << id)))
- return 0;
- return nvkm_ior_new_(func, disp, SOR, id);
-}
-
static const struct nvkm_ior_func
nv50_sor = {
.state = nv50_sor_state,
@@ -103,5 +94,13 @@ nv50_sor = {
int
nv50_sor_new(struct nvkm_disp *disp, int id)
{
- return nv50_sor_new_(&nv50_sor, disp, id);
+ return nvkm_ior_new_(&nv50_sor, disp, SOR, id);
+}
+
+int
+nv50_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
+{
+ struct nvkm_device *device = disp->engine.subdev.device;
+ *pmask = (nvkm_rd32(device, 0x610184) & 0x03000000) >> 24;
+ return 2;
}