From a46fcff13f555b479eb3b0e21b59744d762b1cd2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
Date: Mon, 20 Jan 2020 19:47:28 +0200
Subject: drm/i915: Store active_pipes bitmask in cdclk state
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Git-commit: 0c2d55128f3397dac62539a5e215315edf64ac84
Patch-mainline: v5.7-rc1
References: jsc#SLE-12680, jsc#SLE-12880, jsc#SLE-12882, jsc#SLE-12883, jsc#SLE-13496, jsc#SLE-15322
Let's add a copy of the active_pipes bitmask into the cdclk_state.
While this is duplicating a bit of information we may already
have elsewhere, I think it's worth it to decopule the cdclk stuff
from whatever else wants to use that bitmask. Also we want to get
rid of all the old ad-hoc global state which is what the current
bitmask is, so this removes one obstacle.
The one extra thing we have to remember is write locking the cdclk
state whenever the bitmask changes.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-19-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 20 +++++++++++---------
drivers/gpu/drm/i915/display/intel_cdclk.h | 3 +++
drivers/gpu/drm/i915/display/intel_display.c | 8 +++++---
3 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index b576de54931e..7154a2288310 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2142,7 +2142,7 @@ static int vlv_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
cdclk_state->logical.voltage_level =
vlv_calc_voltage_level(dev_priv, cdclk);
- if (!state->active_pipes) {
+ if (!cdclk_state->active_pipes) {
cdclk = vlv_calc_cdclk(dev_priv, cdclk_state->force_min_cdclk);
cdclk_state->actual.cdclk = cdclk;
@@ -2157,7 +2157,6 @@ static int vlv_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
static int bdw_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
{
- struct intel_atomic_state *state = cdclk_state->base.state;
int min_cdclk, cdclk;
min_cdclk = intel_compute_min_cdclk(cdclk_state);
@@ -2174,7 +2173,7 @@ static int bdw_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
cdclk_state->logical.voltage_level =
bdw_calc_voltage_level(cdclk);
- if (!state->active_pipes) {
+ if (!cdclk_state->active_pipes) {
cdclk = bdw_calc_cdclk(cdclk_state->force_min_cdclk);
cdclk_state->actual.cdclk = cdclk;
@@ -2226,7 +2225,6 @@ static int skl_dpll0_vco(struct intel_cdclk_state *cdclk_state)
static int skl_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
{
- struct intel_atomic_state *state = cdclk_state->base.state;
int min_cdclk, cdclk, vco;
min_cdclk = intel_compute_min_cdclk(cdclk_state);
@@ -2246,7 +2244,7 @@ static int skl_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
cdclk_state->logical.voltage_level =
skl_calc_voltage_level(cdclk);
- if (!state->active_pipes) {
+ if (!cdclk_state->active_pipes) {
cdclk = skl_calc_cdclk(cdclk_state->force_min_cdclk, vco);
cdclk_state->actual.vco = vco;
@@ -2283,7 +2281,7 @@ static int bxt_modeset_calc_cdclk(struct intel_cdclk_state *cdclk_state)
max_t(int, min_voltage_level,
dev_priv->display.calc_voltage_level(cdclk));
- if (!state->active_pipes) {
+ if (!cdclk_state->active_pipes) {
cdclk = bxt_calc_cdclk(dev_priv, cdclk_state->force_min_cdclk);
vco = bxt_calc_cdclk_pll_vco(dev_priv, cdclk);
@@ -2419,6 +2417,9 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
old_cdclk_state = intel_atomic_get_old_cdclk_state(state);
+ new_cdclk_state->active_pipes =
+ intel_calc_active_pipes(state, old_cdclk_state->active_pipes);
+
ret = dev_priv->display.modeset_calc_cdclk(new_cdclk_state);
if (ret)
return ret;
@@ -2432,7 +2433,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
ret = intel_atomic_serialize_global_state(&new_cdclk_state->base);
if (ret)
return ret;
- } else if (intel_cdclk_changed(&old_cdclk_state->logical,
+ } else if (old_cdclk_state->active_pipes != new_cdclk_state->active_pipes ||
+ intel_cdclk_changed(&old_cdclk_state->logical,
&new_cdclk_state->logical)) {
ret = intel_atomic_lock_global_state(&new_cdclk_state->base);
if (ret)
@@ -2441,14 +2443,14 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
return 0;
}
- if (is_power_of_2(state->active_pipes) &&
+ if (is_power_of_2(new_cdclk_state->active_pipes) &&
intel_cdclk_can_cd2x_update(dev_priv,
&old_cdclk_state->actual,
&new_cdclk_state->actual)) {
struct intel_crtc *crtc;
struct intel_crtc_state *crtc_state;
- pipe = ilog2(state->active_pipes);
+ pipe = ilog2(new_cdclk_state->active_pipes);
crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 195fca70bfcb..df21dbdcc575 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -50,6 +50,9 @@ struct intel_cdclk_state {
/* forced minimum cdclk for glk+ audio w/a */
int force_min_cdclk;
bool force_min_cdclk_changed;
+
+ /* bitmask of active pipes */
+ u8 active_pipes;
};
int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 25e0ac780958..458cd6ce5c84 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7603,6 +7603,7 @@ static void intel_crtc_disable_noatomic(struct intel_crtc *crtc,
dev_priv->active_pipes &= ~BIT(pipe);
cdclk_state->min_cdclk[pipe] = 0;
cdclk_state->min_voltage_level[pipe] = 0;
+ cdclk_state->active_pipes &= ~BIT(pipe);
bw_state->data_rate[pipe] = 0;
bw_state->num_active_planes[pipe] = 0;
@@ -18392,10 +18393,9 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
struct intel_encoder *encoder;
struct intel_connector *connector;
struct drm_connector_list_iter conn_iter;
+ u8 active_pipes = 0;
int i;
- dev_priv->active_pipes = 0;
-
for_each_intel_crtc(dev, crtc) {
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
@@ -18411,7 +18411,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
crtc->active = crtc_state->hw.active;
if (crtc_state->hw.active)
- dev_priv->active_pipes |= BIT(crtc->pipe);
+ active_pipes |= BIT(crtc->pipe);
drm_dbg_kms(&dev_priv->drm,
"[CRTC:%d:%s] hw state readout: %s\n",
@@ -18419,6 +18419,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
enableddisabled(crtc_state->hw.active));
}
+ dev_priv->active_pipes = cdclk_state->active_pipes = active_pipes;
+
readout_plane_state(dev_priv);
for (i = 0; i < dev_priv->num_shared_dpll; i++) {
--
2.28.0