From 70ce3ccdf27473d30b3720d12fcb5e7e1fbddd46 Mon Sep 17 00:00:00 2001
From: Imre Deak <imre.deak@intel.com>
Date: Wed, 26 Feb 2020 22:34:54 +0200
Subject: drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading
out again
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Git-commit: 540a8b6b0eb7492cfa452fe99814c198c2c92e06
Patch-mainline: v5.7-rc1
References: jsc#SLE-12680, jsc#SLE-12880, jsc#SLE-12882, jsc#SLE-12883, jsc#SLE-13496, jsc#SLE-15322
Instead of reading out the WRPLL/SPLL control values from HW, we can use
the DPLL state that was already read out, or swapped-to.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200226203455.23032-13-imre.deak@intel.com
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index b87b4ff5de52..7e6da58a47c9 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -880,13 +880,10 @@ hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
static int hsw_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv,
const struct intel_shared_dpll *pll)
{
- i915_reg_t reg = pll->info->id == DPLL_ID_WRPLL1 ?
- WRPLL_CTL(0) : WRPLL_CTL(1);
int refclk;
int n, p, r;
- u32 wrpll;
+ u32 wrpll = pll->state.hw_state.wrpll;
- wrpll = intel_de_read(dev_priv, reg);
switch (wrpll & WRPLL_REF_MASK) {
case WRPLL_REF_SPECIAL_HSW:
/*
@@ -1003,7 +1000,7 @@ static int hsw_ddi_spll_get_freq(struct drm_i915_private *i915,
{
int link_clock = 0;
- switch (intel_de_read(i915, SPLL_CTL) & SPLL_FREQ_MASK) {
+ switch (pll->state.hw_state.spll & SPLL_FREQ_MASK) {
case SPLL_FREQ_810MHz:
link_clock = 81000;
break;
--
2.28.0