From fd6cac67185ae4707dc1f1f344b8cdf688596b7a Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Mon, 20 Jul 2020 07:59:22 +1000
Subject: drm/nouveau/fbcon/nv50-: use NVIDIA's headers for accel_init()
Git-commit: 5755b1eac0192fb50b69cd40e48078907628f915
Patch-mainline: v5.9-rc1
References: jsc#SLE-12680, jsc#SLE-12880, jsc#SLE-12882, jsc#SLE-12883, jsc#SLE-13496, jsc#SLE-15322
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Patrik Jakobsson <pjakobsson@suse.de>
---
.../drm/nouveau/include/nvhw/class/cl502d.h | 337 +++++++++++++++++
.../drm/nouveau/include/nvhw/class/cl902d.h | 357 ++++++++++++++++++
drivers/gpu/drm/nouveau/nv50_fbcon.c | 145 ++++---
drivers/gpu/drm/nouveau/nvc0_fbcon.c | 139 ++++---
4 files changed, 879 insertions(+), 99 deletions(-)
create mode 100644 drivers/gpu/drm/nouveau/include/nvhw/class/cl502d.h
create mode 100644 drivers/gpu/drm/nouveau/include/nvhw/class/cl902d.h
diff --git a/drivers/gpu/drm/nouveau/include/nvhw/class/cl502d.h b/drivers/gpu/drm/nouveau/include/nvhw/class/cl502d.h
new file mode 100644
index 000000000000..47fe91b67e74
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvhw/class/cl502d.h
@@ -0,0 +1,337 @@
+/*
+ * Copyright (c) 2003 - 2004, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _cl_nv50_twod_h_
+#define _cl_nv50_twod_h_
+
+#define NV502D_SET_OBJECT 0x0000
+#define NV502D_SET_OBJECT_POINTER 15:0
+
+#define NV502D_WAIT_FOR_IDLE 0x0110
+#define NV502D_WAIT_FOR_IDLE_V 31:0
+
+#define NV502D_SET_DST_CONTEXT_DMA 0x0184
+#define NV502D_SET_DST_CONTEXT_DMA_HANDLE 31:0
+
+#define NV502D_SET_SRC_CONTEXT_DMA 0x0188
+#define NV502D_SET_SRC_CONTEXT_DMA_HANDLE 31:0
+
+#define NV502D_SET_SEMAPHORE_CONTEXT_DMA 0x018c
+#define NV502D_SET_SEMAPHORE_CONTEXT_DMA_HANDLE 31:0
+
+#define NV502D_SET_DST_FORMAT 0x0200
+#define NV502D_SET_DST_FORMAT_V 7:0
+#define NV502D_SET_DST_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV502D_SET_DST_FORMAT_V_A8RL8GL8BL8 0x000000D0
+#define NV502D_SET_DST_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV502D_SET_DST_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV502D_SET_DST_FORMAT_V_A8BL8GL8RL8 0x000000D6
+#define NV502D_SET_DST_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV502D_SET_DST_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV502D_SET_DST_FORMAT_V_X8RL8GL8BL8 0x000000E7
+#define NV502D_SET_DST_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV502D_SET_DST_FORMAT_V_X8BL8GL8RL8 0x000000FA
+#define NV502D_SET_DST_FORMAT_V_R5G6B5 0x000000E8
+#define NV502D_SET_DST_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV502D_SET_DST_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV502D_SET_DST_FORMAT_V_Y8 0x000000F3
+#define NV502D_SET_DST_FORMAT_V_Y16 0x000000EE
+#define NV502D_SET_DST_FORMAT_V_Y32 0x000000FF
+#define NV502D_SET_DST_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV502D_SET_DST_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV502D_SET_DST_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV502D_SET_DST_FORMAT_V_O8R8G8B8 0x000000FE
+#define NV502D_SET_DST_FORMAT_V_Y1_8X8 0x0000001C
+#define NV502D_SET_DST_FORMAT_V_RF16 0x000000F2
+#define NV502D_SET_DST_FORMAT_V_RF32 0x000000E5
+#define NV502D_SET_DST_FORMAT_V_RF32_GF32 0x000000CB
+#define NV502D_SET_DST_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA
+#define NV502D_SET_DST_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE
+#define NV502D_SET_DST_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0
+#define NV502D_SET_DST_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3
+
+#define NV502D_SET_DST_MEMORY_LAYOUT 0x0204
+#define NV502D_SET_DST_MEMORY_LAYOUT_V 0:0
+#define NV502D_SET_DST_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
+#define NV502D_SET_DST_MEMORY_LAYOUT_V_PITCH 0x00000001
+
+#define NV502D_SET_DST_PITCH 0x0214
+#define NV502D_SET_DST_PITCH_V 31:0
+
+#define NV502D_SET_DST_WIDTH 0x0218
+#define NV502D_SET_DST_WIDTH_V 31:0
+
+#define NV502D_SET_DST_HEIGHT 0x021c
+#define NV502D_SET_DST_HEIGHT_V 31:0
+
+#define NV502D_SET_DST_OFFSET_UPPER 0x0220
+#define NV502D_SET_DST_OFFSET_UPPER_V 7:0
+
+#define NV502D_SET_DST_OFFSET_LOWER 0x0224
+#define NV502D_SET_DST_OFFSET_LOWER_V 31:0
+
+#define NV502D_SET_SRC_FORMAT 0x0230
+#define NV502D_SET_SRC_FORMAT_V 7:0
+#define NV502D_SET_SRC_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV502D_SET_SRC_FORMAT_V_A8RL8GL8BL8 0x000000D0
+#define NV502D_SET_SRC_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV502D_SET_SRC_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV502D_SET_SRC_FORMAT_V_A8BL8GL8RL8 0x000000D6
+#define NV502D_SET_SRC_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV502D_SET_SRC_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV502D_SET_SRC_FORMAT_V_X8RL8GL8BL8 0x000000E7
+#define NV502D_SET_SRC_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV502D_SET_SRC_FORMAT_V_X8BL8GL8RL8 0x000000FA
+#define NV502D_SET_SRC_FORMAT_V_R5G6B5 0x000000E8
+#define NV502D_SET_SRC_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV502D_SET_SRC_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV502D_SET_SRC_FORMAT_V_Y8 0x000000F3
+#define NV502D_SET_SRC_FORMAT_V_AY8 0x0000001D
+#define NV502D_SET_SRC_FORMAT_V_Y16 0x000000EE
+#define NV502D_SET_SRC_FORMAT_V_Y32 0x000000FF
+#define NV502D_SET_SRC_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV502D_SET_SRC_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV502D_SET_SRC_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV502D_SET_SRC_FORMAT_V_O8R8G8B8 0x000000FE
+#define NV502D_SET_SRC_FORMAT_V_Y1_8X8 0x0000001C
+#define NV502D_SET_SRC_FORMAT_V_RF16 0x000000F2
+#define NV502D_SET_SRC_FORMAT_V_RF32 0x000000E5
+#define NV502D_SET_SRC_FORMAT_V_RF32_GF32 0x000000CB
+#define NV502D_SET_SRC_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA
+#define NV502D_SET_SRC_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE
+#define NV502D_SET_SRC_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0
+#define NV502D_SET_SRC_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3
+
+#define NV502D_SET_SRC_MEMORY_LAYOUT 0x0234
+#define NV502D_SET_SRC_MEMORY_LAYOUT_V 0:0
+#define NV502D_SET_SRC_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
+#define NV502D_SET_SRC_MEMORY_LAYOUT_V_PITCH 0x00000001
+
+#define NV502D_SET_SRC_PITCH 0x0244
+#define NV502D_SET_SRC_PITCH_V 31:0
+
+#define NV502D_SET_SRC_WIDTH 0x0248
+#define NV502D_SET_SRC_WIDTH_V 31:0
+
+#define NV502D_SET_SRC_HEIGHT 0x024c
+#define NV502D_SET_SRC_HEIGHT_V 31:0
+
+#define NV502D_SET_SRC_OFFSET_UPPER 0x0250
+#define NV502D_SET_SRC_OFFSET_UPPER_V 7:0
+
+#define NV502D_SET_SRC_OFFSET_LOWER 0x0254
+#define NV502D_SET_SRC_OFFSET_LOWER_V 31:0
+
+#define NV502D_SET_CLIP_ENABLE 0x0290
+#define NV502D_SET_CLIP_ENABLE_V 0:0
+#define NV502D_SET_CLIP_ENABLE_V_FALSE 0x00000000
+#define NV502D_SET_CLIP_ENABLE_V_TRUE 0x00000001
+
+#define NV502D_SET_ROP 0x02a0
+#define NV502D_SET_ROP_V 7:0
+
+#define NV502D_SET_OPERATION 0x02ac
+#define NV502D_SET_OPERATION_V 2:0
+#define NV502D_SET_OPERATION_V_SRCCOPY_AND 0x00000000
+#define NV502D_SET_OPERATION_V_ROP_AND 0x00000001
+#define NV502D_SET_OPERATION_V_BLEND_AND 0x00000002
+#define NV502D_SET_OPERATION_V_SRCCOPY 0x00000003
+#define NV502D_SET_OPERATION_V_ROP 0x00000004
+#define NV502D_SET_OPERATION_V_SRCCOPY_PREMULT 0x00000005
+#define NV502D_SET_OPERATION_V_BLEND_PREMULT 0x00000006
+
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT 0x02e8
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V 2:0
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8X8R5G6B5 0x00000000
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A1R5G5B5 0x00000001
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8R8G8B8 0x00000002
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8Y8 0x00000003
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8X8Y16 0x00000004
+#define NV502D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_Y32 0x00000005
+
+#define NV502D_SET_MONOCHROME_PATTERN_FORMAT 0x02ec
+#define NV502D_SET_MONOCHROME_PATTERN_FORMAT_V 0:0
+#define NV502D_SET_MONOCHROME_PATTERN_FORMAT_V_CGA6_M1 0x00000000
+#define NV502D_SET_MONOCHROME_PATTERN_FORMAT_V_LE_M1 0x00000001
+
+#define NV502D_RENDER_SOLID_PRIM_MODE 0x0580
+#define NV502D_RENDER_SOLID_PRIM_MODE_V 2:0
+#define NV502D_RENDER_SOLID_PRIM_MODE_V_POINTS 0x00000000
+#define NV502D_RENDER_SOLID_PRIM_MODE_V_LINES 0x00000001
+#define NV502D_RENDER_SOLID_PRIM_MODE_V_POLYLINE 0x00000002
+#define NV502D_RENDER_SOLID_PRIM_MODE_V_TRIANGLES 0x00000003
+#define NV502D_RENDER_SOLID_PRIM_MODE_V_RECTS 0x00000004
+
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT 0x0584
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V 7:0
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_R5G6B5 0x000000E8
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y8 0x000000F3
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y16 0x000000EE
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y32 0x000000FF
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_O8R8G8B8 0x000000FE
+
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR 0x0588
+#define NV502D_SET_RENDER_SOLID_PRIM_COLOR_V 31:0
+
+#define NV502D_RENDER_SOLID_PRIM_POINT_SET_X(j) (0x0600+(j)*8)
+#define NV502D_RENDER_SOLID_PRIM_POINT_SET_X_V 31:0
+
+#define NV502D_RENDER_SOLID_PRIM_POINT_Y(j) (0x0604+(j)*8)
+#define NV502D_RENDER_SOLID_PRIM_POINT_Y_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DATA_TYPE 0x0800
+#define NV502D_SET_PIXELS_FROM_CPU_DATA_TYPE_V 0:0
+#define NV502D_SET_PIXELS_FROM_CPU_DATA_TYPE_V_COLOR 0x00000000
+#define NV502D_SET_PIXELS_FROM_CPU_DATA_TYPE_V_INDEX 0x00000001
+
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT 0x0804
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V 7:0
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_R5G6B5 0x000000E8
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y8 0x000000F3
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y16 0x000000EE
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y32 0x000000FF
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_O8R8G8B8 0x000000FE
+
+#define NV502D_SET_PIXELS_FROM_CPU_INDEX_FORMAT 0x0808
+#define NV502D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V 1:0
+#define NV502D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I1 0x00000000
+#define NV502D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I4 0x00000001
+#define NV502D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I8 0x00000002
+
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_FORMAT 0x080c
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V 0:0
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V_CGA6_M1 0x00000000
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V_LE_M1 0x00000001
+
+#define NV502D_SET_PIXELS_FROM_CPU_WRAP 0x0810
+#define NV502D_SET_PIXELS_FROM_CPU_WRAP_V 1:0
+#define NV502D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_PIXEL 0x00000000
+#define NV502D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_BYTE 0x00000001
+#define NV502D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_DWORD 0x00000002
+
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR0 0x0814
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR0_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR1 0x0818
+#define NV502D_SET_PIXELS_FROM_CPU_COLOR1_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_OPACITY 0x081c
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V 0:0
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V_TRANSPARENT 0x00000000
+#define NV502D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V_OPAQUE 0x00000001
+
+#define NV502D_SET_PIXELS_FROM_CPU_SRC_WIDTH 0x0838
+#define NV502D_SET_PIXELS_FROM_CPU_SRC_WIDTH_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_SRC_HEIGHT 0x083c
+#define NV502D_SET_PIXELS_FROM_CPU_SRC_HEIGHT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DX_DU_FRAC 0x0840
+#define NV502D_SET_PIXELS_FROM_CPU_DX_DU_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DX_DU_INT 0x0844
+#define NV502D_SET_PIXELS_FROM_CPU_DX_DU_INT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DY_DV_FRAC 0x0848
+#define NV502D_SET_PIXELS_FROM_CPU_DY_DV_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DY_DV_INT 0x084c
+#define NV502D_SET_PIXELS_FROM_CPU_DY_DV_INT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DST_X0_FRAC 0x0850
+#define NV502D_SET_PIXELS_FROM_CPU_DST_X0_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DST_X0_INT 0x0854
+#define NV502D_SET_PIXELS_FROM_CPU_DST_X0_INT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DST_Y0_FRAC 0x0858
+#define NV502D_SET_PIXELS_FROM_CPU_DST_Y0_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_CPU_DST_Y0_INT 0x085c
+#define NV502D_SET_PIXELS_FROM_CPU_DST_Y0_INT_V 31:0
+
+#define NV502D_PIXELS_FROM_CPU_DATA 0x0860
+#define NV502D_PIXELS_FROM_CPU_DATA_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP 0x0888
+#define NV502D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V 0:0
+#define NV502D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V_FALSE 0x00000000
+#define NV502D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V_TRUE 0x00000001
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_X0 0x08b0
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_X0_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_Y0 0x08b4
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_Y0_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_WIDTH 0x08b8
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_WIDTH_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT 0x08bc
+#define NV502D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC 0x08c0
+#define NV502D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DU_DX_INT 0x08c4
+#define NV502D_SET_PIXELS_FROM_MEMORY_DU_DX_INT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC 0x08c8
+#define NV502D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_DV_DY_INT 0x08cc
+#define NV502D_SET_PIXELS_FROM_MEMORY_DV_DY_INT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC 0x08d0
+#define NV502D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT 0x08d4
+#define NV502D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT_V 31:0
+
+#define NV502D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC 0x08d8
+#define NV502D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC_V 31:0
+
+#define NV502D_PIXELS_FROM_MEMORY_SRC_Y0_INT 0x08dc
+#define NV502D_PIXELS_FROM_MEMORY_SRC_Y0_INT_V 31:0
+#endif /* _cl_nv50_twod_h_ */
diff --git a/drivers/gpu/drm/nouveau/include/nvhw/class/cl902d.h b/drivers/gpu/drm/nouveau/include/nvhw/class/cl902d.h
new file mode 100644
index 000000000000..8d0b42c04e3e
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvhw/class/cl902d.h
@@ -0,0 +1,357 @@
+/*
+ * Copyright (c) 2003 - 2004, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _cl_fermi_twod_a_h_
+#define _cl_fermi_twod_a_h_
+
+#define NV902D_SET_OBJECT 0x0000
+#define NV902D_SET_OBJECT_CLASS_ID 15:0
+#define NV902D_SET_OBJECT_ENGINE_ID 20:16
+
+#define NV902D_WAIT_FOR_IDLE 0x0110
+#define NV902D_WAIT_FOR_IDLE_V 31:0
+
+#define NV902D_SET_DST_FORMAT 0x0200
+#define NV902D_SET_DST_FORMAT_V 7:0
+#define NV902D_SET_DST_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV902D_SET_DST_FORMAT_V_A8RL8GL8BL8 0x000000D0
+#define NV902D_SET_DST_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV902D_SET_DST_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV902D_SET_DST_FORMAT_V_A8BL8GL8RL8 0x000000D6
+#define NV902D_SET_DST_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV902D_SET_DST_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV902D_SET_DST_FORMAT_V_X8RL8GL8BL8 0x000000E7
+#define NV902D_SET_DST_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV902D_SET_DST_FORMAT_V_X8BL8GL8RL8 0x000000FA
+#define NV902D_SET_DST_FORMAT_V_R5G6B5 0x000000E8
+#define NV902D_SET_DST_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV902D_SET_DST_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV902D_SET_DST_FORMAT_V_Y8 0x000000F3
+#define NV902D_SET_DST_FORMAT_V_Y16 0x000000EE
+#define NV902D_SET_DST_FORMAT_V_Y32 0x000000FF
+#define NV902D_SET_DST_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV902D_SET_DST_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV902D_SET_DST_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV902D_SET_DST_FORMAT_V_O8R8G8B8 0x000000FE
+#define NV902D_SET_DST_FORMAT_V_Y1_8X8 0x0000001C
+#define NV902D_SET_DST_FORMAT_V_RF16 0x000000F2
+#define NV902D_SET_DST_FORMAT_V_RF32 0x000000E5
+#define NV902D_SET_DST_FORMAT_V_RF32_GF32 0x000000CB
+#define NV902D_SET_DST_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA
+#define NV902D_SET_DST_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE
+#define NV902D_SET_DST_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0
+#define NV902D_SET_DST_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3
+#define NV902D_SET_DST_FORMAT_V_R16_G16_B16_A16 0x000000C6
+#define NV902D_SET_DST_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7
+#define NV902D_SET_DST_FORMAT_V_BF10GF11RF11 0x000000E0
+#define NV902D_SET_DST_FORMAT_V_AN8BN8GN8RN8 0x000000D7
+#define NV902D_SET_DST_FORMAT_V_RF16_GF16 0x000000DE
+#define NV902D_SET_DST_FORMAT_V_R16_G16 0x000000DA
+#define NV902D_SET_DST_FORMAT_V_RN16_GN16 0x000000DB
+#define NV902D_SET_DST_FORMAT_V_G8R8 0x000000EA
+#define NV902D_SET_DST_FORMAT_V_GN8RN8 0x000000EB
+#define NV902D_SET_DST_FORMAT_V_RN16 0x000000EF
+#define NV902D_SET_DST_FORMAT_V_RN8 0x000000F4
+#define NV902D_SET_DST_FORMAT_V_A8 0x000000F7
+
+#define NV902D_SET_DST_MEMORY_LAYOUT 0x0204
+#define NV902D_SET_DST_MEMORY_LAYOUT_V 0:0
+#define NV902D_SET_DST_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
+#define NV902D_SET_DST_MEMORY_LAYOUT_V_PITCH 0x00000001
+
+#define NV902D_SET_DST_PITCH 0x0214
+#define NV902D_SET_DST_PITCH_V 31:0
+
+#define NV902D_SET_DST_WIDTH 0x0218
+#define NV902D_SET_DST_WIDTH_V 31:0
+
+#define NV902D_SET_DST_HEIGHT 0x021c
+#define NV902D_SET_DST_HEIGHT_V 31:0
+
+#define NV902D_SET_DST_OFFSET_UPPER 0x0220
+#define NV902D_SET_DST_OFFSET_UPPER_V 7:0
+
+#define NV902D_SET_DST_OFFSET_LOWER 0x0224
+#define NV902D_SET_DST_OFFSET_LOWER_V 31:0
+
+#define NV902D_SET_SRC_FORMAT 0x0230
+#define NV902D_SET_SRC_FORMAT_V 7:0
+#define NV902D_SET_SRC_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV902D_SET_SRC_FORMAT_V_A8RL8GL8BL8 0x000000D0
+#define NV902D_SET_SRC_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV902D_SET_SRC_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV902D_SET_SRC_FORMAT_V_A8BL8GL8RL8 0x000000D6
+#define NV902D_SET_SRC_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV902D_SET_SRC_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV902D_SET_SRC_FORMAT_V_X8RL8GL8BL8 0x000000E7
+#define NV902D_SET_SRC_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV902D_SET_SRC_FORMAT_V_X8BL8GL8RL8 0x000000FA
+#define NV902D_SET_SRC_FORMAT_V_R5G6B5 0x000000E8
+#define NV902D_SET_SRC_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV902D_SET_SRC_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV902D_SET_SRC_FORMAT_V_Y8 0x000000F3
+#define NV902D_SET_SRC_FORMAT_V_AY8 0x0000001D
+#define NV902D_SET_SRC_FORMAT_V_Y16 0x000000EE
+#define NV902D_SET_SRC_FORMAT_V_Y32 0x000000FF
+#define NV902D_SET_SRC_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV902D_SET_SRC_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV902D_SET_SRC_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV902D_SET_SRC_FORMAT_V_O8R8G8B8 0x000000FE
+#define NV902D_SET_SRC_FORMAT_V_Y1_8X8 0x0000001C
+#define NV902D_SET_SRC_FORMAT_V_RF16 0x000000F2
+#define NV902D_SET_SRC_FORMAT_V_RF32 0x000000E5
+#define NV902D_SET_SRC_FORMAT_V_RF32_GF32 0x000000CB
+#define NV902D_SET_SRC_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA
+#define NV902D_SET_SRC_FORMAT_V_RF16_GF16_BF16_X16 0x000000CE
+#define NV902D_SET_SRC_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0
+#define NV902D_SET_SRC_FORMAT_V_RF32_GF32_BF32_X32 0x000000C3
+#define NV902D_SET_SRC_FORMAT_V_R16_G16_B16_A16 0x000000C6
+#define NV902D_SET_SRC_FORMAT_V_RN16_GN16_BN16_AN16 0x000000C7
+#define NV902D_SET_SRC_FORMAT_V_BF10GF11RF11 0x000000E0
+#define NV902D_SET_SRC_FORMAT_V_AN8BN8GN8RN8 0x000000D7
+#define NV902D_SET_SRC_FORMAT_V_RF16_GF16 0x000000DE
+#define NV902D_SET_SRC_FORMAT_V_R16_G16 0x000000DA
+#define NV902D_SET_SRC_FORMAT_V_RN16_GN16 0x000000DB
+#define NV902D_SET_SRC_FORMAT_V_G8R8 0x000000EA
+#define NV902D_SET_SRC_FORMAT_V_GN8RN8 0x000000EB
+#define NV902D_SET_SRC_FORMAT_V_RN16 0x000000EF
+#define NV902D_SET_SRC_FORMAT_V_RN8 0x000000F4
+#define NV902D_SET_SRC_FORMAT_V_A8 0x000000F7
+
+#define NV902D_SET_SRC_MEMORY_LAYOUT 0x0234
+#define NV902D_SET_SRC_MEMORY_LAYOUT_V 0:0
+#define NV902D_SET_SRC_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
+#define NV902D_SET_SRC_MEMORY_LAYOUT_V_PITCH 0x00000001
+
+#define NV902D_SET_SRC_PITCH 0x0244
+#define NV902D_SET_SRC_PITCH_V 31:0
+
+#define NV902D_SET_SRC_WIDTH 0x0248
+#define NV902D_SET_SRC_WIDTH_V 31:0
+
+#define NV902D_SET_SRC_HEIGHT 0x024c
+#define NV902D_SET_SRC_HEIGHT_V 31:0
+
+#define NV902D_SET_SRC_OFFSET_UPPER 0x0250
+#define NV902D_SET_SRC_OFFSET_UPPER_V 7:0
+
+#define NV902D_SET_SRC_OFFSET_LOWER 0x0254
+#define NV902D_SET_SRC_OFFSET_LOWER_V 31:0
+
+#define NV902D_SET_CLIP_ENABLE 0x0290
+#define NV902D_SET_CLIP_ENABLE_V 0:0
+#define NV902D_SET_CLIP_ENABLE_V_FALSE 0x00000000
+#define NV902D_SET_CLIP_ENABLE_V_TRUE 0x00000001
+
+#define NV902D_SET_ROP 0x02a0
+#define NV902D_SET_ROP_V 7:0
+
+#define NV902D_SET_OPERATION 0x02ac
+#define NV902D_SET_OPERATION_V 2:0
+#define NV902D_SET_OPERATION_V_SRCCOPY_AND 0x00000000
+#define NV902D_SET_OPERATION_V_ROP_AND 0x00000001
+#define NV902D_SET_OPERATION_V_BLEND_AND 0x00000002
+#define NV902D_SET_OPERATION_V_SRCCOPY 0x00000003
+#define NV902D_SET_OPERATION_V_ROP 0x00000004
+#define NV902D_SET_OPERATION_V_SRCCOPY_PREMULT 0x00000005
+#define NV902D_SET_OPERATION_V_BLEND_PREMULT 0x00000006
+
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT 0x02e8
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V 2:0
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8X8R5G6B5 0x00000000
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A1R5G5B5 0x00000001
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8R8G8B8 0x00000002
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8Y8 0x00000003
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_A8X8Y16 0x00000004
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_Y32 0x00000005
+#define NV902D_SET_MONOCHROME_PATTERN_COLOR_FORMAT_V_BYTE_EXPAND 0x00000006
+
+#define NV902D_SET_MONOCHROME_PATTERN_FORMAT 0x02ec
+#define NV902D_SET_MONOCHROME_PATTERN_FORMAT_V 0:0
+#define NV902D_SET_MONOCHROME_PATTERN_FORMAT_V_CGA6_M1 0x00000000
+#define NV902D_SET_MONOCHROME_PATTERN_FORMAT_V_LE_M1 0x00000001
+
+#define NV902D_RENDER_SOLID_PRIM_MODE 0x0580
+#define NV902D_RENDER_SOLID_PRIM_MODE_V 2:0
+#define NV902D_RENDER_SOLID_PRIM_MODE_V_POINTS 0x00000000
+#define NV902D_RENDER_SOLID_PRIM_MODE_V_LINES 0x00000001
+#define NV902D_RENDER_SOLID_PRIM_MODE_V_POLYLINE 0x00000002
+#define NV902D_RENDER_SOLID_PRIM_MODE_V_TRIANGLES 0x00000003
+#define NV902D_RENDER_SOLID_PRIM_MODE_V_RECTS 0x00000004
+
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT 0x0584
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V 7:0
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_RF32_GF32_BF32_AF32 0x000000C0
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_RF16_GF16_BF16_AF16 0x000000CA
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_RF32_GF32 0x000000CB
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_R5G6B5 0x000000E8
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y8 0x000000F3
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y16 0x000000EE
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Y32 0x000000FF
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_FORMAT_V_O8R8G8B8 0x000000FE
+
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR 0x0588
+#define NV902D_SET_RENDER_SOLID_PRIM_COLOR_V 31:0
+
+#define NV902D_RENDER_SOLID_PRIM_POINT_SET_X(j) (0x0600+(j)*8)
+#define NV902D_RENDER_SOLID_PRIM_POINT_SET_X_V 31:0
+
+#define NV902D_RENDER_SOLID_PRIM_POINT_Y(j) (0x0604+(j)*8)
+#define NV902D_RENDER_SOLID_PRIM_POINT_Y_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE 0x0800
+#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE_V 0:0
+#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE_V_COLOR 0x00000000
+#define NV902D_SET_PIXELS_FROM_CPU_DATA_TYPE_V_INDEX 0x00000001
+
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT 0x0804
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V 7:0
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A8R8G8B8 0x000000CF
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A2R10G10B10 0x000000DF
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A8B8G8R8 0x000000D5
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A2B10G10R10 0x000000D1
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X8R8G8B8 0x000000E6
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X8B8G8R8 0x000000F9
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_R5G6B5 0x000000E8
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_A1R5G5B5 0x000000E9
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_X1R5G5B5 0x000000F8
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y8 0x000000F3
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y16 0x000000EE
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Y32 0x000000FF
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Z1R5G5B5 0x000000FB
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_O1R5G5B5 0x000000FC
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_Z8R8G8B8 0x000000FD
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR_FORMAT_V_O8R8G8B8 0x000000FE
+
+#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT 0x0808
+#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V 1:0
+#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I1 0x00000000
+#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I4 0x00000001
+#define NV902D_SET_PIXELS_FROM_CPU_INDEX_FORMAT_V_I8 0x00000002
+
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT 0x080c
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V 0:0
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V_CGA6_M1 0x00000000
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_FORMAT_V_LE_M1 0x00000001
+
+#define NV902D_SET_PIXELS_FROM_CPU_WRAP 0x0810
+#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V 1:0
+#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_PIXEL 0x00000000
+#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_BYTE 0x00000001
+#define NV902D_SET_PIXELS_FROM_CPU_WRAP_V_WRAP_DWORD 0x00000002
+
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR0 0x0814
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR0_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR1 0x0818
+#define NV902D_SET_PIXELS_FROM_CPU_COLOR1_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY 0x081c
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V 0:0
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V_TRANSPARENT 0x00000000
+#define NV902D_SET_PIXELS_FROM_CPU_MONO_OPACITY_V_OPAQUE 0x00000001
+
+#define NV902D_SET_PIXELS_FROM_CPU_SRC_WIDTH 0x0838
+#define NV902D_SET_PIXELS_FROM_CPU_SRC_WIDTH_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_SRC_HEIGHT 0x083c
+#define NV902D_SET_PIXELS_FROM_CPU_SRC_HEIGHT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_FRAC 0x0840
+#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_INT 0x0844
+#define NV902D_SET_PIXELS_FROM_CPU_DX_DU_INT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_FRAC 0x0848
+#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_INT 0x084c
+#define NV902D_SET_PIXELS_FROM_CPU_DY_DV_INT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_FRAC 0x0850
+#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_INT 0x0854
+#define NV902D_SET_PIXELS_FROM_CPU_DST_X0_INT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_FRAC 0x0858
+#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_INT 0x085c
+#define NV902D_SET_PIXELS_FROM_CPU_DST_Y0_INT_V 31:0
+
+#define NV902D_PIXELS_FROM_CPU_DATA 0x0860
+#define NV902D_PIXELS_FROM_CPU_DATA_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP 0x0888
+#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V 0:0
+#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V_FALSE 0x00000000
+#define NV902D_SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP_V_TRUE 0x00000001
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_X0 0x08b0
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_X0_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_Y0 0x08b4
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_Y0_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_WIDTH 0x08b8
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_WIDTH_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT 0x08bc
+#define NV902D_SET_PIXELS_FROM_MEMORY_DST_HEIGHT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC 0x08c0
+#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_INT 0x08c4
+#define NV902D_SET_PIXELS_FROM_MEMORY_DU_DX_INT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC 0x08c8
+#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_INT 0x08cc
+#define NV902D_SET_PIXELS_FROM_MEMORY_DV_DY_INT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC 0x08d0
+#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_FRAC_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT 0x08d4
+#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_X0_INT_V 31:0
+
+#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC 0x08d8
+#define NV902D_SET_PIXELS_FROM_MEMORY_SRC_Y0_FRAC_V 31:0
+
+#define NV902D_PIXELS_FROM_MEMORY_SRC_Y0_INT 0x08dc
+#define NV902D_PIXELS_FROM_MEMORY_SRC_Y0_INT_V 31:0
+#endif /* _cl_fermi_twod_a_h_ */
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index cbdd473acd9f..9001b30f7214 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -29,6 +29,8 @@
#include <nvif/push206e.h>
+#include <nvhw/class/cl502d.h>
+
int
nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
@@ -160,22 +162,22 @@ nv50_fbcon_accel_init(struct fb_info *info)
switch (info->var.bits_per_pixel) {
case 8:
- format = 0xf3;
+ format = NV502D_SET_DST_FORMAT_V_Y8;
break;
case 15:
- format = 0xf8;
+ format = NV502D_SET_DST_FORMAT_V_X1R5G5B5;
break;
case 16:
- format = 0xe8;
+ format = NV502D_SET_DST_FORMAT_V_R5G6B5;
break;
case 32:
switch (info->var.transp.length) {
case 0: /* depth 24 */
case 8: /* depth 32, just use 24.. */
- format = 0xe6;
+ format = NV502D_SET_DST_FORMAT_V_X8R8G8B8;
break;
case 2: /* depth 30 */
- format = 0xd1;
+ format = NV502D_SET_DST_FORMAT_V_A2B10G10R10;
break;
default:
return -EINVAL;
@@ -196,53 +198,94 @@ nv50_fbcon_accel_init(struct fb_info *info)
return ret;
}
- PUSH_NVSQ(push, NV502D, 0x0000, nfbdev->twod.handle);
- PUSH_NVSQ(push, NV502D, 0x0184, chan->vram.handle,
- 0x0188, chan->vram.handle,
- 0x018c, chan->vram.handle);
-
- PUSH_NVSQ(push, NV502D, 0x0200, format,
- 0x0204, 1);
- PUSH_NVSQ(push, NV502D, 0x0214, info->fix.line_length,
- 0x0218, info->var.xres_virtual,
- 0x021c, info->var.yres_virtual,
- 0x0220, upper_32_bits(nfbdev->vma->addr),
- 0x0224, lower_32_bits(nfbdev->vma->addr));
-
- PUSH_NVSQ(push, NV502D, 0x0230, format,
- 0x0234, 1);
- PUSH_NVSQ(push, NV502D, 0x0244, info->fix.line_length,
- 0x0248, info->var.xres_virtual,
- 0x024c, info->var.yres_virtual,
- 0x0250, upper_32_bits(nfbdev->vma->addr),
- 0x0254, lower_32_bits(nfbdev->vma->addr));
-
- PUSH_NVSQ(push, NV502D, 0x0290, 0);
- PUSH_NVSQ(push, NV502D, 0x02a0, 0x55);
- PUSH_NVSQ(push, NV502D, 0x02ac, 3);
- PUSH_NVSQ(push, NV502D, 0x02e8, 2,
- 0x02ec, 1);
-
- PUSH_NVSQ(push, NV502D, 0X0580, 4,
- 0x0584, format);
-
- PUSH_NVSQ(push, NV502D, 0x0800, 1,
- 0x0804, format,
- 0x0808, 0,
- 0x080c, 0,
- 0x0810, 1);
- PUSH_NVSQ(push, NV502D, 0x081c, 1);
- PUSH_NVSQ(push, NV502D, 0x0840, 0,
- 0x0844, 1,
- 0x0848, 0,
- 0x084c, 1);
-
- PUSH_NVSQ(push, NV502D, 0x0888, 1);
- PUSH_NVSQ(push, NV502D, 0x08c0, 0,
- 0x08c4, 1,
- 0x08c8, 0,
- 0x08cc, 1);
+ PUSH_MTHD(push, NV502D, SET_OBJECT, nfbdev->twod.handle);
+ PUSH_MTHD(push, NV502D, SET_DST_CONTEXT_DMA, chan->vram.handle,
+ SET_SRC_CONTEXT_DMA, chan->vram.handle,
+ SET_SEMAPHORE_CONTEXT_DMA, chan->vram.handle);
+
+ PUSH_MTHD(push, NV502D, SET_DST_FORMAT,
+ NVVAL(NV502D, SET_DST_FORMAT, V, format),
+
+ SET_DST_MEMORY_LAYOUT,
+ NVDEF(NV502D, SET_DST_MEMORY_LAYOUT, V, PITCH));
+
+ PUSH_MTHD(push, NV502D, SET_DST_PITCH, info->fix.line_length,
+ SET_DST_WIDTH, info->var.xres_virtual,
+ SET_DST_HEIGHT, info->var.yres_virtual,
+
+ SET_DST_OFFSET_UPPER,
+ NVVAL(NV502D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
+
+ SET_DST_OFFSET_LOWER,
+ NVVAL(NV502D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
+
+ PUSH_MTHD(push, NV502D, SET_SRC_FORMAT,
+ NVVAL(NV502D, SET_SRC_FORMAT, V, format),
+
+ SET_SRC_MEMORY_LAYOUT,
+ NVDEF(NV502D, SET_SRC_MEMORY_LAYOUT, V, PITCH));
+
+ PUSH_MTHD(push, NV502D, SET_SRC_PITCH, info->fix.line_length,
+ SET_SRC_WIDTH, info->var.xres_virtual,
+ SET_SRC_HEIGHT, info->var.yres_virtual,
+
+ SET_SRC_OFFSET_UPPER,
+ NVVAL(NV502D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
+
+ SET_SRC_OFFSET_LOWER,
+ NVVAL(NV502D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
+
+ PUSH_MTHD(push, NV502D, SET_CLIP_ENABLE,
+ NVDEF(NV502D, SET_CLIP_ENABLE, V, FALSE));
+
+ PUSH_MTHD(push, NV502D, SET_ROP,
+ NVVAL(NV502D, SET_ROP, V, 0x55));
+
+ PUSH_MTHD(push, NV502D, SET_OPERATION,
+ NVDEF(NV502D, SET_OPERATION, V, SRCCOPY));
+
+ PUSH_MTHD(push, NV502D, SET_MONOCHROME_PATTERN_COLOR_FORMAT,
+ NVDEF(NV502D, SET_MONOCHROME_PATTERN_COLOR_FORMAT, V, A8R8G8B8),
+
+ SET_MONOCHROME_PATTERN_FORMAT,
+ NVDEF(NV502D, SET_MONOCHROME_PATTERN_FORMAT, V, LE_M1));
+
+ PUSH_MTHD(push, NV502D, RENDER_SOLID_PRIM_MODE,
+ NVDEF(NV502D, RENDER_SOLID_PRIM_MODE, V, RECTS),
+
+ SET_RENDER_SOLID_PRIM_COLOR_FORMAT,
+ NVVAL(NV502D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format));
+
+ PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DATA_TYPE,
+ NVDEF(NV502D, SET_PIXELS_FROM_CPU_DATA_TYPE, V, INDEX),
+
+ SET_PIXELS_FROM_CPU_COLOR_FORMAT,
+ NVVAL(NV502D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format),
+
+ SET_PIXELS_FROM_CPU_INDEX_FORMAT,
+ NVDEF(NV502D, SET_PIXELS_FROM_CPU_INDEX_FORMAT, V, I1),
+
+ SET_PIXELS_FROM_CPU_MONO_FORMAT,
+ NVDEF(NV502D, SET_PIXELS_FROM_CPU_MONO_FORMAT, V, CGA6_M1),
+
+ SET_PIXELS_FROM_CPU_WRAP,
+ NVDEF(NV502D, SET_PIXELS_FROM_CPU_WRAP, V, WRAP_BYTE));
+
+ PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_MONO_OPACITY,
+ NVDEF(NV502D, SET_PIXELS_FROM_CPU_MONO_OPACITY, V, OPAQUE));
+
+ PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_CPU_DX_DU_FRAC, 0,
+ SET_PIXELS_FROM_CPU_DX_DU_INT, 1,
+ SET_PIXELS_FROM_CPU_DY_DV_FRAC, 0,
+ SET_PIXELS_FROM_CPU_DY_DV_INT, 1);
+
+ PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP,
+ NVDEF(NV502D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP, V, TRUE));
+ PUSH_MTHD(push, NV502D, SET_PIXELS_FROM_MEMORY_DU_DX_FRAC, 0,
+ SET_PIXELS_FROM_MEMORY_DU_DX_INT, 1,
+ SET_PIXELS_FROM_MEMORY_DV_DY_FRAC, 0,
+ SET_PIXELS_FROM_MEMORY_DV_DY_INT, 1);
PUSH_KICK(push);
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
index ab1dbf03de7b..1f4ca42b940e 100644
--- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c
@@ -29,6 +29,8 @@
#include <nvif/push906f.h>
+#include <nvhw/class/cl902d.h>
+
int
nvc0_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
@@ -165,22 +167,22 @@ nvc0_fbcon_accel_init(struct fb_info *info)
switch (info->var.bits_per_pixel) {
case 8:
- format = 0xf3;
+ format = NV902D_SET_DST_FORMAT_V_Y8;
break;
case 15:
- format = 0xf8;
+ format = NV902D_SET_DST_FORMAT_V_X1R5G5B5;
break;
case 16:
- format = 0xe8;
+ format = NV902D_SET_DST_FORMAT_V_R5G6B5;
break;
case 32:
switch (info->var.transp.length) {
case 0: /* depth 24 */
case 8: /* depth 32, just use 24.. */
- format = 0xe6;
+ format = NV902D_SET_DST_FORMAT_V_X8R8G8B8;
break;
case 2: /* depth 30 */
- format = 0xd1;
+ format = NV902D_SET_DST_FORMAT_V_A2B10G10R10;
break;
default:
return -EINVAL;
@@ -197,50 +199,91 @@ nvc0_fbcon_accel_init(struct fb_info *info)
return ret;
}
- PUSH_NVSQ(push, NV902D, 0x0000, nfbdev->twod.handle);
-
- PUSH_NVSQ(push, NV902D, 0x0200, format,
- 0x0204, 1);
- PUSH_NVSQ(push, NV902D, 0x0214, info->fix.line_length,
- 0x0218, info->var.xres_virtual,
- 0x021c, info->var.yres_virtual,
- 0x0220, upper_32_bits(nfbdev->vma->addr),
- 0x0224, lower_32_bits(nfbdev->vma->addr));
-
- PUSH_NVSQ(push, NV902D, 0x0230, format,
- 0x0234, 1);
- PUSH_NVSQ(push, NV902D, 0x0244, info->fix.line_length,
- 0x0248, info->var.xres_virtual,
- 0x024c, info->var.yres_virtual,
- 0x0250, upper_32_bits(nfbdev->vma->addr),
- 0x0254, lower_32_bits(nfbdev->vma->addr));
-
- PUSH_NVIM(push, NV902D, 0x0290, 0);
- PUSH_NVIM(push, NV902D, 0x02a0, 0x55);
- PUSH_NVIM(push, NV902D, 0x02ac, 3);
- PUSH_NVSQ(push, NV902D, 0x02e8, 2,
- 0x02ec, 1);
-
- PUSH_NVSQ(push, NV902D, 0X0580, 4,
- 0x0584, format);
-
- PUSH_NVSQ(push, NV902D, 0x0800, 1,
- 0x0804, format,
- 0x0808, 0,
- 0x080c, 0,
- 0x0810, 1);
- PUSH_NVIM(push, NV902D, 0x081c, 1);
- PUSH_NVSQ(push, NV902D, 0x0840, 0,
- 0x0844, 1,
- 0x0848, 0,
- 0x084c, 1);
-
- PUSH_NVIM(push, NV902D, 0x0888, 1);
- PUSH_NVSQ(push, NV902D, 0x08c0, 0,
- 0x08c4, 1,
- 0x08c8, 0,
- 0x08cc, 1);
+ PUSH_MTHD(push, NV902D, SET_OBJECT, nfbdev->twod.handle);
+
+ PUSH_MTHD(push, NV902D, SET_DST_FORMAT,
+ NVVAL(NV902D, SET_DST_FORMAT, V, format),
+
+ SET_DST_MEMORY_LAYOUT,
+ NVDEF(NV902D, SET_DST_MEMORY_LAYOUT, V, PITCH));
+
+ PUSH_MTHD(push, NV902D, SET_DST_PITCH, info->fix.line_length,
+ SET_DST_WIDTH, info->var.xres_virtual,
+ SET_DST_HEIGHT, info->var.yres_virtual,
+
+ SET_DST_OFFSET_UPPER,
+ NVVAL(NV902D, SET_DST_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
+
+ SET_DST_OFFSET_LOWER,
+ NVVAL(NV902D, SET_DST_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
+
+ PUSH_MTHD(push, NV902D, SET_SRC_FORMAT,
+ NVVAL(NV902D, SET_SRC_FORMAT, V, format),
+
+ SET_SRC_MEMORY_LAYOUT,
+ NVDEF(NV902D, SET_SRC_MEMORY_LAYOUT, V, PITCH));
+
+ PUSH_MTHD(push, NV902D, SET_SRC_PITCH, info->fix.line_length,
+ SET_SRC_WIDTH, info->var.xres_virtual,
+ SET_SRC_HEIGHT, info->var.yres_virtual,
+
+ SET_SRC_OFFSET_UPPER,
+ NVVAL(NV902D, SET_SRC_OFFSET_UPPER, V, upper_32_bits(nfbdev->vma->addr)),
+
+ SET_SRC_OFFSET_LOWER,
+ NVVAL(NV902D, SET_SRC_OFFSET_LOWER, V, lower_32_bits(nfbdev->vma->addr)));
+
+ PUSH_IMMD(push, NV902D, SET_CLIP_ENABLE,
+ NVDEF(NV902D, SET_CLIP_ENABLE, V, FALSE));
+
+ PUSH_IMMD(push, NV902D, SET_ROP,
+ NVVAL(NV902D, SET_ROP, V, 0x55));
+
+ PUSH_IMMD(push, NV902D, SET_OPERATION,
+ NVDEF(NV902D, SET_OPERATION, V, SRCCOPY));
+
+ PUSH_MTHD(push, NV902D, SET_MONOCHROME_PATTERN_COLOR_FORMAT,
+ NVDEF(NV902D, SET_MONOCHROME_PATTERN_COLOR_FORMAT, V, A8R8G8B8),
+
+ SET_MONOCHROME_PATTERN_FORMAT,
+ NVDEF(NV902D, SET_MONOCHROME_PATTERN_FORMAT, V, LE_M1));
+
+ PUSH_MTHD(push, NV902D, RENDER_SOLID_PRIM_MODE,
+ NVDEF(NV902D, RENDER_SOLID_PRIM_MODE, V, RECTS),
+
+ SET_RENDER_SOLID_PRIM_COLOR_FORMAT,
+ NVVAL(NV902D, SET_RENDER_SOLID_PRIM_COLOR_FORMAT, V, format));
+
+ PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_DATA_TYPE,
+ NVDEF(NV902D, SET_PIXELS_FROM_CPU_DATA_TYPE, V, INDEX),
+
+ SET_PIXELS_FROM_CPU_COLOR_FORMAT,
+ NVVAL(NV902D, SET_PIXELS_FROM_CPU_COLOR_FORMAT, V, format),
+
+ SET_PIXELS_FROM_CPU_INDEX_FORMAT,
+ NVDEF(NV902D, SET_PIXELS_FROM_CPU_INDEX_FORMAT, V, I1),
+
+ SET_PIXELS_FROM_CPU_MONO_FORMAT,
+ NVDEF(NV902D, SET_PIXELS_FROM_CPU_MONO_FORMAT, V, CGA6_M1),
+
+ SET_PIXELS_FROM_CPU_WRAP,
+ NVDEF(NV902D, SET_PIXELS_FROM_CPU_WRAP, V, WRAP_BYTE));
+
+ PUSH_IMMD(push, NV902D, SET_PIXELS_FROM_CPU_MONO_OPACITY,
+ NVDEF(NV902D, SET_PIXELS_FROM_CPU_MONO_OPACITY, V, OPAQUE));
+
+ PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_CPU_DX_DU_FRAC, 0,
+ SET_PIXELS_FROM_CPU_DX_DU_INT, 1,
+ SET_PIXELS_FROM_CPU_DY_DV_FRAC, 0,
+ SET_PIXELS_FROM_CPU_DY_DV_INT, 1);
+
+ PUSH_IMMD(push, NV902D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP,
+ NVDEF(NV902D, SET_PIXELS_FROM_MEMORY_SAFE_OVERLAP, V, TRUE));
+ PUSH_MTHD(push, NV902D, SET_PIXELS_FROM_MEMORY_DU_DX_FRAC, 0,
+ SET_PIXELS_FROM_MEMORY_DU_DX_INT, 1,
+ SET_PIXELS_FROM_MEMORY_DV_DY_FRAC, 0,
+ SET_PIXELS_FROM_MEMORY_DV_DY_INT, 1);
PUSH_KICK(push);
return 0;
}
--
2.29.2